FDT459N [ONSEMI]

N 沟道增强型场效应晶体管,30V,6.5A,35mΩ;
FDT459N
型号: FDT459N
厂家: ONSEMI    ONSEMI
描述:

N 沟道增强型场效应晶体管,30V,6.5A,35mΩ

开关 脉冲 光电二极管 晶体管 场效应晶体管
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March 1998  
FDT459N  
N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild's proprietary, high  
cell density, DMOS technology. This very high density  
process is especially tailored to minimize on-state resistance,  
provide superior switching performance. These products are  
well suited to low voltage, low current applications such as  
notebook computer power management, battery powered  
circuits, and DC motor control.  
6.5 A, 30 V. RDS(ON) = 0.035W @ VGS = 10 V  
RDS(ON) = 0.055 W @ VGS = 4.5 V.  
High density cell design for extremely low RDS(ON)  
.
High power and current handling capability in a widely used  
surface mount package.  
SuperSOTTM-3  
SuperSOTTM-8  
SuperSOTTM-6  
SO-8  
SOT-223  
SOIC-16  
D
D
S
G
D
S
G
Absolute Maximum Ratings TA = 25oC unless otherwise noted  
Symbol Parameter  
FDT459N  
Units  
Drain-Source Voltage  
30  
V
VDSS  
VGSS  
ID  
Gate-Source Voltage - Continuous  
±20  
V
A
Maximum Drain Current - Continuous  
- Pulsed  
(Note 1a)  
6.5  
20  
3
PD  
Maximum Power Dissipation  
(Note 1a)  
(Note 1b)  
W
1.3  
1.1  
(Note 1c)  
Operating and Storage Temperature Range  
-55 to 150  
°C  
TJ,TSTG  
THERMAL CHARACTERISTICS  
Thermal Resistance, Junction-to-Ambient (Note 1a)  
Thermal Resistance, Junction-to-Case  
42  
12  
°C/W  
°C/W  
RqJA  
RqJC  
(Note 1)  
* Order option J23Z for cropped center drain lead.  
FDT459NRev.C  
© 1998 Fairchild Semiconductor Corporation  
O
Electrical Characteristics (TA = 25 C unless otherwise noted )  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
OFF CHARACTERISTICS  
BVDSS  
Drain-Source Breakdown Voltage  
VGS = 0 V, ID = 250 µA  
30  
V
ID = 250 µA, Referenced to 25 o C  
mV/oC  
Breakdown Voltage Temp. Coefficient  
Zero Gate Voltage Drain Current  
33  
DBVDSS/DTJ  
1
µA  
µA  
nA  
nA  
IDSS  
VDS = 24 V, VGS = 0 V  
TJ =55°C  
10  
Gate - Body Leakage, Forward  
Gate - Body Leakage, Reverse  
100  
-100  
IGSSF  
IGSSR  
VGS = 20 V, VDS = 0 V  
VGS = -20 V, VDS = 0 V  
ON CHARACTERISTICS (Note 2)  
Gate Threshold Voltage  
1
1.6  
2
V
VGS(th)  
VDS = VGS, ID = 250 µA  
Gate Threshold Voltage Temp.Coefficient  
Static Drain-Source On-Resistance  
ID = 250 µA, Referenced to 25 oC  
-4.2  
mV/oC  
DVGS(th)/DTJ  
RDS(ON)  
VGS = 10 V, ID = 6.5 A  
0.031 0.035  
0.044 0.06  
W
TJ =125°C  
VGS = 4.5 V, ID = 5.5 A  
VGS = 10 V, VDS = 5 V  
VDS = 10 V, ID = 6.5 A  
0.046 0.055  
On-State Drain Current  
20  
A
S
ID(ON)  
gFS  
Forward Transconductance  
16  
DYNAMIC CHARACTERISTICS  
Input Capacitance  
365  
210  
70  
pF  
pF  
pF  
Ciss  
Coss  
Crss  
VDS = 15 V, VGS = 0 V,  
f = 1.0 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
SWITCHING CHARACTERISTICS (Note 2)  
Turn - On Delay Time  
Turn - On Rise Time  
Turn - Off Delay Time  
Turn - Off Fall Time  
Total Gate Charge  
5.2  
8.2  
6
11  
16  
12  
26  
17  
ns  
ns  
tD(on)  
tr  
tD(off)  
tf  
VDD = 15 V, ID = 1 A,  
VGS = 10 V, RGEN = 6 W  
ns  
16  
12  
2.2  
3
ns  
nC  
nC  
nC  
Qg  
Qgs  
Qgd  
VDS = 10 V, ID = 6.5 A,  
VGS = 10 V  
Gate-Source Charge  
Gate-Drain Charge  
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS  
IS  
Maximum Continuous Drain-Source Diode Forward Current  
Drain-Source Diode Forward Voltage  
2.5  
1.2  
A
V
0.8  
VSD  
VGS = 0 V, IS = 2.5 A (Note 2)  
Notes:  
1. RqJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by  
design while RqCA is determined by the user's board design.  
Typical RqJA using the board layouts shown below on FR-4 PCB in a still air environment:  
c. 110oC/W when mounted on a 0.00123  
in2 pad of 2oz Cu.  
a. 42oC/W when mounted on a 1 in2 pad of  
2oz Cu.  
b. 95oC/W when mounted on a  
pad of 2oz Cu.  
0.066 in2  
Scale 1 : 1 on letter size paper  
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%  
FDT459NRev.C  
Typical Electrical Characteristics  
30  
3.5  
3
V
= 10V  
6.0  
GS  
5.0  
25  
20  
15  
10  
5
V
= 3.5V  
GS  
4.5  
2.5  
2
4.0  
4.0  
4.5  
5.0  
1.5  
1
3.5  
3
6.0  
10  
3.0  
0
0.5  
0
1
2
4
5
0
5
10  
15  
20  
25  
30  
V
, DRAIN-SOURCE VOLTAGE (V)  
I
, DRAIN CURRENT (A)  
DS  
D
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
Figure 1. On-Region Characteristics.  
0.14  
0.12  
0.1  
1.6  
1.4  
1.2  
1
ID= 6.5A  
I
= 6.5A  
D
V
= 10V  
GS  
0.08  
0.06  
0.04  
0.02  
TJ = 125°C  
0.8  
0.6  
25°C  
2
4
6
8
10  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
V
, GATE TO SOURCE VOLTAGE (V)  
T
, JUNCTION TEMPERATURE (°C)  
GS  
J
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
Figure 3. On-Resistance Variation  
with Temperature.  
25  
20  
15  
10  
5
20  
V
DS  
= 10V  
V
= 0V  
T = -55°C  
J
GS  
25°C  
T = 125°C  
125°C  
1
0.1  
J
25°C  
-55°C  
0.01  
0.001  
0.0001  
0
1
2
3
4
5
6
0
0.2  
V
0.4  
0.6  
0.8  
1
1.2  
1.4  
, BODY DIODE FORWARD VOLTAGE (V)  
V
, GATE TO SOURCE VOLTAGE (V)  
SD  
GS  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage  
Variation with Source Current  
and Temperature.  
FDT459NRev.C  
Typical Electrical Characteristics  
1000  
10  
VDS= 5V  
ID = 6.5A  
10V  
8
6
4
2
0
15V  
400  
200  
100  
C
iss  
C
oss  
C
rss  
f = 1 MHz  
50  
30  
V
= 0 V  
GS  
0.1  
0.3  
V
1
3
10  
30  
0
2
4
6
8
10  
12  
14  
, DRAIN TO SOURCE VOLTAGE (V)  
DS  
Q
, GATE CHARGE (nC)  
g
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
40  
200  
160  
120  
80  
20  
10  
5
SINGLE PULSE  
RqJA= see note 1c  
T = 25°C  
A
2
1
0.5  
VGS =10V  
0.1  
SINGLE PULSE  
RqJA= See Note 1c  
40  
0.05  
TA = 25°C  
0
0.01  
0.001  
0.01  
0.1  
1
10  
100 300  
0.1  
0.2  
0.5  
1
2
5
10  
20 30 50  
SINGLE PULSE TIME (SEC)  
V
, DRAIN-SOURCE VOLTAGE (V)  
DS  
Figure 10. Single Pulse Maximum Power  
Dissipation.  
Figure 9. Maximum Safe Operating Area.  
1
D = 0.5  
0.5  
0.2  
0.1  
0.2  
0.1  
R
(t) = r(t) * R  
JA  
q
JA  
q
R
= See Note 1c  
JA  
q
0.05  
0.05  
0.02  
0.01  
P(pk)  
0.02  
0.01  
t
1
t
Single Pulse  
0.001  
2
0.005  
T
- T = P * R  
(t)  
JA  
J
A
q
0.002  
0.001  
Duty Cycle, D = t / t  
1
2
0.0001  
0.01  
0.1  
, TIME (sec)  
1
10  
100  
300  
t
1
Figure 11. Transient Thermal Response Curve.  
Note: Thermal characterization performed using the conditions described in note 1c.  
Transient thermal response will change depending on the circuit board design.  
FDT459NRev.C  
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UltraFETâ  
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This datasheet contains the design specifications for  
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This datasheet contains preliminary data, and  
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Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
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Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. H4  
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