FDT86113LZ [ONSEMI]
N 沟道 Power Trench® MOSFET 100V,3.3A,100mΩ;型号: | FDT86113LZ |
厂家: | ONSEMI |
描述: | N 沟道 Power Trench® MOSFET 100V,3.3A,100mΩ PC 开关 光电二极管 晶体管 |
文件: | 总8页 (文件大小:269K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – N-Channel,
POWERTRENCH)
D
100 V, 3.3 A, 100 mW
S
D
G
FDT86113LZ
SOT−223
CASE 318H
General Description
This N−Channel logic Level MOSFET is produced using onsemi’s
advanced POWERTRENCH process that has been special tailored to
minimize the on−state resistance and yet maintain superior switching
performance. G−S zener has been added to enhance ESD voltage
level.
MARKING DIAGRAM
AYW
113LZG
G
Features
• Max r
• Max r
= 100 mW at V = 10 V, I = 3.3 A
GS D
DS(on)
DS(on)
1
= 145 mW at V = 4.5 V, I = 2.7 A
GS
D
A
Y
W
= Assembly Location
= Year
= Work Week
• High Performance Trench Technology for Extremely Low r
DS(on)
• High Power and Current Handling Capability in a Widely Used
Surface Mount Package
113LZ = Specific Device Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
• HBM ESD Protection Level > 3 kV Typical (Note 4)
• 100% UIL Tested
• This Device is Pb−Free and Halide Free
PIN ASSIGNMENT
D
Applications
• DC − DC Switch
Specifications
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Drain to Source Voltage
Ratings
100
20
Unit
V
V
DS
V
GS
Gate to Source Voltage
Drain Current
V
G
S
D
I
D
−Continuous
−Pulsed
3.3
A
12
E
Single Pulse Avalanche Energy (Note 3)
Power Dissipation
T = 25°C (Note 1a)
9
mJ
W
AS
ORDERING INFORMATION
See detailed ordering and shipping information on page 6
of this data sheet.
P
2.2
D
A
T = 25°C (Note 1b)
A
1.0
T , T
Operating and Storage Junction
Temperature Range
−55 to +150 °C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
August, 2022 − Rev. 2
FDT86113LZ/D
FDT86113LZ
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings
12
Unit
R
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient (Note 1a)
_C/W
q
JC
JA
R
55
q
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
100
V
DSS
D
GS
Breakdown Voltage Temperature
Coefficient
= 250 mA,Referenced to 25°C
71
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 80 V, V = 0 V
1
mA
mA
DSS
GSS
DS
GS
I
=
20 V, V = 0 V
10
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 250 mA
1.0
1.7
–5
2.5
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage
Temperature Coefficient
= 250 mA, Referenced to 25°C
mV/°C
DVGS(th)
DTJ
D
r
Static Drain to Source On Resistance
Forward Transconductance
V
GS
V
GS
V
GS
V
DS
= 10 V, I = 3.3 A
75
95
140
8
100
145
189
mW
DS(on)
D
= 4.5 V, I = 2.7 A
D
= 10 V, I = 3.3 A, T = 125°C
D
J
g
FS
= 10 V, I = 3.3 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 50 V, V = 0 V, f = 1 MHz
234
46
315
65
5
pF
pF
pF
iss
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
3.1
rss
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Rise Time
V
= 50 V, I = 3.3 A, V = 10 V,
GEN
3.8
1.3
10
10
10
ns
ns
d(on)
DD
D
GS
R
= 6 W
t
r
t
Turn−Off Delay Time
Fall Time
20
ns
d(off)
t
f
1.5
4.1
2.3
0.68
0.85
10
ns
Q
Total Gate Charge
V
GS
V
GS
V
DD
= 0 V to 10 V, V = 50 V, I = 3.3 A
6.8
3.9
nC
nC
nC
nC
g
DD
D
= 0 V to 5 V, V = 50 V, I = 3.3 A
DD
D
Q
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
= 50 V, I = 3.3 A
D
gs
Q
gd
DRAIN−SOURCE DIODE CHARACTERISTICS
V
SD
Source to Drain Diode Forward
Voltage
V
V
= 0 V, I = 3.3 A (Note 2)
0.86
0.77
1.3
1.2
V
GS
S
= 0 V, I = 1.0 A (Note 2)
GS
S
t
Reverse Recovery Time
I = 3.3 A, di/dt = 100 A/ms
F
31
21
49
34
ns
rr
Q
Reverse Recovery Charge
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
www.onsemi.com
2
FDT86113LZ
NOTES:
1. R
is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
q
JA
mounting surface of the drain pins.
R
is guaranteed by design while R
is determined by the user’s board design.
q
q
JA
JC
2
a. 55°C/W when mounted on a 1 in pad
b. 118°C/W when mounted on a minimum
pad of 2 oz copper
of 2 oz copper
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. Starting T = 25°C, L = 0.3 mH, I = 8 A, V = 90 V, V = 10 V.
J
AS
DD
GS
4. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
www.onsemi.com
3
FDT86113LZ
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
12
5
V
V
V
= 10 V
= 4.5 V
= 4.0 V
GS
GS
GS
V
GS
= 3.0 V
4
3
2
9
6
V
GS
= 3.5 V
V
= 3.5 V
= 3.0 V
GS
V
GS
= 4.0 V
V
GS
3
0
1
0
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
V
GS
= 4.5 V
V
GS
= 10 V
6
4
5
0
3
9
12
1
2
3
0
I , Drain Current (A)
D
V
DS
, Drain to Source Voltage (V)
Figure 1. On Region Characteristics
Figure 2. Normalized On−Resistance vs.
Drain Current and Gate Voltage
500
400
300
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
I
V
= 3.3 A
= 10 V
I
D
= 3.3 A
D
GS
200
100
T = 125°C
J
T = 25°C
J
0
−75 −50 −25
0
25
50
75
100 125 150
2
4
6
8
10
V
GS
, Gate to Source Voltage (V)
T , Junction Temperature (5C)
J
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure 4. On−Resistance vs. Gate to Source
Voltage
20
10
1
12
V
GS
= 0 V
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
T = 150°C
J
9
6
V
DS
= 5 V
T = 25°C
J
T = 150°C
J
0.1
T = 25°C
J
3
0
0.01
T = −55°C
J
T = −55°C
J
0.001
3
0.2
0.4
0.6
0.8
1.0
1.2
1
2
4
5
V
GS
, Gate to Source Voltage (V)
V
SD
, Body Diode Forward Voltage (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
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4
FDT86113LZ
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
400
10
8
I
D
= 3.3 A
V
DD
= 25 V
C
iss
100
V
DD
= 50 V
6
C
C
oss
rss
V
DD
= 75 V
4
10
0
2
0
f = 1 MHz
GS
V
= 0 V
0
2
0.1
1
10
100
1
3
4
5
V
DS
, Drain to Source Voltage (V)
Q , Gate Charge (nC)
g
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to Source Voltage
−1
7
6
5
4
3
2
10
V
DS
= 0 V
−2
−3
−4
−5
−6
−7
−8
−9
10
10
10
10
10
10
10
10
T = 25°C
J
T = 125°C
J
T = 100°C
J
T = 25°C
J
T = 125°C
J
−10
1
10
0
0.01
0.1
2
5
10
15
20
25
30
35
1
V
GS
, Gate to Source Voltage (V)
t
, Time in Avalanche (ms)
AV
Figure 9. Unclamped Inductive Switching
Capability
Figure 10. Gate Leakage Current vs
Gate to Source Voltage
20
10
8
6
4
2
100 ms
V
= 10 V
GS
1
1 ms
This Area is
Limited by Package
10 ms
Limited by r
DS(on)
100 ms
V
= 4.5 V
GS
0.1
Single Pulse
T = Max Rated
1 s
J
R
R
= 12°C/W
= 118°C/W
q
JC
q
JA
10 s
DC
T = 25°C
A
0.01
0
25
50
75
100
125
150
0.1
1
10
100
400
V
DS
, Drain to Source Voltage (V)
T , Case Temperature (5C)
C
Figure 11. Maximum Continuous Drain
Current vs Case Temperature
Figure 12. Forward Bias Safe Operating Area
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5
FDT86113LZ
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
300
100
10
Single pulse
= 118°C/W
R
q
JA
T = 25°C
A
1
0.5
10
−4
−3
−2
−1
10
10
10
t, Pulse Width (s)
1
10
100
1000
Figure 13. Single Pulse Maximum Power Dissipation
2
1
Duty Cycle − Descending Order
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
0.01
Single pulse
Notes:
Duty Factor: D = t /t
R
= 118°C/W
q
JA
1
2
Peak T = P
x Z
x R
+ T
JA A
q
q
J
DM
JA
0.001
−4
−3
−2
−1
10
10
10
10
1
10
100
1000
t, Rectangular Pulse Duration (s)
Figure 14. Junction−to−Ambient Transient Thermal Response Curve
ORDERING INFORMATION
Device
†
Device Marking
Package Type
Shipping
FDT86113LZ
113LZ
SOT−223 (Pb−Free)
4000 units / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
www.onsemi.com
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−223
CASE 318H
ISSUE B
DATE 13 MAY 2020
SCALE 2:1
A
Y
W
= Assembly Location
= Year
= Work Week
GENERIC
MARKING DIAGRAM*
XXXXX = Specific Device Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
AYW
XXXXXG
G
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
1
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASH70634A
SOT−223
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
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