FFG1040UC003X [ONSEMI]
电池计量仪，单电池;
| 型号： | FFG1040UC003X |
| 厂家： | 
ONSEMI |
| 描述： | 电池计量仪，单电池 电池 |
| 文件： | 总28页 (文件大小：1218K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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July 2016
FFG1040UC003X
Single-Cell Fuel Gauge
Description
Features
The FFG1040 fuel gauge is a very accurate SOC
reporting gauge designed to be used with cell phones,
tablets and other portable devices. It uses a proprietary
algorithm that tracks the battery to accurately report the
Relative State-of-Charge (RSOC). The FFG1040 also
reports User State-of-Charge (USOC), which is an
adjusted RSOC value that is designed to be intuitive to
the end user. The FFG1040 works with 1sXp (multiple
.
.
.
Optional Battery Characterization Supported
Typical Relative SOC Error ≈ 1%
Support RSENSE down to 3 mΩ to Reduce System
Loss
.
Low Power: <3 µA Shutdown Current
100 µA Active Current
Integrated I2C Slave
parallel) battery configurations.
.
.
The FFG1040 includes an integrated temperature
sensor that can be configured to read temperature from
an external thermistor. The FFG1040 algorithm uses
battery voltage, current and temperature to provide the
Interrupt Pin to Alert the Host Processor of System
Events (e.g. Low Battery, Low SOC)
.
Capable of measuring both on-die and battery pack
temperature using external thermistor
most accurate State-of-Charge to
a
user. The
temperature readings are accessible via I2C for other
system level decision.
.
.
.
Host Side or Battery Pack Gauging Capable
I2C relay Master to Support Secondary Slave
In addition to RSOC & USOC, the FFG1040 also reports
battery voltage, current, capacity, cycle count and
battery resistance.
The FFG1040 has the unique capability to relay I2C
commands to a secondary slave device.
Autonomous control of pack side FFG3105 battery
monitor and ID with configurable auto polling
Configurable I2C Inactivity Monitor for Auto
Shutdown
.
.
When used in autonomous mode the FFG1040 can
directly control the FFG3105 pack side monitor and ID
device and report the temperature and cell voltage
information directly from the battery pack.
12-ball Chip Scale Package (WLCSP)
Applications
.
.
.
Cell Phones
Mobile Devices
Tablets
The FFG1040 utilizes a 3 x 4 ball, 0.5 mm pitch,
WLCSP with nominal dimensions of 1.51 x 1.96 mm.
Ordering Information
Operating
Temperature Range
Packing
Part Number
Package
Method
FFG1040UC003X
-40 to 85°C
1.51 x 1.96 mm, 12-Ball CSP, 0.5 mm Ball Pitch
Tape and Reel
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
Ball Map
VBAT
TBAT
SRP
SRP
TBAT
VBAT
A1
A3
A2
A2
A1
A3
VLDO
TBIAS
SRN
SRN
TBIAS
VLDO
B1
B2
B3
B3
B2
B1
SDA
SCL
DGND
DGND
SCL
SDA
C1
C2
C3
C3
C2
C1
INT_N
RMSCL RMSDA
RMSDA RMSCL
D3
INT_N
D1
D2
D3
D2
D1
TOP VIEW
BOTTOM VIEW
Ball Assignments
Figure 1.
Ball Descriptions
Name
Position
Type
Description
Battery positive voltage input.
VBAT
A1
Power
Thermistor sense circuit bias resistor output. RTN should be the same
value as the thermistor at room temperature. This pin should be left
floating (not connected) if the NTC feature is not used. This pin should
not be loaded with more than 1 nF of capacitance.
TBIAS
B2
Analog Output
DGND
AGND/ SRN
SRP
C3
B3
A3
Digital Ground Ground
Analog Ground Analog Ground and battery sense resistor negative input
Analog Input Sense resistor connection to negative battery terminal
Battery thermistor input. If the NTC feature is not used, this pin should
be connected to GND.
TBAT
INT_N
SCL
A2
D1
C2
C1
Analog Input
Open Drain
Interrupt output pin, LOW asserted. This pin should be connected to
Digital Output the VDD_IO through a pull-up resistor.
Open Drain
Digital I/O
I2C clock input pin. This pin should be connected to the VDD_IO
through a pull-up resistor.
I2C data I/O pin. This pin should be connected to the VDD_IO through
a pull-up resistor.
Open Drain
Digital I/O
SDA
Internal LDO voltage. An external decoupling capacitor of at least
0.1 µF should be connected between VLDO and GND. No external
load should be connected to this pin.
VLDO
B1
Power
Open Drain
Digital I/O
I2C Relay Master SCL - RMSCL. This pin should be connected to the
VBAT through a pull-up resistor.
I2C Relay Master SDA - RMSDA. This pin should be connected to the
VBAT through a pull-up resistor.
RMSCL
RMSDA
D2
D3
Open Drain
Digital I/O
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
Unit
VBAT
VSRP
VLDO
VGND
VI/O
Positive Battery Supply Voltages
VGND - 0.5
VGND - 0.5
VGND - 0.5
VBAT - 6.0
VDGND - 0.5
VSRP - 0.5
-40
VGND + 6.0
VGND + 2.0
VGND + 2.0
VBAT + 0.5
VDGND + 6.0
VTBIAS + 0.5
+85
V
V
Negative Battery Supply Voltages
Positive Core Digital Supply Voltages
Negative Analog Supply Voltage
V
V
All Digital Input / Output Signals
V
VTBAT
TA
Temperature Bridge Input Voltage
Operating Free-air Temperature
V
°C
°C
°C
°C
V
TJ|MAX
TSTG
TL
Maximum Junction Temperature
-40
+150
Storage Temperature Range
-65
+150
Lead Soldering Temperature, 10 Seconds
Human-Body Model (HBM-JESD22-A114), All Pins
Charged Device Model (CDM-JESD22-C101)
+260
2000
500
15
8
V
ESD
Air Gap, VBAT, TBAT
IEC 61000-4-2 System ESD(1)
kV
kV
Contact, VBAT, TBAT
Note:
1. Testing is performed with a TVS device.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings. The recommended operating conditions
assume the following: VBAT = 2.5 V to 4.5 V, VI/O = 1.8 V to 4.5 V, TA = -40°C to 85°C, unless otherwise noted.
Symbol
Parameter
Min.
Max.
Unit
VBAT
VSNP
Battery Supply Voltage(2)
2.5
4.5
V
V
Sense Resistor Input Voltage
VAGND – 0.052 VAGND + 0.052
VTBAT
VPU
Thermistor Bridge Input Voltage
VTBIAS/2 - 0.5
VTBIAS/2 + 0.5
3.63
V
I2C Pull-up Voltage
1.62
0.4
90
V
VBAT
Battery Supply Voltage Slew Rate
External LDO Decoupling Capacitor between VLDO and DGND
TBIAS Reference Decoupling Capacitor
TBAT filter Capacitor
V/ms
nF
nF
nF
mΩ
mV
kΩ
CVLDO
CTBIAS
CTBAT
RSENSE
110
520
250
20
420
200
3
External Sense Resistor between SRP and AGND(3)
VI_RANGE Current Sense Voltage Range
-51.2
1.5
+51.2
100
RTBIAS
Battery Thermistor Bias Resistance(4)
I2C Pull up Resistor to VPU (SDA, SCL, INT_N, RMSCL,
RMSDA)
RI2CPU
2
20
kΩ
TA
TJ
Operating Free-air Temperature
Operating Junction Temperature
-40
-40
+85
+85
°C
°C
Notes:
2. VBAT can tolerate ±200 mV system switching noise transients which are less than 50 μs in duration.
3. The value of the RSENSE resistor should be chosen such that the maximum differential voltage across the resistor
is less than 51 mV. This should include the voltage created by any peak currents.
4. A nominal value of RTBIAS ≥ 10 kΩ is recommended to minimize thermistor temperature measurement current.
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
3
DC Electrical Characteristics
The Recommended Operating Conditions for DC Electrical Characteristics assume VBAT = 2.5 V to 4.5 V and
TA = -20°C to 70°C, unless otherwise noted. Typical values are at TA = 25°C, VBAT = 3.8 V, VPU = 1.8 V. Min./Max.
values are guaranteed by design and/or characterization for process variations and the temperature range of TA = -
20°C to 70°C.
Symbol
VLDO
IIN
Parameter
Conditions
Min.
Typ.
1.8
±1
Max.
Unit
V
VBAT = 2.5 to 4.5 V,
CVLDO = 100 nF
LDO Output Voltage
1.7
1.9
Input Leakage Current on Digital VBAT = 2.5 to 4.5 V,
µA
µA
I/O pins
0 ≤VIN ≤ VBAT
VBAT = 0 VIN or VOUT =
4.5 V
IOFF
Power-Off IO Leakage Current
±1
Shutdown Mode Average
Current
2.6
72
Rest/Off/Hibernate Mode
Average Current
ICC
VIN = VBAT or GND
µA
Active Mode Average Current(5)
Autonomous Master(5)
101
397
SCL, SDA, INT_N Pins (TA = -40°C to 85°C)
VIH
VIL
Input High Voltage(6)
Input Low Voltage(6)
1.1
VPU+0.5
0.65
0.4
V
V
-0.50
IOL = 3 mA, VPU > 2 V
IOL = 2 mA, VPU ≤ 2 V
VOL
Output Low Voltage
V
0.2
Input Current of SDA and
SCLPins
0.1 x VBAT < VIN < 0.9 x
VBAT
IIN
CI
-10
10
10
µA
pF
Capacitance of SDA and
SCLPins (5)
RMSCL and RMSDA Pins (TA = -40°C to 85°C)
0.65 x
VBAT
VIH
Input High Voltage
VBAT
V
0.35 x
VBAT
VIL
Input Low Voltage
Output Low Voltage
VDGND
V
V
VOL
Typical 1 mA
0.4
10
10
0.1 x VBAT < VIN < 0.9 x
VBAT
IIN
CI
Input Current of RMSDA Pin
Capacitance of RMSDAPin(5)
-10
µA
pF
Continued on the following page…
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
4
DC Electrical Characteristics (Continued)
The Recommended Operating Conditions for DC Electrical Characteristics assume VBAT = 2.5 V to 4.5 V and
TA = -20°C to 70°C, unless otherwise noted. Typical values are at TA = 25°C, VBAT = 3.8 V, VPU = 1.8 V. Min./Max.
values are guaranteed by design and/or characterization for process variations and the temperature range of TA = -
20°C to 70°C.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
PGA/ADC Characteristics
IGERR
Current Sense Gain Error
Voltage Sense Gain Error
-1.0
1.0
%
VGERR
-0.85
0.85
Thermistor Characteristics
TA = +25°C
TA = +0°C(5)
-2
-3
+2
+3
TDIE
Accuracy(11)
TA = +50°C(5)
-3
+3
°C
(5)
TA = -40°C (TMIN
)
-4
+4
(5)
TA = +85°C (TMAX
)
-4
+4
TBATOFF TBAT Amplifier Offset Error
TBATGERR TBAT Amplifier Gain Error
TBATLSB ADC TBAT Measurement LSB
-4.0
-0.75
+4.0
+0.75
mV
%
TA = -30 to +85°C
31.2
µV
Notes:
5. Guaranteed by design or characterization.
6. SCL, SDA only.
7. VIH(max) = VPU + 0.5 V or VBAT whichever is lower.
8. It is assumed that the SCL, and SDA pins are open drain with external pull-ups resistors tied to an external
supply VPU
.
9. VIH and VIL have been chosen to be fully compliant to I2C specification at VPU = 1.8 V ± 10%.
At 2.25V ≤ VPU ≤ 3.63 V the VIL(max) provides > 200 mV on noise margin to the required VOL(max) of the
transmitter.
10. I2C standard specifies VOL(max) for VPU ≤ 2.0 V to be 0.2 x VPU
.
11. Accuracy (expressed in °C) = the difference between the FFG1040 output temperature and the measured
temperature.
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
5
AC Electrical Characteristics (I2C Controller SDA, SCL)
The AC electrical characteristics assume VBAT = 2.5 V to 4.5 V and TA = -40°C to 85°C, unless otherwise noted.
Min./Max. values are guaranteed by design and/or characterization for process variations and the temperature range
of TA = -40°C to 85°C.
Fast Mode
Symbol
Parameter
Min.
Max.
Unit
fSCL
SCL Clock Frequency
0
0.6
1.3(12)
400
kHz
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
µs
µs
ns
tHD;STA Hold Time (Repeated) Start Condition
tLOW
tHIGH
Low Period of SCL Clock
High Period of SCL Clock
0.6
tSU;STA Set-up Time for Repeated Start Condition
tHD;DAT Data Hold Time (see Figure 11)
tSU;DAT Data Set-up Time (see Figure 11)
0.6
0
0.9
100(13)
tPS
tPH
tr
Set-up Time Required by SDA Input Buffer (Receiving Data)
Out Delay Required by SDA Output Buffer (Transmitting Data)
Rise Time of SDA and SCL Signals
0
300
(14,17)
20+0.1Cb
300
300
(14,17)
tf
Fall Time of SDA and SCL Signals
20+0.1Cb
tSU;STO Set-up Time for Stop Condition
0.6
1.3
0
tBUF
tSP
Bus Free Time between a Stop and Start Conditions
Pulse Width of Spikes that Must Be Suppressed by the Input Filter
50
Notes:
12. The FFG1040 can accept clock signals with tLOW as low as 1.1 µs, provided that the received SDA signal
tHD;DAT+ tr/f ≤ 1.1 µs. The FFG1040 features a 0 ns SDA input set-up time; therefore, this parameter is not
included in the above equation.
13. A Fast-Mode I2C Bus® device can be used in a Standard-Mode I2C bus system, but the requirement that
t
SU;DAT ≥ 250 ns must be met. This is the case if the device does not stretch the LOW period of the SCL signal. If
a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tr_max +
tSU;DAT = 1000 + 250 = 1250 ns (according to the Standard-Mode I2C Bus specification) before the SCL line is
released.
14. Cb equals the total capacitance of one bus line in pf. If mixed with High-Speed Mode devices, faster fall times
are allowed according to the I2C specification.
15. The FFG1040 ensures that the SDA signal out must coincide with SCL low for worst-case SCL tf max. time of
300 ns. This requirement prevents data loss by preventing SDA-out transitions during the undefined region of the
falling edge of SCL. Consequently, the FFG1040 fulfills the following requirement from the I2C specification
(page 77, Note 2): “A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to
the VIHmin of the SCL signal) to bridge the undefined region of the falling edge of SCL.”
16. FFG1040 I2C slave is fully compliant the NXP(Phillips) I2C specification, Rev. 0.3 UM10204 (2007) for both
Standard Mode and Fast Mode.
17. The FFG1040 does not support 1 Mbps/s Fast Mode Plus or 3.4 Mbits/s High Speed Mode.
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
6
System Applications Diagram
WALL ADAPTER
SCL
BATTERY SDA
CHARGER
SCL
SDA
BAT
VLDO
CVLDO
APPLICATION
PROCESSOR
PACK+
SCL
VBAT
RMSCL
INT_N
FFG3105
BATTERY MONITOR
SDA
FFG1040
RMSDA
TBIAS
FUEL GAUGE
BATTERY PACK
RTBIAS
THRM
TBAT
SRP
PACK-
DGND
AGND/SRN
RSENSE
Figure 2.
Applications Diagram
Functional Description
Overview
Current Monitoring
The FFG1040 uses an Analog-to-Digital Converter
(ADC) to monitor the battery terminal voltage, battery
current, and temperature to accurately provide RSOC
and USOC values. With only general information
provided about the selected batteries, the FFG1040
gives accurate results. The FFG1040 tracks and
compensates for battery aging effects. This information
is used by a proprietary prognostication algorithm to
automatically compensate the SOC estimation. The
FFG1040 also provides a low SOC and Zero SOC alert
using the host interrupt pin. The Low_SOC_Alarm level
is programmable as a function of the percentage of
SOC. The FFG1040 has user programmable low-
voltage, and over and under-temperature thresholds.
When these limits are exceeded these events are
reported to the host system using the interrupt pin.
The FFG1040 uses differential sensing and an external
sense resistor to monitor the current flowing in and out
of the battery. Coulomb counting is performed using the
highly accurate, digitally filtered ADC output and internal
time base.
Relative State-of-Charge (RSOC) Error
Typical RSOC errors are < ±1%. The FFG1040 provides
RSOC reporting error of less than ±1% while tracking
actual load profiles.
Device Reset
The FFG1040 can be reset by the host processor using
an I2C write command to a register. Upon this change,
the FFG1040 is reset and all register values return to
default values. In this case, the fg_rdy_for_config_int
bit is set to 1 as soon as the reset sequence completes.
Forcing it into SHUTDOWN can also reset the fuel
gauge. See description of Mode below. Finally removing
and reconnecting the VBAT supply can reset the
device. Waking from reset is described below.
Voltage Monitoring
The integrated ADC allows battery terminal voltage
monitoring with a high degree of accuracy (< 1% error).
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
7
Power-Up, Leaving Reset or Leaving
Shutdown
After Gauging is Started
After completing the startup and configuration sequence
the only registers that should be modified are the
FG_RUNTIME_INPUT_CONFIG,
FG_BATTERY_TEMP_RUNTIME_INPUT,
SOC_INTERRUPT_MASKS,
SOC_INTERRUPT_CLRS, and the SOC_MODE
registers. All other registers should remain unchanged
as they were programmed during device configuration.
Once gauging has started performing writes to registers,
0x20 to 0x3F are disabled, Writes to the reserved FG_
registers are also ignored while gauging. These
registers cannot be updated until gauging has stopped.
Upon receiving a valid Vbat supply or a device reset, the
FFG1040 immediately powers the VBAT portion of the
design and enter the SHUTDOWN state where it can
monitor the I2C interface. The Host must wake up the fuel
gauge by addressing it via I2C. The fuel gauge then
wakes up and sets the fg_rdy_for_config_int bit in the
SOC_INTERRUPTS register and the fuel gauge signals
the host with an interrupt. The system driver can then use
I2C commands to configure the fuel gauge registers.
Once the registers have been configured the host writes a
bit in the SOC_MODE register and the FFG1040 will start
fuel gauging. The FFG1040 will then assert status in the
SOC_STATUS register to indicate that it is fuel gauging.
Key
User installs battery,
resets device, or a
shutdown command is
issued
System Action
FFG1040
Action
FFG1040 in
Shutdown
Power Mode
Host addresses the Fuel
Gauge I2C bus
FFG1040 wakes up,
fg_rdy_for_config bit set,
Interrupts host
Host configures the
FFG1040 and writes
fg_config_done bit in
SOC_MODE
FFG1040 start gauging
asserts fg_status bits to
2'b11 in SOC_STATUS
Figure 3.
Power Up and Configuration Sequence
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
8
Power Modes
Fuel Gauge SOC Reporting
State-of-Charge (SOC)
There are two types of SOC values reported by the fuel
gauge. They are the RSOC and a USOC. The Relative
SOC is accurate with respect to the present temperature
and load conditions. USOC filters out rapid or
unexpected changes in RSOC and adjusts RSOC to
make sense to an end user.
The FFG1040 chip has three configurable power modes.
The host system requests the device to enter a power
mode by writing bits in the SOC_MODE register.
Following is a brief description of each of these modes:
Active Power Mode (ACTIVE)
In the ACTIVE mode the FFG1040 is able to actively
monitor the battery voltage and current, run the
algorithm, and communicate status and results to the
system.
Relative SOC (RSOC)
RSOC takes into account the battery load or charge
current and the temperature to calculate the SOC as a
function of usable capacity. The FFG1040 tracks recent
battery usage to determine available capacity.
Hibernate Power Mode (HIBERNATE)
Registers can be accessed and read or written to in
HIBERNATE. The AFE is not powered up and the
FFG1040 processor is not clocking. During this mode
internal state is retained for memory and registers.
100% RSOC is reported during charging when the
conditions for end of charge have been reached. This is
when Vbat > (full charge voltage – margin), Ibat and Ibat
Average are both > 0, and < charge complete current.
Shutdown Power Mode (SHUTDOWN)
In SHUTDOWN, the FFG1040 is off. No fuel gauging or
monitoring is taking place and no registers can be read
or written in SHUTDOWN. In SHUTDOWN the internal
state of the memory and registers is not maintained.
Once in SHUTDOWN, the host can awaken the
FFG1040 with an I2C read addressing the FFG1040
device. The FFG1040 does not acknowledge the read,
but wakes up if VBAT is available and transitions to
ACTIVE. When this process is complete the FFG1040
interrupts the host processor letting it know that it is
awake and ready to be configured by setting the
fg_rdy_for_config_int bit in the SOC_INTERRUPTS
register. The fuel gauge then interrupts the host. See
Figure 3 above for configuration sequence.
0% RSOC is reached when the average battery terminal
voltage reaches the shutdown voltage. The impact of
the system series resistances are also accounted for
when this condition is determined
User SOC (USOC)
USOC is a filtered, rule based value. USOC filters RSOC
so the results make sense to an end user. The USOC
reported by the fuel gauge exhibits monotonic behavior
during its charge or discharge trajectory as long as the
sign of the average current flow remains constant.
For example: without a charger attached, the reported
SOC cannot increase. User SOC rules are configurable.
The following are the default set of rules governing
USOC reporting:
When no charger is attached the phone status is
discharging and the User SOC will never increase.
Abrupt changes in environmental and load conditions
will not result in abrupt changes in USOC. USOC
outputs cannot change more than the values
programmed in the FG_USOC_CHG_SLEW_LIMIT and
FG_USOC_DISCHG_SLEW_LIMIT.
1. 100% USOC is reported as a scaled value of
RSOC where the upper bound is defined as 100%
RSOC - FG_SOC_FS_DELTA. For example if
FG_SOC_FS_DELTA=2% then the USOC=100%
when RSOC >=98%.
2. When a charger is removed USOC will decrease
proportionally to the load even if the RSOC level
exceeds the USOC 100% threshold.
3. 0% USOC is the lower bound and is defined by
the same rules as 0% RSOC.
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
9
Description of Status, Alarms and Interrupts
The following status bits and alarms appear in the
FG_STATUS register and provide the host system with
status of the battery management system.
High SOC Alarm
The High SOC alarm is set when the SOC has risen to
or above the High SOC Threshold level in the
FG_HIGH_SOC_THRESH register. It is cleared when
the SOC has fallen 1% or more below the High SOC
Threshold level. The SOC compared to the threshold
can be the USOC or RSOC as determined by a bit in
the FG_CONFIG register. Entry into this alarm condition
Charger Present Status
Reports the charger attach status as provided by the
system driver via the runtime input.
Discharging Status
If the battery is discharging the discharging bit is set.
will
set
the
fg_high_soc_int
bit
in
the
SOC_INTERRUPTS register.
Low Voltage Alarm
Almost Full Alarm
The FFG1040 has a low voltage alarm which uses the
FG_LOW_VOLTAGE_SET register. This alarm is set
when the average measured battery terminal voltage
(FG_AVG_VOLTAGE) falls below the threshold set. The
alarm is cleared when the battery terminal voltage rises
above the value in the FG_LOW_VOLTAGE_CLEAR
register.
The Almost Full Alarm is set when the SOC approaches
the full condition. This is provided to help the system
know when the full condition is being approached. This
alarm is reported when the average voltage is above the
FG_FULL_VULTAGE and both the current and average
current are positive but below the charge termination
current configured in FG_I_CHG_COMPLETE plus
some margin.
This alarm generates an interrupt and sets the
fg_uv_int bit in the SOC_INTERRUPTS register.
Limit Check Alarm
Temperature Out of Range Alarms
The fuel gauge notifies the system if the temperature
exceeds the battery over-temperature or under-
temperature user-defined thresholds set in the
This alarm is set and the gauge function stopped when
any of the following exceed their specified bounds:
FG_VOLTAGE, FG_AVG_VOLTAGE, FG_CURRENT,
FG_AVG_CURRENT,
FG_TEMPERATURE,
FG_DIE_TEMPERATURE,
FG_FULL_CHARGE_CAPACITY_NOM,
FG_FULL_CHARGE_CAPACITY, and FG_R0_NOM
FG_BATTERY_TEMP_MAX
FG_BATTERY_TEMP_MIN
and
The
an
registers.
register provides
FG_TEMPERATURE
instantaneous value of the temperature as determined
by the source (external thermistor, on die temperature,
or host input) as specified in the FG_CONFIG register
and is used to trigger this alarm. This alarm generates
an interrupt and sets the fg_ot_int or fg_ut_int alarm in
the SOC_INTERRUPTS register depending on the
cause of the alarm.
Entry into this alarm condition will set the
fg_limit_check_int bit in the SOC_INTERRUPTS
register and the reason for the alarm is stored in
FG_SW_ERR_CODE. The gauge function is stopped
and the FFG1040 transitions into the HIBERNATE
power state when this alarm is asserted.
Battery Present Alarm
Zero SOC Alarm
The Battery Present Alarm reports the state of battery
presence as provided by the system driver via the
runtime input.
The Zero SOC alarm indicates that the battery has
reached zero SOC following a discharge. The alarm can
be triggered by either the RSOC or USOC value. Setting
a bit in the FG_CONFIG register chooses the reference
SOC value. This alarm generates an interrupt and sets
the fg_soc_zero_int bit in the SOC_INTERRUPTS
register.
Fuel Gauging Status
The Device Status bits indicate if the algorithm is in the
Device Active (11), Device Resting (10) or the Device
Off (01) state. The fuel gauge activity status is
determined by the values set in the FG_REST_TIME,
Low SOC Alarm
FG_REST_CURRENT,
and
FG_OFF_CURRENT
registers. Figure 4 describes how the fuel gauge
transitions between each of these states. (Note the
device must be ACTIVE Power Mode and Gauging must
be enabled before the algorithm can be started and thus
enter into any of these states). When the FFG1040
enters the Device Resting and Device Off states the
data acquisition rate of the gauge and the SOC
calculations are slowed to a lower rate.
The Low SOC alarm indicates that the battery has
reached the Low SOC threshold during discharge. This
alarm can be triggered by either the RSOC or USOC
value. The reference SOC value is chosen by setting a
bit in the FG_CONFG register. This threshold is defined
by the FG_LOW_SOC_THRESH register. The alarm
generates an interrupt and sets the fg_soc_Itset_int bit
in the SOC_INTERRUPTS register. During charge when
the SOC level exceeds the FG_LOW_SOC_THRESH
level the fg_soc_Itclr bit in the SOC_INTERRUPTS
register is set and a second interrupt is generated to
inform the host that the low SOC state no longer exists.
Watch Dog Timer (WDT)
Internal to the FFG1040 there is a watch dog timer that
tracks the progress of system and the fuel gauging
engine. If this progress is interrupted for any reason,
causing the internal the WDT to expire the fg_wdt_int
bit will be set in the SOC_INTERRUPTS register.
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
10
Interrupt Bits
The following interrupt bits are contained in the
SOC_INTERRUPTS register and reported to the host.
Battery Detection
FG_STATUS Bits
15:14 = 00
Bit 0 – fg_ot_int – Over-Temperature Interrupt
Bit 1 – fg_pack_commerr_int – Pack Comm Error Interrupt
Bit 2 – fg_uv_int – Under-Voltage Interrupt
Gauge started
Bit 3 – fg_high_soc_int – High SOC
Device Active
FG_STATUS Bits
15:14 = 11
Bit 4 – fg_ut_int – Under-Temperature Interrupt
Bit 5 – fg_heartbeat – Heart Beat Interrupt
FG_AVG_CURRENT ≤
FG_REST_CURRENT
for FG_REST_TIMER
FG_AVE_CURRENT >
FG_REST_CURRENT
Bit 6 – fg_limit_check – Limit Check Interrupt
Bit 7 – fg_soc_zero_int – Zero SOC Interrupt
Bit 8 – fg_soc_ltset_int – Low Threshold Set Interrupt
Bit 9 – fg_soc_ltclr_int – Low Threshold Clear Interrupt
Bit 10 – fg_soc_active_int – Active Interrupt
Device Resting
FG_STATUS Bits
15:14 = 10
FG_CURRENT ≤
FG_OFF_CURRENT
for FG_REST_TIMER
FG_CURRENT >
FG_OFF_CURRENT
Bit 11 – fg_rdy_for_config_int – Ready for Config Interrupt
Bit 12 – fg_wdt_int – Watch Dog Timer Interrupt
Bit 13 – fg_i2cmstr_int – I2C Master Interrupt
Bit 14 – fg_almost_full_int – Almost Full Interrupt
Bit 15 – fg_pack_voltage_int – Pack Voltage Interrupt
Device Off
FG_STATUS Bits
15:14 = 01
Figure 4.
Gauging Modes
Interrupt Operation
The INT_N pin is an active LOW-asserted, open-drain
output that requires an external pull-up resistor to VPU
Each interrupt bit has a corresponding mask bit and
clear bit in the SOC_INTERRUPT_MASKS and
SOC_INTERRUPT_CLRS registers respectively.
.
The FFG1040 uses this pin to signal an interrupt to the
processor or any external device when an event occurs.
For example: immediately after detecting a low battery
voltage, the FFG1040 writes the corresponding bit in the
SOC_INTERRUPTS register and asserts the INT_N pin
by pulling it LOW. The SOC_INTERRUPTS register bit
remains HIGH until the host processor writes a 1 to the
corresponding bit in the SOC_INTERRUPT_CLRS
register. The FFG1040 uses a „write 1 to clear‟ scheme.
Interrupts are edge-triggered events. The interrupt
output INT_N, once asserted, is held LOW until all the
interrupts are serviced and cleared by the external
processor. Interrupt signaling is asynchronous to the I2C
SCL line. All interrupts are by default enabled. Each
interrupt has a corresponding mask bit and clear bit in
the
SOC_INTERRUPT_MASKS
and
SOC_INTERRUPT_CLRS registers. The host system
may disable individual interrupts by writing the
corresponding mask bit for each interrupt in the
SOC_INTERRUPT_MASKS register.
In all, there are 16 interrupts with mask and clear bits.
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
11
Fuel Gauge Configurations and Features
Save and Restore Feature
Relay Master
The FFG1040 has a feature which improves fuel-
gauging startup performance immediately after
removing and reinserting the same battery. This feature
is called the „save and restore‟ feature and allows the
fuel gauge to resume gauging from where it left off prior
to battery removal, provided the same battery is
reinserted. If the system designer chooses to use this
feature, the host processor saves off the values in the
Save and Restore registers, 0x65-0x71 at some interval.
The recommended interval is once per 1% change in
SOC state or once every 10 minutes when the gauge is
in the Active Device state and once per hour when the
gauge is in the Resting device state. After each and
every fuel gauge reset the driver configures the fuel
gauge by writing the recently stored values from system
memory back into the fuel gauge Save and Restore
registers. When started, the fuel gauge algorithm
determines if the newly inserted battery is the same
battery that was most recently gauged. If so it uses the
restored values allowing the fuel gauge to benefit from
past learning to more accurately report the RSOC of the
reinserted battery. For systems with a captive battery,
the learned battery parameters can be restored by
setting a bit in the FG_CONFIG register before starting
the gauge.
In this mode the system level host, which controls the
FFG1040, can use a series of register to “relay” I2C read
and write commands to the relay master port. This port
contains its own Relay Master Serial Clock (RMSCL),
and Relay Master Serial Data (RMSDA). The system
host sends and receives data from a downstream
slave(s) connected to these two pins.
The relay master relies on the I2C_MSTR_ set of
registers. These registers are a subset of the registers
included in the FFG1040. The registers use the last
seven addresses of the register space (0xF9-0xFF).
Autonomous Master
In this mode, the FFG1040, utilizes its internal firmware
and controls the FFG3105 to read the battery cell
voltage and pack temperature. This is done to reduce
the system host involvement during critical times like
battery charging, where knowing the cell voltage and
temperature improve the charging process. The
FFG1040 will accept as configuration inputs a pack
alarm voltage, a pack polling rate voltage, a slow poll
rate interval in 50 ms steps, a fast poll rate interval in
50 ms steps, and a maximum battery temperature.
Once given a start signal, the FFG1040 I2C master
capability is used to trigger measurements by the
FFG3105 to read the voltage and temperature and
report them in output registers. If the voltage is below
the polling rate voltage then the next reading will occur
after the slow interval, otherwise it will occur after the
fast interval.
Temperature Sensing and Reporting
The FFG1040 has three possible methods to obtain
temperature information used by the fuel-gauging
algorithm. The first method is to measure an external
thermistor using the onboard ADC and the TBAT pin.
The FFG1040 supports connecting an external
thermistor and provides the appropriate bias voltage,
VTBIAS, from the TBIAS pin for the thermistor network.
The second method uses the fuel gauge‟s internal
temperature-sensing capability. In both of these cases,
the system can read the measured temperature from
the FG_TEMPERATURE register. The third method is
for the system to provide a temperature reading to the
fuel gauge by writing to the fuel gauge
FG_BATTERY_TEMP_RUNTIME_INPUT register.
Polling will continue until either;
a) A stop signal is given
b) The battery temperature exceeds the maximum
temperature
c) The battery voltage exceeds the alarm voltage
d) A communication error occurs on the I2C interface
between the FFG1040 and the FFG3105
e) The FFG3105 does not respond with a valid
temperature/voltage within 100 ms of the
measurement trigger.
While polling is active the host cannot trigger I2C relay
master transactions. Host writes to the I2C master
register space will corrupt on-going transactions. A
status bit is set to indicate to the host that automatic
polling is in progress and I2C Master functionality is not
currently available.
By default, the FFG1040 measures the internal
temperature using its onboard temperature sensor. It
measures and reports this value once every 10 seconds
in the “Device Active” state and once every 20 seconds
in the “Device Resting” state and uses this value as an
input to the fuel gauge algorithm. For batteries or
systems with a thermistor available, the FFG1040 can
measure temperature using the thermistor as requested
by setting the appropriate bit in the FG_CONFIG
register. Additionally, the thermistor Beta value must be
set in the FG_BATTERY_THERM_TEMPCO register, to
configure temperature calculation.
Upon termination of polling, an interrupt is set to indicate
polling ceased due to a voltage or temperature alarm,
and a second interrupt is set to indicate polling ceased
due to a communication error or FFG3105 timeout.
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.4
www.fairchildsemi.com
12
I2C Interface
The FFG1040‟s serial interface is compatible with
Standard and Fast I2C bus specifications. The
FFG1040‟s SCL line is an input and its SDA line is a bi-
directional open-drain output; it can only pull down the
bus when active. The SDA line only pulls LOW during
data reads and when signaling ACK. All data is shifted
in MSB (bit 7) first.
A transaction ends with a STOP condition, which is
defined as SDA transitioning from 0 to 1 with SCL
HIGH.
Slave Releases
Master Drives
tHD;STO
ACK(0) or
NACK(1)
SDA
SCL
The FFG1040UC003X uses power from the VBAT node
to power itself. When the battery is removed and the
VBAT node is pulled low, the fuel gauge will hold SDA,
SCL and INT_N low. Thus if the mobile device is
expected to operate from a charger even if the battery is
removed, it is recommended to connect the SDA and
SCL to a separate I2C bus and the INT_N pin to its own
GPI on the system processor. Please contact your
Fairchild representative for questions pertaining to
operation without a battery.
Figure 7.
STOP Bit
During a read from the FFG1040, the master issues a
Repeated Start after sending the register address and
before resending the slave address. The Repeated Start
is a 1-to-0 transition on SDA while SCL is HIGH.
Slave Releases
tSU;STA
tHD;STA
Slave Address
ACK(0) or
NACK(1)
SLADDR
MS Bit
SDA
SCL
The FFG1040 slave address in hex notation is
0x70 = 01110000; where the device is addressed
assuming a 0 LSB. This is the 7-bit slave address
followed by the read/write bit. To read from the device,
use 01110001, and to initiate a write, use 01110000.
Figure 8.
Repeated STOP Timing
I2C Slave Inactivity
Table 1. I2C Slave Address Byte
The FFG1040 contains an inactivity timer that monitors
Bit
7
6
5
4
3
2
1
0
the slave interface. If the time between I2C writes to the
device
exceeds
the
value
set
in
the
Value
0
1
1
1
0
0
0
R/W
FG_INACTIVITY_RESET_TIME the part will put itself
into the SHUTDOWN state. This feature acts like a
“keep alive” where the host system must do a write to
the FFG1040 to prevent it from going into shutdown.
Setting a bit in the FG_CONFIG register enables this
feature.
Other slave addresses can be accommodated upon
request. Contact your Fairchild representative.
Bus Timing
As shown in Figure 5, data is normally transferred when
SCL is LOW. Data is clocked in on the rising edge of
SCL. Typically, data transitions at or shortly after the
falling edge of SCL to allow ample time for the data to
set up before the next SCL rising edge.
A write to any register in the address range 0x40 to
0xFF is sufficient to reset the timer. It„s suggested that
the
FG_RUNTIME_INPUT_CONFIG
or
FG_RUNTIME_TEMPERATURE registers be used as
the registers to be written by the host as these are
normally run-time written registers. Reads from any
register or writes to any registers outside of the address
range 0x40 to 0xFF will not cause the timer to be reset,
so they do not count as I2C activity for this feature.
Data change allowed
SDA
TH
TSU
SCL
I2C Master
Figure 5.
Data Transfer Timing
The FFG1040 contains firmware that allows the device
to use the RMSCL and RMSDA pins to communicate
with external I2C slaves. This interface is mastered by
the FFG1040 in two different ways. The first, a more
general use is as a “Relay Master”. The second, the
FFG3105 specific mode is as an “Autonomous Master”.
The external system host can enable the FFG1040 to
use either of these modes and can control which mode
the FFG1040 is in.
Each bus transaction begins and ends with SDA and
SCL HIGH. A transaction begins with a START
condition, which is defined as SDA transitioning from 1
to 0 with SCL HIGH.
THD;STA
Slave Address
MS Bit
SDA
Refer to the FFG1040 Users Reference Manual for a
detailed description of this functionality.
SCL
Figure 6.
START Bit
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.4
www.fairchildsemi.com
13
I2C Read Write Procedures
Figure 9 and Figure 10 illustrate compatible I2C write and read sequences. Register addresses are one byte (8-bits)
and register data is 2 bytes (16-bits).
Figure 9.
I2C Write Sequence
Figure 10. I2C Read Sequence
Figure 11. Definition of Timing for Full-Speed Mode Devices on the I2C Bus
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
14
Register Information
The Fuel Gauge has registers that are used to configure it and provide information to an external host. These
registers are accessible to the host through the I2C slave controller and defined below. Any registers or bit fields
marked as RESERVED or reserved should be left at their default values and not modified.
Table 2. Register Map
Name
System on Chip (SoC) Registers
SOC_MODE
Address
Type
Description
0x00
0x01
0x0A
0x0B
R/W SoC Mode for power mode control
SOC_STATUS
RO
RO
SoC Status
SOC_INTERRUPTS
Interrupt Status
SOC_INTERRUPT_MASKS
R/W Interrupt Mask
R/W/S
SOC_INTERRUPT_CLRS
0x0C
Interrupt Clear
C
SOC_PART_ID
0x0F
0x2C
RO
Part ID
AFE_OSC_TRIM
R/W AFE Configuration
Fuel Gauge System Related Driver Configuration Registers
FG_CONFIG
0x40
0x42
R/W Configuration Options
FG_RSENSE_RESISTANCE
R/W Sense Resistor Value in Ohms
R/W Full OCV Voltage Level
FG_FULL_VOLTAGE
0x43
FG_VOLTAGE_SHUTDOWN
FG_BATTERY_THERM_TEMPCO_LSW/MSW
FG_VOFFSET_CORRECTION_LSW/MSW
FG_IOFFSET_CORRECTION_LSW/MSW
FG_PACK_ALARM_VOLTAGE
0x44
R/W System Shutdown Voltage
R/W Thermistor Temperature Coefficient
R/W AFE Voltage Correction Factor
R/W AFE Current Offset Correction Factor
R/W Pack Alarm Voltage (mV)
0x46-0x47
0x48-0x49
0x4A-0x4B
0x4C
Voltage threshold for determining pack poll
rate (mV)
FG_PACK_POLLRATE_VOLTAGE
0x4D
R/W
FG_RSERIES_ADJ_LSW/MSW
FG_REST_CURRENT
FG_REST_TIME
0x4E-0x4F
0x50
R/W Rsense Adjustment Factor
R/W Rest Current Threshold (mA)
R/W Min. duration to be considered at rest (s)
0x51
Current threshold used to determine if the
load is inactive (mA)
FG_OFF_CURRENT
0x52
R/W
FG_USOC_CHG_SLEW_LIMIT
FG_USOC_DISCHG_SLEW_LIMIT
FG_USOC_FS_DELTA
0x53
0x54
0x55
R/W USOC Slew Rate Limit during Charge
R/W USOC Slew Rate Limit during Discharge
R/W Full Scale Delta for 100% USOC Calc (%)
Set point for discharge scaling from full
charge (%)
FG_USOC_0ERR_PT
0x56
R/W
Continued on the following page…
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
15
Name
Address
Type
Description
Fuel Gauge Alarm Configuration Registers
FG_LOW_VOLTAGE_SET
FG_LOW_VOLTAGE_CLEAR
FG_HIGH_SOC_THRESH
FG_BATTERY_TEMP_MAX
FG_BATTERY_TEMP_MIN
FG_LOW_SOC_THRESH
Fuel Gauge Run Time Input Registers
FG_RUNTIME_INPUT_CONFIG
FG_BATTERY_TEMP_RUNTIME_INPUT
Fuel Gauge Output Registers
FG_STATUS
0x57
0x58
0x59
0x5A
0x5B
0x5C
R/W Low Voltage Alarm Set Threshold (mV)
R/W Low Voltage Alarm Clear Threshold (mV)
R/W High SOC Alarm Threshold (%)
R/W Max. Temperature Alarm Level (0.1°C)
R/W Min. Temperature Alarm Level (0.1°C)
R/W Threshold for Low SOC Alarm (%)
0x5D
0x5E
R/W Run Time Configuration Options
R/W Run Time Temperature Value Input (0.1°C)
0x5F
0x60
0x61
0x62
R/W(18) Output Status and Alarm bits
FG_CURRENT
R/W(18) Instantaneous Battery Current (mA)
R/W(18) Instantaneous Battery Voltage (mV)
R/W(18) Instantaneous Temperature (0.1°C)
FG_VOLTAGE
FG_TEMPERATURE
Full-charge Capacity at Current
R/W(18)
FG_FULL_CHARGE_CAPACITY
0x63
Temperature (mAh)
FG_FIRMWARE_REV
FG_CC
0x64
0x71
0xDB
0xF1
R/W(18) Firmware Revision
R/W(18) Coulomb count output
R/W(18)
FG_DIE_TEMPERATURE
FG_SW_ERR_CODE
Fuel Gauge Save and Restore Registers
FG_AVG_CURRENT
FG_AVG_VOLTAGE
FG_RSOC
Die Temperature
R/W(18) Software Error Codes for diagnostics
0x65
0x66
0x67
0x68
R/W(19) Average Battery Current (mA)
R/W(19) Average Battery Voltage (mV)
R/W(19) Relative State-of-Charge (%)
R/W(19) User State-of-Charge (%)
FG_USOC
Measured Full Charge Capacity at 25°C
(mAh)
FG_FULL_CHARGE_CAPACITY_NOM
0x6A
R/W(19)
FG_CYCLE_COUNT
0x6B
0x6C
R/W(19) Battery Cycle Counter
R/W(19) Measured Battery Resistance at 25°C
FG_R0_NOM
Fuel Gauge Driver Configured Algorithm Inputs
Nominal battery resistance seed value for
algorithm (mΩ)
FG_R0_INIT
0x72
0x73
R/W
Nominal battery capacity per manufacturer
(mAh)
FG_QCAPACITY_DESIGN
R/W
FG_ICHG_COMPLETE
0x74
0xCD
0xD0
0xE3
R/W Charge Current Complete (mA)
R/W Auto Shutdown Voltage Threshold (mV)
R/W Scaling Ratio for Design Capacity
R/W Max. RSOC Relaxation at Shutdown
Continued on the following page…
FG_AUTO_SD_VOLTAGE
FG_CAPEST_STARTING_RATIO
FG_RSOC_SD_CAP
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
16
Name
Address
Type
Description
Fuel Gauge Driver Configured Algorithm Inputs (Continued)
0x75-0xCC,
0xCE-0xCF,
0xD1-0xDA,
0xDC-0xE2
Algorithm configuration parameters
supplied by Fairchild for driver.
To be supplied by Fairchild
R/w
0xE4-0xF0
0xF2-0xF5,
Time between I2C writes to device before
inactivity reset if enabled (s)
FG_I2C_INACTIVE_RESET_TIME
FG_TYPICAL_LOAD
0xF6
0xF8
R/W
R/W
Load used for RSOC during Charging
(mA)
I2C_MSTR_CONTROL
I2C_MSTR_CONFIG
I2C_MSTR_STATUS
I2C_MSTR_DATA0
I2C_MSTR_DATA1
I2C_MSTR_DATA2
I2C_MSTR_DATA3
Notes:
0xF9
0xFA
0xFB
0xFC
0xFD
0xFE
0xFF
R/W
R/W
I2C Relay Master Control
I2C Relay Master Configuration
R/W(18) I2C Relay Master status
R/W
R/W
R/W
R/W
I2C Relay Master Data Byte 0
I2C Relay Master Data Byte 1
I2C Relay Master Data Byte 2
I2C Relay Master Data Byte 3
18. Device output register. Writes to this register have no effect on internal operation and values will be over-written
by the device normal operation.
19. Save and restore input/output register. Values should only be written to these registers before gauging is started.
After the gauge has been started writes to this register have no effect on internal operation, but values will be
over-written by the device normal operation.
Table 3. Register Type Description
Mnemonic
RO
Type
Read Only
Description
These registers are read only. Their values are
updated only by internal hardware
R/W
Read/Write
These registers can be written or read
These register bits self clear to a 1‟b0 after being
written 1‟b1.
R/W/SC
Read/Write/Self Clear
These registers should only be read. Attempting a
write may cause unpredictable behavior
R
Read
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
17
Detailed Interrupt and Alarm Register Definitions
Detailed bit descriptions for select registers are included in this section. For a complete description of all register bit
mappings, refer to the FFG1040 Users Reference Manual.
Interrupt Requests (SOC_INTERRUPTS)
Table 4. SoC Interrupts Register
SOC_INTERRUPTS (0x0A)
DataType = 16bit
Bit
Location
15
14
13
12
11
10
9
8
fg_pack_
voltage_int
fg_almost
_full_int
fg_i2cmstr
_int
fg_rdy_for
_config_int active_int
fg_
fg_soc_ltclr fg_soc_
Parameter
fg_wdt_int
_int
ltset_int
Default
Type
0
0
0
0
0
0
0
0
RO
RO
RO
RO
RO
RO
RO
RO
SOC_INTERRUPTS (0x0A)
Bit
Location
7
6
5
4
3
2
1
0
fg_limit_
check_int heartbeat_int
fg_
fg_high_
soc_int
Fg_pack_
commerr_int
Parameter fg_soc_zero_int
fg_ut_int
fg_uv_int
fg_ot_int
Default
Type
0
0
0
0
0
0
0
0
RO
RO
RO
RO
RO
RO
RO
RO
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
18
Bit(s)
Name
Description
Fuel Gauge Over-Temperature (OT) Interrupt
0 = cleared, 1 = Set when battery pack is over-temperature
0
fg_ot_int
Fuel Gauge Pack Communications Error Interrupt
0 – cleared, 1 – Set when I2C error using internal master
1
2
3
fg_pack_commerr_int
fg_uv_int
Fuel Gauge Under-Voltage (UV) Interrupt
0 = cleared, 1 = set when battery pack experiences under-voltage
Fuel Gauge High SOC Interrupt
0 = cleared, 1 = set when SOC meets or exceeds the alarm threshold
fg_high_soc_int
Fuel Gauge Under-Temperature (UT) Interrupt
4
fg_ut_int
0 – cleared, 1 = Set when battery pack is under-temperature
Description: This bit is set when an Under-Temperature Alarm is declared.
Fuel Gauge Heart Beat Interrupt
0 = cleared, 1 = set by fuel gauge firmware
5
6
7
fg_heartbeat_int
fg_limit_check_int
fg_soc_zero_int
Fuel Gauge Limit Check Interrupt
0 = cleared, 1 = set when limit check threshold is crossed.
Fuel Gauge Zero SOC Interrupt
0 = cleared, 1 = set by when Zero SOC alarm is declared
Fuel Gauge SOC Low Threshold Set Interrupt
0 = cleared, 1 = set when SOC has met or fallen below the FG low State-Of-
Charge threshold
8
9
fg_soc_ltset_int
fg_soc_ltclr_int
Fuel Gauge SOC Low Threshold Clear Interrupt
0 = cleared, 1 = set when SOC rises back above the FG Low State-Of-
Charge threshold
Fuel Gauge Active Interrupt
0 = cleared, 1 = set when fuel gauge is active.
10
11
12
13
14
15
fg_active_int
fg_rdy_for_config_int
fg_wdt_int
Fuel Gauge Ready for Configuration
0 = cleared, 1 = set when fuel gauge ready for configuration
Fuel Gauge Watch Dog Timer Interrupt
0 = cleared, 1 = set when fuel gauge WDT has expired
Fuel Gauge I2C Master Interrupt
0 = cleared. 1 = set when I2C master transaction completed
fg_i2cmstr_int
Fuel Gauge Almost Full Interrupt
0 = cleared, 1 = set when SOC Almost Full
fg_almost_full_int
fg_pack_voltage_int
Fuel Gauge Pack Voltage Interrupt
0 = cleared, 1 = set when pack voltage exceeds threshold
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
19
Interrupt Masks (SOC_INTERRUPT_MASKS)
Table 5. SoC Interrupt Masks Register
SOC_INTERRUPT_MASKS (0x0B)
Bit
DataType = 16bit
15
14
13
12
11
10
9
8
Location
fg_pack_
voltage_intm _full_intm
fg_almost
fg_i2cmstr
_intm
fg_wdt
_intm
fg_rdy_for fg_active fg_soc_ltclr fg_soc_
Parameter
_config_intm
_intm
_intm
ltset_intm
Default
Type
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
SOC_INTERRUPT_MASKS (0x0B)
Bit
Location
7
6
5
4
3
2
1
0
fg_soc_zero
_intm
fg_limit
fg_
fg_high
_soc_intm
fg_pack_
comer_intm _intm
fg_ot
Parameter
fg_ut_intm
fg_uv_intm
_check_intm heartbeat_intm
Default
Type
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit(s)
Name
Description
Fuel Gauge Over-Temperature (OT) Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
0
fg_ot_intm
fg_pack_commerr_intm
fg_uv_intm
Fuel Gauge Pack Communications Error Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
1
2
Fuel Gauge Under-Voltage (UT) Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
Fuel Gauge High SOC Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
3
fg_high_soc_intm
fg_ut_intm
Fuel Gauge Under-Temperature (UT) Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
4
Fuel Gauge Heart Beat Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
5
fg_heartbeat_intm
fg_limit_chk_intm
fg_soc_zero_intm
fg_soc_ltset_intm
fg_soc_ltclr_intm
fg_active_intm
Fuel Gauge Limit Check Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
6
Zero SOC Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
7
SOC Low Threshold Set Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
8
SOC Low Threshold Clear Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
9
Fuel Gauge Active Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
10
11
12
13
14
15
Fuel Gauge Ready for Config Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
fg_rdy_for_config_intm
fg_wdt_intm
Fuel Gauge Watch Dog Timer Interrupt Mask
0 = interrupt enabled, 1 = interrupt mask
I2C Master Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
fg_i2cmstr_intm
fg_almost_full_intm
fg_pack_voltage_intm
Fuel Gauge Almost Full Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
Fuel Gauge Pack Voltage Interrupt Mask
0 = interrupt enabled, 1 = interrupt masked
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
20
Interrupt Clears (SOC_INTERRUPT_CLRS)
Table 6. SoC Interrupt Clears Register
SOC_INTERRUPT_CLRS (0x0C)
DataType = 16bit
Bit
Location
15
14
13
12
11
10
9
8
fg_pack_
voltage_int_clr
fg_almost_ fg_i2cmstr fg_wdt_ fg_rdy_for_ fg_active fg_soc_ltclr fg_soc_
Parameter
full_int_clr
_int_clr
int_clr onfig_int_clr _int_clr
_int_clr ltset_int_clr
Default
Type
0
0
0
0
0
0
0
0
R/W/SC
R/W/SC
R/W/SC
R/W/SC
R/W/SC
R/W/SC
R/W/SC
R/W/SC
SOC_INTERRUPT_CLRS (0x0B)
Bit
Location
7
6
5
4
3
2
1
0
fg_soc_zero
_int_clr
fg_limit_
check_int_clr at_int_clr
fg_heartbe fg_ut_int fg_high_soc
fg_uv_ fg_pack_com fg_ot_
Parameter
_clr
_int_clr
int_clr
merr_int_clr
int_clr
Default
Type
0
0
0
0
0
0
0
0
R/W/SC
R/W/SC
R/W/SC
R/W/SC
R/W/SC
R/W/SC
R/W/SC
R/W/SC
Bit(s)
Name
Description
Fuel Gauge Over Temperature (OT) Interrupt Clear
0
fg_ot_int_clr
0 = no-operation, 1 = self clears itself and corresponding bit [0] in Reg. 0Ah
Fuel Gauge Pack Communications Error Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [2] in Reg. 0Ah
1
2
fg_pack_commerr_int_clr
fg_uv_int_clr
Fuel Gauge Under Voltage (UT) Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [2] in Reg. 0Ah
Fuel Gauge High SOC Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [3] in Reg. 0Ah
3
fg_high_soc_clr
Fuel Gauge Under Temperature (UT) Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [4] in Reg. 0Ah
4
fg_ut_int_clr
Fuel Gauge Heart Beat Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [5] in Reg. 0Ah
5
fg_heartbeat_int_clr
fg_limit_check_int_clr
fg_soc_zero_int_clr
fg_soc_ltset_int_clr
fg_soc_ltclr_int_clr
fg_active_int_clr
Fuel Gauge Limit Check Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [6] in Reg. 0Ah
6
Fuel Gauge Zero SOC Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [7] in Reg. 0Ah
7
Fuel Gauge SOC Low Threshold Set Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [8] in Reg. 0Ah
8
Fuel Gauge SOC Low Threshold Clear Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [9] in Reg. 0Ah
9
Fuel Gauge Active Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [10] in Reg. 0Ah
10
11
12
13
14
15
Fuel Gauge Ready for Config Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [11] in Reg. 0Ah
fg_rdy_for_config_clr
fg_wdt_int_clr
Fuel Gauge Watch Dog Timer Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [12] in Reg. 0Ah
I2C Master Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [13] in Reg. 0Ah
fg_i2cmstr_clr
Fuel Gauge Software Interrupt Clears
0 = no-operation, 1 = self clears itself and corresponding bit [14] in Reg. 0Ah
fg_almost_full_int_clr
fg_pack_voltage_int_clr
Fuel Gauge Pack Voltage Interrupt Clear
0 = no-operation, 1 = self clears itself and corresponding bit [15] in Reg. 0Ah
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
21
High SOC Alarm Threshold (FG_HIGH_SOC_THRESH)
Table 7. FG High SOC Alarm Threshold Register
FG_HIGH_SOC_THRESH (0x59)
DataType = Short (unsigned)
Bit Location
Parameter
Driver Default
Type
15
14
13
12
11
10
9
8
fg_high_soc_thresh[15:8]
0x00
R/W
FG_HIGH_SOC_THRESH (0x59)
Units = %
Bit Location
Parameter
7
6
5
4
3
2
1
0
fg_high_soc_thresh[7:0]
Driver Default
0x5A
R/W
Type
Note:
20. Driver Default: 90 (90%).
Battery Temperature Alarm Level Maximum (FG_BATTERY_TEMP_MAX)
Table 8. FG Battery Temperature Alarm Threshold Maximum Register
FG_BATTERY_TEMP_MAX (0x5A)
15 14 13
DataType = Short (unsigned)
Bit Location
Parameter
Driver Default
Type
12
11
10
9
8
fg_battery_temp_max[15:8]
0x02
R/W
FG_BATTERY_TEMP_MAX (0x5A)
Units = 0.1°C
Bit Location
Parameter
7
6
5
4
3
2
1
0
fg_battery_temp_max[7:0]
Driver Default
0x26
R/W
Type
Note:
21. Driver Default: 55°C.
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
22
Battery Temperature Alarm Level Minimum (FG_BATTERY_TEMP_MIN)
Table 9. FG Battery Temperature Alarm Threshold Maximum Register
FG_BATTERY_TEMP_MIN (0x5B)
15 14 13
DataType = Short (unsigned)
Bit Location
Parameter
Driver Default
Type
12
11
10
9
8
fg_battery_temp_min[15:8]
0x00
R/W
FG_BATTERY_TEMP_MIN (0x5B)
Units = 0.1°C
Bit Location
Parameter
7
6
5
4
3
2
1
0
fg_battery_temp_min[7:0]
Driver Default
0x00
R/W
Type
Note:
22. Driver Default: 0°C.
Low State-of-Charge Alarm Threshold (FG_LOW_SOC_THRESH)
Table 10.FG Battery Temperature Alarm Threshold Maximum Register
FG_LOW_SOC_THRESH (0x5C)
15 14 13
DataType = Short (unsigned)
Bit Location
Parameter
Driver Default
Type
12
11
10
9
8
fg_low_soc_thresh[15:8]
0x00
R/W
FG_LOW_SOC_THRESH (0x5C)
Units = %
Bit Location
Parameter
7
6
5
4
3
2
1
0
fg_low_soc_thresh[7:0]
Driver Default
0x0A
R/W
Type
Note:
23. Driver Default: 10%.
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
23
Run Time Input Registers
Implementation Overview
The FFG1040 has been optimized for system side fuel
gauging applications internal to mobile phone or tablet.
It can be used with both embedded and removable
single-cell battery packs. That is the application
example shown below. Additionally the fuel gauge can
be used internal to a battery pack.
and write data to the device. The FFG1040 contains an
I2C slave used to respond to these commands and data
requests.
Figure 12 below shows the FFG1040 and the external
components used to support its connection to the host
and to the battery pack. The recommended values for
the external components are shown below in Table 11.
The recommended value for battery decoupling
capacitance is dependent on the system and charger
and is not defined below.
Internal to system the FFG1040 is connected to an
Applications Processor that uses embedded firmware to
control and access the device via I2C. The Applications
Processor contains the I2C Master that uses read and
write transactions to initiate commands and read from
Typical Application
VPU
RINT RSDA RSCL
PACK+
VBAT
RRMSDA RRMSCL
SCL
SDA
TBIAS
CVBAT
RTBIAS
THRM
TBAT
INT_N
FFG1040
SCL
RMSCL
Fuel Gauge
SDA
RMSDA
PACK-
SRP
VLDO
CVLDO
RSENSE
AGND/SRN
DGND
Figure 12. Simplified Schematic
Table 11.Recommended External Components
Component
Description
CVBAT Decoupling Capacitor
Typical
Unit
CVBAT
CVLDO
RSENSE
RTBIAS
100 ±10%
100 ±10%
5 ±1%
nF
nF
VLDO Compensation Capacitor
External Sense Resistor between SRP and AGND
Battery Thermistor Bias Resistance
mΩ
kΩ
10 ±1%
RSDA, RSCL, RMSDA,
RMSCL, RINT
I2C Pull up Resistor to VPU (SDA, SCL, INT_N)
10 ±10%
kΩ
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
24
RRMSCL
PACK+
RRMSDA
PACK-
DGND
(Top)
PACK+
THRM
RMSDA
RMSCL
PACK-
DGND
(Top)
RTBIAS
CVBAT
SRP
CVLDO
RSENSE
AGND(SRN)
DGND
(Bottom)
RSDA
RSCL
RINT
VPU
DGND
(Top)
Figure 13. Recommended Layout
The table below pertains to the packaging information on the following page.
Package Specific Dimensions
D (mm)
E (mm)
X (mm)
Y (mm)
1.960
1.510
0.255
0.230
© 2014 Fairchild Semiconductor Corporation
FFG1040UC003X • Rev. 1.5
www.fairchildsemi.com
25
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