FIN1101MX [ONSEMI]
LVDS 1 端口高速中继器;
| 型号： | FIN1101MX |
| 厂家： | 
ONSEMI |
| 描述： | LVDS 1 端口高速中继器 驱动 中继器 光电二极管 接口集成电路 驱动器 |
| 文件： | 总7页 (文件大小：559K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
LVDS Single Port High Speed
Repeater
SOIC8
CASE 751EB
US8
CASE 846AN
FIN1101
General Description
This single port repeater is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technology. It
accepts and outputs LVDS levels with a typical differential output
swing of 330 mV which provides low EMI at ultra low power
dissipation even at high frequencies. It can directly accept multiple
differential I/O including: LVPECL, HSTL, and SSTL−2 for
translating directly to LVDS.
MARKING DIAGRAM
&2&K
1101
$Y&Z
$Y&Z&2&K
FIN
1101
FIN1101K8X
FIN1101MX
Features
$Y
&Z
&2
&K
= Logo
= Assembly Plant Code
= 2−Digit Date Code
= 2−Digits Lot Run Traceability Code
• Up to 1.6 Gb/s Full Differential Path
• 3.5 ps Max Random Jitter and 135 ps Max Deterministic Jitter
• 3.3 V Power Supply Operation
• Wide Rail−To−Rail Common Mode Range
• Ultra Low Power Consumption
• LVDS Receiver Inputs Accept LVPECL, HSTL, and SSTL−2 Directly
• Power Off Protection
• 7 kV HBM ESD Protection (All Pins)
• Meets or Exceed the TA/EIA−644−A LVDS Standard
• Packaged in 8−Pin SOIC and US8
• Open Circuit Fail Safe Protection
• These Devices are Pb−Free, Halide Free and are RoHS Compliant
1101, FIN1101 = Specific Device Code
CONNECTION DIAGRAMS
GND 1
8 EN
R
R
2
3
7 D
6 D
5 V
IN−
OUT−
OUT+
CC
IN+
NC 4
SOIC Package
PIN DESCRIPTIONS
R
1
8 R
7 V
6 D
5 D
IN−
IN+
Pin Name
Description
Non−Inverting LVDS Inputs
GND 2
EN 3
CC
R
IN+
R
IN−
OUT+
OUT−
Inverting LVDS Inputs
Non−Inverting Driver Outputs
Inverting Driver Outputs
Driver Enable Pin
Power Supply
GND 4
D
D
OUT+
US8 Package
OUT−
EN
V
CC
GND
Ground
FUCTIONAL DIAGRAM
R
D
D
IN−
OUT−
OUT+
FUNCTION TABLE
R
IN+
Inputs
Outputs
EN
EN
H
R
R
D
D
OUT−
IN+
IN−
OUT+
H
L
H
L
H
L
H
L
H
Z
H
L
ORDERING INFORMATION
See detailed ordering and shipping information on page 4 of
this data sheet.
H
Fail Safe Case
L
X
X
Z
H = HIGH Logic Level
X = Don’t Care
L = LOW Logic Level
Z = High Impedance
© Semiconductor Components Industries, LLC, 2002
1
Publication Order Number:
November, 2022 − Rev. 1
FIN1101/D
FIN1101
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Rating
−0.5 V to +4.6 V
−0.5 V to +4.6 V
−0.5 V to +4.6 V
Continuous 10 mA
−65°C to +150°C
150°C
V
CC
Supply Voltage
V
LVDS DC Input Voltage
LVDS DC Output Voltage
Driver Short Circuit Current
Storage Temperature Range
Max Junction Temperature
IN
V
OUT
OSD
I
T
STG
T
J
T
L
Lead Temperature (Soldering, 10 seconds)
ESD (Human Body Model)
260°C
7000 V
ESD (Machine Model)
300 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
V
Supply Voltage
3.0 V to 3.6 V
−40°C to +85°C
CC
T
Operating Temperature
A
|V
ID
V
IC
|
Magnitude of Input Differential Voltage
Common Mode Input Voltage
100 mV to V
CC
(0 V + |VID| / 2) to (V − |V | / 2)
CC
ID
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS (Over supply voltage and operating temperature ranges, unless otherwise specified)
Typ
(Note 1)
Symbol
Parameter
Test Conditions
See Figure 1; V = +0.05 V, +1.2 V, or (V − 0.05 V)
Min
Max
100
−
Unit
mV
mV
V
V
TH
Differential Input Threshold HIGH
Differential Input Threshold LOW
Input High Voltage (EN)
−
−
−
IC
CC
V
TL
See Figure 1; V = +0.05 V, +1.2 V, or (V − 0.05 V) −100
IC CC
V
IH
2.0
GND
250
−
−
V
CC
V
IL
Input Low Voltage (EN)
−
0.8
450
25
V
V
OD
Output Differential Voltage
R = 100 W, Driver Enabled, See Figure 2
L
330
−
mV
mV
DV
V
OD
Magnitude Change from
R = 100 W, Driver Enabled, See Figure 2
L
OD
Differential LOW−to−HIGH
V
Offset Voltage
R = 100 W, Driver Enabled, See Figure 2
1.125
−
1.23
−
1.375
25
V
OS
L
DV
Offset Magnitude Change from
Differential LOW−to−HIGH
R = 100 W, Driver Enabled, See Figure 2
L
mV
OS
I
I
Short Circuit Output Current
Short Circuit Output Current
D
= 0 V & D = 0 V, Driver Enabled
OUT−
−
−
−
−3.4
3.4
−
−6
6
mA
mA
mA
OS
OUT+
V
V
= 0 V, Driver Enabled
OS
OD
I
Input Current (EN, D
, D
)
= 0 V to V , Other Input = V or 0 V
20
IN
INX+
INX−
IN
CC
CC
(for Differential Inputs)
= 0 V, V or V = 0 V to 3.6 V
OUT
I
Power−Off Input or Output Current
Disabled Power Supply Current
Power Supply Current
V
CC
−
−
−
−
−
3.2
9.3
−
20
5.5
mA
mA
mA
mA
OFF
IN
I
Drivers Disabled
Drivers Enabled, Any Valid Input Condition
Driver Disabled, D = 0 V to 3.6 V or
CCZ
I
13.5
20
CC
I
Disabled Output Leakage Current
OZ
OUT+
D
OUT−
= 0 V to 3.6 V
V
C
Common Mode Voltage Range
Input Capacitance
|V | = 100 mV to V
0 V +
|V | / 2
ID
−
V −
CC
(|V | / 2)
ID
V
IC
ID
CC
EN Input
−
−
−
2.2
2.0
2.6
−
−
−
pF
pF
pF
IN
Data Input
C
OUT
Output Capacitance
1. All typical values are at T = 25°C and with V = 3.3 V.
A
CC
www.onsemi.com
2
FIN1101
AC ELECTRICAL CHARACTERISTICS (Over supply voltage and operating temperature ranges, unless otherwise specified)
Typ
(Note 2)
Symbol
Parameter
Test Conditions
Min
0.75
0.75
0.29
0.29
−
Max
1.75
1.75
0.58
0.58
0.2
0.5
−
Unit
ns
t
t
Differential Propagation Delay LOW−to−HIGH
Differential Propagation Delay HIGH−to−LOW
Differential Output Rise Time (20% to 80%)
Differential Output Fall Time (80% to 20%)
R = 100 W, C = 5 pF,
1.1
PLHD
PHLD
L
ID
L
V
V
= 200 mV to 450 mV,
1.1
ns
= |V | / 2 to (V − (V / 2),
IC
ID
CC
ID
Duty Cycle = 50%, See Figure 3 and
Figure 4
t
t
0.40
0.40
0.01
−
ns
TLHD
THLD
SK(P)
ns
t
Pulse Skew |t
− t
PHL
|
ns
PLH
t
Part−to−Part Skew (Note 3)
−
ns
SK(PP)
f
Maximum Frequency (Note 4) (Note 5)
Differential Output Enable Time from Z to HIGH
Differential Output Enable Time from Z to LOW
Differential Output Disable Time from HIGH to Z
Differential Output Disable Time from LOW to Z
LVDS Data Jitter, Deterministic
400
−
800
2.1
MHz
ns
MAX
t
R = 100 W, C = 5 pF, See Figure 2
5
PZHD
L
L
and Figure 3
t
−
2.3
5
ns
PZLD
PHZD
t
−
1.5
5
ns
t
−
1.8
5
ns
PLZD
23
t
DJ
V
V
= 300 mV, PRBS = 2 − 1,
= 1.2 V at 800 Mbps
−
85
135
ps
ID
IC
t
RJ
LVDS Clock Jitter, Random
(RMS)
V
ID
V
IC
= 300 mV
= 1.2 V at 400 MHz
−
2.1
3.5
ps
2. All typical values are at T = 25°C and with V = 3.3 V, V = 300 mV, V = 1.2 V unless otherwise specified.
A
CC
ID
IC
3. t
is the magnitude of the difference in differential propagation delay times between identical channels of two devices switching in the
SK(PP)
same direction (either LOW−to−HIGH or HIGH−to−LOW) when both devices operate with the same supply voltage, same temperature, and
have identical test circuits.
4. Passing criteria for maximum frequency is the output V > 200 mV and the duty cycle is 45% to 55% with all channels switching.
OD
5. Output loading is transmission line environment only; C is < 1 pF of stray test fixture capacitance.
L
Figure 1. Differential Receiver Voltage Definitions
and Propagation I and Transition Time Test Circuit
Figure 2. Differential Driver DC Test Circuit
Note A: All LVDS input pulses have frequency = 10 MHz, t or t ≤ 0.5 ns
R
F
Note B: C includes all probe and test fixture capacitances
L
Figure 3. Differential Driver Propagation Delay and Transition Time Test Circuit
www.onsemi.com
3
FIN1101
Figure 4. AC Waveforms
Note A: All LVTTL input pulses have frequency = 10 MHz, t or t ≤ 2 ns
R
F
Note B: C includes all probe and test fixture capacitances
L
Figure 5. Differential Driver Enable and Disable Test Circuit
Figure 6. Enable and Disable AC Waveforms
ORDERING INFORMATION
†
Order Number
FIN1101MX
Package Number
Package Description
Shipping
M08A
8−Lead Small Outline Integrated Circuit (SOIC), JEDEC
MS−012, 0.150” Narrow
2500 / Tape & Reel
(Pb−Free)
FIN1101K8X
MAB08A
8−Lead US8, JEDEC MO−187, Variation CA 3.1 mm Wide
(Pb−Free)
3000 / Tape & Reel
†For Information On Tape And Reel Specifications, Including Part Orientation And Tape Sizes, Please Refer To Our Tape And Reel Packaging
Specifications Brochure, Brd8011/D.
www.onsemi.com
4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC8
CASE 751EB
ISSUE A
DATE 24 AUG 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13735G
SOIC8
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
US8
CASE 846AN
ISSUE O
DATE 31 DEC 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13778G
US8
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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