FL73282MX [ONSEMI]
半桥门极驱动器;
| 型号： | FL73282MX |
| 厂家： | 
ONSEMI |
| 描述： | 半桥门极驱动器 驱动 驱动器 |
| 文件： | 总15页 (文件大小：269K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
Half-Bridge Gate Driver
FL73282
SOIC8
CASE 751EB
Description
The FL73282, a monolithic half bridge gate−drive IC, can drive
MOSFETs and IGBTs that operate up to +900 V. onsemi’s
high−voltage process and common mode noise canceling technique
MARKING DIAGRAM
provides stable operation of the high−side driver under high−dV /dt
S
noise circumstances. An advanced level−shift circuit allows high−side
$Y&E&Z&2&K
FL73282
MB
gate driver operation up to V = −9.8 V (typical) for V = 15 V.
S
BS
The UVLO circuits for both channels prevent malfunction when V
CC
or V is lower than the specified threshold voltage. Output drivers
BS
typically source/sink 350 mA / 650 mA, respectively, which is suitable
for all kinds of half− and full−bridge inverters.
FL73282MB = Device Code
Features
$Y
&E
&Z
&2
&K
= onsemi Logo
= Designates Space
= Assembly Plant Code
= 2−Digit Date Code Format
= 2−Digits Lot Run Traceability Code
• Floating Channel for Bootstrap Operation to +900 V
• Typically 350 mA / 650 mA Sourcing/Sinking
Current Driving Capability for Both Channels
• Common−Mode dv/dt Noise Canceling Circuit
• Extended Allowable Negative V Swing to −9.8 V
S
ORDERING INFORMATION
for Signal Propagation at V = V = 15 V
CC
BS
See detailed ordering and shipping information on page 13 of
this data sheet.
• V & V Supply Range from 10 V to 20 V
CC
BS
• UVLO Functions for Both Channels
• Matched Propagation Delay Below 50 ns
• Built−in 170 ns Dead−Time
• Output in Phase with Input Signal
Applications
• Fluorescent Lamp Ballast
• HID Ballast
• SMPS
• Motor Driver
• General Purpose Half Bridge Topology
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
November, 2021 − Rev. 2
FL73282/D
FL73282
APPLICATION DIAGRAM
Up to 900 V
15 V
D
R
BOOT
BOOT
1
2
3
4
8
7
6
V
V
B
CC
Q1
R1
R3
HO
HIN
LIN
HIN
LIN
R2
C
BOOT
V
S
Q2
C1
COM
LO
5
Load
R4
Figure 1. Application Circuit for Half Bridge Topology
BLOCK DIAGRAM
8
7
VB
UVLO
R
HO
R
S
NOISE
CANCELLER
Q
6
1
VS
HS(ON/OFF)
SCHMITT TRIGGER
INPUT
HIN
LIN
2
3
UVLO
VCC
SHOOT THROUGH
PREVENTION
LS(ON/OFF)
DELAY
5
4
LO
{DEAD−TIME=170ns}
COM
Figure 2. Functional Block Diagram
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2
FL73282
PIN CONFIGURATION
V
1
8
7
6
5
V
CC
B
FL73282
2
3
4
HIN
LIN
HO
V
S
COM
LO
Figure 3. Pin Assignments (Top View)
PIN DEFINITIONS
Pin No.
Name
I/O
Description
1
2
3
4
5
6
7
8
V
I
I
I
Low−Side Supply Voltage
CC
HIN
LIN
Logic Input for High−Side Gate Driver Output
Logic Input for Low−Side Gate Driver Output
Logic Ground and Low−Side Driver Return
Low−Side Driver Output
COM
LO
O
I
V
High−Voltage Floating Supply Return
High−Side Driver Output
S
HO
O
I
V
High−Side Floating Supply
B
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3
FL73282
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
Max
Unit
V
V
S
V
B
High−Side Floating Offset Voltage
High−Side Floating Supply Voltage
V −24
B
V +0.3
B
−0.3
−0.3
924.0
24
V
V
CC
V
HO
Low−Side and Logic−Fixed Supply Voltage
V
High−Side Floating Output Voltage V
V −0.3
S
V +0.3
B
V
HO
LO
V
Low−Side Floating Output Voltage V
Logic Input Voltage (HIN, LIN)
Logic Ground
−0.3
−0.3
V
V
V
+0.3
+0.3
+0.3
V
LO
CC
CC
CC
V
V
IN
COM
dV /dt
V
−24
V
CC
Allowable Offset Voltage Slew Rate
Power Dissipation (Notes 2, 3, 4)
Thermal Resistance
−
50
0.625
200
V/ns
W
S
P
−
−
D
q
°C/W
°C
°C
JA
T
J
Junction Temperature
−
150
T
STG
Storage Temperature
−55
150
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Mounted on 76.2 x 114.3 x 1.6 mm PCB (FR−4 glass epoxy material).
2. Refer to the following standards:
JESD51−2: Integral circuit’s thermal test method environmental conditions, natural convection;
JESD51−3: Low effective thermal conductivity test board for leaded surface−mount packages.
3. Do not exceed maximum power dissipation (P ) under any circumstances.
D
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
High−Side Floating Supply Voltage
Min
V +10
Max
Unit
V
V
B
V
S
V +20
S
S
High−Side Floating Supply Offset Voltage
High−Side (HO) Output Voltage
Low−Side (LO) Output Voltage
Logic Input Voltage (HIN, LIN)
Low−Side Supply Voltage
6−V
900
V
CC
V
HO
V
S
V
B
V
V
LO
COM
COM
10
V
CC
V
CC
V
V
IN
V
V
CC
20
+125
V
T
A
Ambient Temperature
−40
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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4
FL73282
STATIC ELECTRICAL CHARACTERISTICS
V
(V , V ) = 15.0 V, T = 25°C, unless otherwise specified. The V and I parameters are referenced to COM. The V and I
BIAS CC
BS
A
IN
IN
O
O
parameters are referenced to V and COM and are applicable to the respective outputs HO and LO.
S
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
POWER SUPPLY SECTION
I
Quiescent V Supply Current
V
V
= 0 V or 5 V
−
−
−
−
−
80
50
−
180
120
550
600
10
mA
mA
mA
mA
mA
QCC
CC
IN
I
I
Quiescent V Supply Current
= 0 V or 5 V
QBS
PCC
BS
IN
Operating V Supply Current
f
IN
f
IN
= 20 kHz, rms value
= 20 kHz, rms value
CC
I
Operating V Supply Current
−
PBS
BS
I
LK
Offset Supply Leakage Current
V
B
= V = 900 V
−
S
BOOTSTRAPPED SUPPLY SECTION
V
+
+
V
& V Supply Under−Voltage Positive
8.2
7.6
−
9.2
8.7
0.5
10.0
9.6
−
V
V
V
CCUV
BSUV
CC
BS
V
going Threshold
V
V
−
−
V
CC
going Threshold
& V Supply Under−Voltage Negative
CCUV
BSUV
BS
V
V
CC
Hysteresis
Supply Under−Voltage Lockout
CCUVH
V
BSUVH
INPUT SECTION
V
Logic “1” Input Voltage
2.5
−
−
−
−
0.8
50
2.0
−
V
V
IH
V
Logic “0” Input Voltage
IL
I
I
Logic “1” Input Bias Current
Logic “0” Input Bias Current
Logic Input Pull−Down Resistance
V
V
= 5 V
= 0 V
−
20
1.0
250
mA
mA
kW
IN+
IN
−
IN−
IN
R
100
IN
GATE DRIVER OUTPUT SECTION
High−Level Output Voltage, V
V
OH
I
I
= 0 A
= 0 A
−
−
−
−
85
85
−
mV
mV
mA
BIAS−VO
O
V
Low−Level Output Voltage, V
O
OL
O+
O
I
I
Output HIGH Short−Circuit Pulsed Current
V
V
= 0 V,
250
350
O
= 5 V with PW ≤ 10 ms
IN
Output LOW Short−Circuit Pulsed Current
V
V
= 15 V,
500
650
−
mA
V
O−
O
= 0 V with PW ≤ 10 ms
IN
V
S
Allowable Negative VS Pin Voltage for HIN
Signal Propagation to HO
−
−9.8
−7.0
DYNAMIC ELECTRICAL CHARACTERISTICS
V
(V , V ) = 15.0 V, V = COM, C = 1000 pF and T = 25°C, unless otherwise specified.
BIAS CC
BS
S
L
A
Symbol
Parameter
Conditions
V = 0 V
Min
80
80
−
Typ
150
150
60
Max
220
220
140
80
Unit
ns
t
Turn−On Propagation Delay
Turn−Off Propagation Delay
Turn−On Rise Time
ON
S
t
V = 0 V or 900 V (Note 4)
S
ns
OFF
t
R
V
= V
= 5 V
= 0 V
ns
LIN
LIN
HIN
HIN
t
F
Turn−Off Fall Time
V
= V
−
30
ns
DT
MT
Dead Time
70
−
170
−
270
50
ns
Delay Matching, HS & LS Turn−on/off
ns
t
Minimum Input Pulse Width that Changes
the Output (Notes 4, 5)
−
−
220
ns
PW
4. These parameters are guaranteed by design.
5. The minimum input pulse width time included dead time.
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5
FL73282
TYPICAL CHARACTERISTICS
180
160
140
300
V
= V
BS
V
= V = 15 V
BS
CC
CC
275
250
225
200
175
150
125
100
75
COM = 0 V
C = 1 nF
T = 25°C
A
COM = 0 V
C = 1 nF
L
L
Low−Side
High−Side
Low−Side
120
100
80
High−Side
50
0
80
Temperature (°C)
100 120
10
14
16
18
20
−40 −20
20
40
60
12
Supply Voltage (V)
Figure 4. Turn−On Propagation Delay
Figure 5. Turn−On Propagation Delay
vs. Supply Voltage
vs. Temperature
200
180
160
140
120
100
300
275
250
225
200
175
150
125
100
75
V
= V
BS
CC
V
= V = 15 V
BS
CC
COM = 0 V
C = 1 nF
T = 25°C
A
COM = 0 V
C = 1 nF
L
L
Low−Side
High−Side
Low−Side
High−Side
50
0
80
Temperature (°C)
100 120
10
14
16
18
20
−40 −20
20
40
60
12
Supply Voltage (V)
Figure 6. Turn−Off Propagation Delay
Figure 7. Turn−Off Propagation Delay
vs. Supply Voltage
vs. Temperature
100
90
80
70
60
50
40
30
20
10
0
80
70
V
= V = 15 V
BS
CC
V
= V = 15 V
BS
CC
COM = 0 V
C = 1 nF
T = 25°C
A
COM = 0 V
C = 1 nF
L
60
50
40
L
Low−Side
Low−Side
High−Side
30
20
10
0
High−Side
0
40
60
80
100 120
−40 −20
20
10
14
16
18
20
12
Supply Voltage (V)
Temperature (°C)
Figure 8. Turn−On Rising Time
Figure 9. Turn−On Rising Time
vs. Supply Voltage
vs. Temperature
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6
FL73282
TYPICAL CHARACTERISTICS (continued)
80
70
60
50
40
30
20
80
V
= V
BS
V
= V = 15 V
BS
CC
CC
70
COM = 0 V
C = 1 nF
T = 25°C
A
COM = 0 V
C = 1 nF
L
L
60
50
40
Low−Side
High−Side
Low−Side
High−Side
30
20
10
0
10
0
0
80
100 120
10
18
20
−40 −20
20
40
60
12
14
16
Temperature (°C)
Supply Voltage (V)
Figure 11. Turn−Off Falling Time
Figure 10. Turn−Off Falling Time
vs. Temperature
vs. Supply Voltage
520
500
480
460
440
420
400
380
700
650
600
550
500
450
400
350
300
250
200
V
= V = 15 V
BS
CC
V
= V
BS
CC
COM = 0 V
LO = HO = 0 V
COM = 0 V
LO = HO = 0 V
T = 25°C
A
Low−Side
High−Side
Low−Side
High−Side
360
340
320
0
40
60
80
100 120
40
20
20
10
18
20
12
14
16
Temperature (°C)
Supply Voltage (V)
Figure 13. Output Sourcing Current
vs. Temperature
Figure 12. Output Sourcing Current
vs. Supply Voltage
980
920
1100
1000
V
= V = 15
BS V
V
= V
CC
CC
BS
COM = 0 V
LO = V , HO = V
B
COM = 0 V
LO = V , HO = V
T = 25°C
A
High−Side
860
800
740
CC
900
800
700
CC
B
High−Side
Low−Side
Low−Side
680
620
560
500
600
500
400
300
0
40
60
80
100 120
−40 −20
20
10
14
16
18
20
12
Temperature (°C)
Supply Voltage (V)
Figure 15. Output Sinking Current
vs. Temperature
Figure 14. Output Sinking Current
vs. Supply Voltage
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7
FL73282
TYPICAL CHARACTERISTICS (continued)
−2
−4
−8
V
= V
BS
V
= V = 15 V
BS
CC
CC
COM = 0 V
T = 25°C
A
COM = 0 V
−9
−10
−11
−6
−8
−10
−12
−14
−16
−18
−12
−13
−14
−15
10
14
16
18
20
12
0
80
100 120
−40 −20
20
40
60
Supply Voltage (V)
Temperature (°C)
Figure 16. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Supply Voltage
Figure 17. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Temperature
100
95
90
85
V
= V = 15 V
BS
V
= 15 V
CC
BS
90
80
70
60
50
40
30
20
10
0
COM = 0 V
HIN = LIN = 0 V
COM = 0 V
HIN = LIN = 0 V
T = 25°C
A
80
75
70
65
60
55
50
45
10
18
20
0
12
14
16
−40 −20
20
40
60
80
100 120
Temperature (°C)
Supply Voltage (V)
Figure 19. IQCC vs. Temperature
Figure 18. IQCC vs. Supply Voltage
70
65
60
55
50
45
40
35
30
25
20
100
90
80
70
60
50
40
30
20
10
0
V
= V = 15 V
BS
CC
V
= 15 V
BS
COM = 0 V
HIN = LIN = 0 V
COM = 0 V
HIN = LIN = 0 V
T = 25°C
A
10
18
20
12
14
16
0
40
60
80
100 120
−40 −20
20
Temperature (°C)
Supply Voltage (V)
Figure 21. IQBS vs. Temperature
Figure 20. IQBS vs. Supply Voltage
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8
FL73282
TYPICAL CHARACTERISTICS (continued)
0.7
0.6
0.5
0.4
70
V
= V
BS
V
= V = 15 V
BS
CC
CC
60
COM = 0 V
HIN = LIN = 5 V
COM = 0 V
HIN = LIN = 5 V
I = 0 A
L
50
40
30
I = 20 mA
L
T = 25°C
A
Low−Side
High−Side
0.3
0.2
0.1
0.0
20
10
0
High−Side
Low−Side
−10
0
40
60
80
100 120
40
20
20
10
18
20
12
14
16
Supply Voltage (V)
Temperature (°C)
Figure 22. High−Level Output Voltage vs. Supply
Figure 23. High−Level Output Voltage
Voltage
vs. Temperature
0.26
0.24
0.22
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
70
60
V
= V = 15 V
V
= V
BS
CC
BS
CC
COM = 0 V
HIN = LIN = 0 V
I = 0 A
L
COM = 0 V
HIN = LIN = 0 V
50
40
30
I = 20 mA
L
T = 25°C
A
Low−Side
20
10
High−Side
High−Side
Low−Side
80
Temperature (°C)
0
−10
0
100 120
−40 −20
20
40
60
10
18
20
12
14
16
Supply Voltage (V)
Figure 25. Low−Level Output Voltage
Figure 24. Low−Level Output Voltage
vs. Temperature
vs. Supply Voltage
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
HIN = LIN = 5 V
V
= V
BS
CC
COM = 0 V
IN = V or IN = 0 V
T = 25°C
A
CC
IN+
LIN
HIN
IN−
0
80
Temperature (°C)
100 120
−40 −20
20
40
60
0
5
10
15
20
Supply Voltage (V)
Figure 27. Input Bias Current vs. Temperature
Figure 26. Input Bias Current vs. Supply
Voltage
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9
FL73282
TYPICAL CHARACTERISTICS (continued)
10.0
9.8
9.8
9.6
9.4
9.2
9.0
8.8
8.6
8.4
8.2
9.6
9.4
9.2
9.0
8.8
8.6
8.4
8.2
8.0
V
SBUV+
V
OCCUV+
V
SBUV−
V
OCCUV−
8.0
7.8
0
80
100 120
0
40
60
80
100 120
−40 −20
20
40
60
−40 −20
20
Temperature (°C)
Temperature (°C)
Figure 28. VCC UVLO Threshold Voltage
vs. Temperature
Figure 29. VBS UVLO Threshold Voltage
vs. Temperature
2.4
2.2
50
40
V
= V = 15 V
BS
CC
V
to − COM = 925 V
B
COM = 0 V
V
(HIN)
IH
2.0
1.8
1.6
V
(LIN)
IH
30
20
10
0
1.4
1.2
V
IL
(HIN)
V
(LIN)
IL
1.0
0.8
−40 −20
20
40
60
80
100 120
0
0
80
100 120
−40 −20
20
40
60
Temperature (°C)
Temperature (°C)
Figure 31. Input Logic Threshold
Voltage vs. Temperature
Figure 30. VB to COM Leakage Current
vs. Temperature
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10
FL73282
SWITCHING TIME DEFINITIONS
15 V
V
V
V
8
6
7
5
1
4
2
3
B
V
V
CC
B
10 mF
10 mF
100 nF
100 nF
15 V
COM
HIN
S
S
1nF
(0 V to 900 V)
10 mF
HO
HO
LO
HIN
LIN
LIN
LO
1nF
Figure 32. Switching Time Test Circuit
HIN
LIN
HO
LO
Shoot Through
Prevent
Shoot Through
Prevent
DT
DT
DT
DT
Figure 33. Input / Output Timing Diagram
HIN
50%
50%
50%
More than dead−time
More than dead−time
LIN
50%
50%
t
OFF
t
OFF
90%
90%
t
ON
HO
t
10%
10%
F
t
OFF
t
R
90%
90%
t
ON
LO
10%
Figure 34. Switching Time Definition
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11
FL73282
SWITCHING TIME DEFINITIONS (continued)
HIN
50%
50%
t
LIN
HO
OFF
DT
LO−HO
90%
10%
DT
t
R
HO−LO
90%
90%
LO
t
t
F
OFF
10%
10%
MDT + Ť DT
HO*LO * DTLO*HO
|
Figure 35. Internal Dead Time Definition
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12
FL73282
ORDERING INFORMATION
Operating
Temperature Range
†
Part Number
Package
Shipping
FL73282MX (Note 6)
−40°C to +125°C
8−Lead, Small Outline Integrated Circuit, (SOIC),
(Pb−Free)
2500 / Tape & Reel
6. These devices passed wave−soldering test by JESD22A−111.
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13
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC8
CASE 751EB
ISSUE A
DATE 24 AUG 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13735G
SOIC8
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