FL7760BM6X [ONSEMI]
模拟/PWM 可调光 60 V 输入降压控制器，用于 LED 照明;
| 型号： | FL7760BM6X |
| 厂家： | 
ONSEMI |
| 描述： | 模拟/PWM 可调光 60 V 输入降压控制器，用于 LED 照明 控制器 |
| 文件： | 总12页 (文件大小：256K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
High-Side Sensing
Constant Current Buck
Controller for High
Switching Frequency LED
Driver
SOT23−6LD
CASE 527AJ
MARKING DIAGRAM
FL7760
SEN
VCC DRV
The FL7760 is a constant current step−down CCM controller for
wide output power LED lighting applications. The FL7760 adapts
hysteretic reference architecture that accurately regulates LED current
by sensing voltage across an external high side sense resistor. This
control scheme can stabilize LED current against input voltage and
output load transient condition and implement optimal PWM and
analog dimming control. Time delay control method widens analog
dimming range down to less than 5%.
60xT
VIN GND
(Top View)
FL7760 has low 200 mV reference voltage to maximize system
efficiency and high frequency driving capability so that system profile
can be minimized in wide scale power ranges.
The FL7760 implements PWM and analog dimming together
through a DIM pin and provides thermal shutdown (TSD), and
under−voltage lockout (UVLO) protections.
60 :
x :
T:
Production Identifier
Version (A or B)
Wafer Lot Code
Week Code
Year Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 4 of
Features
• Wide Input Range (8 VDC~70 VDC)
• Continuous Conduction Mode Operation
• Hysteretic LED Current Control
this data sheet.
• Wide analog dimming range down to 5%
• Wide PWM dimming duty range to 0.2% at 2 kHz PWM freq.
• High switching frequency up to 1 MHz
• High source / sink current of 1.5 A / 2.5 A
• Cycle−by−Cycle Peak Current Limit
• Low Operating Current (300 uA)
• Low Stand−by Current (240 uA)
Typical Applications
• LED Lighting System
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
August, 2021 − Rev. 7
FL7760/D
FL7760
RsenH
Line input
Maxim
CIN
Vdc
70
Dfrd
F1
1
VIN
6
SEN
Lm
Analog or PWM Dimming Signal
3 DIM
5
2
VCC
GND
Q1
DRV
4
CVCC
FL7760
Figure 1. Application Schematic for Analog or PWM Dimming
Table 1. PIN FUNCTION DESCRIPTION
Pin
1
Pin Name
VIN
Function
IC Input
Ground
Description
Connect to the high voltage input line and supply current to the IC.
Ground of IC.
2
GND
3
DIM
Analog / PWM / Hybrid /
Dimming
DIM voltage determines LED current regulation reference and switching
is terminated when DIM voltage is 0 V. If dimming function is not used, it
is recommended to add a 0.1 mF bypass capacitor between DIM and
GND.
4
5
6
DRV
VCC
SEN
Driver Output
IC Supply
Connect to the MOSFET gate.
Supply pin for IC operation.
Current Sense
The SEN pin is used to set the output LED current regulation.
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2
FL7760
6
1
SEN
VIN
High Side
Current Sense
VSENSE
TSD
UVLO
S
Q
Shutdown
R
LEB
Regulation
VDD Good
VCC
Good
VCC
VRL
30mV
5
+
+
+
Gate
Driver
Tdelay
4
S
R
Q
DRV
DIM
VRH
30mV
6uA
3V max .
clamping
Internal
Bias
x 1/15
3
2
GND
34ms
counter
Standby
+
0.45/0.50V
a) A Version (with Time Delay Control)
6
1
SEN
VIN
High Side
Current Sense
VSENSE
TSD
S
Q
Shutdown
UVLO
R
LEB
Regulation
VDD Good
VCC
Good
VCC
VRL
30mV
5
+
+
+
Gate
Driver
4
S
R
Q
DRV
DIM
VRH
30mV
6uA
3V max .
clamping
Internal
Bias
x 1/15
3
2
GND
34ms
counter
Standby
+
0.45/0.50V
b) B Version (without Time Delay Control)
Figure 2. Block Diagram
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3
FL7760
Table 2. MAXIMUM RATINGS
Symbol
Rating
Value
−0.3 to 70
−0.3 to 70
−0.3 to 5.5
−0.3 to 5.5
−0.3 to 5.5
8
Unit
V
VIN
Maximum VIN Pin Voltage Range
Maximum SEN Pin Voltage Range
VCC Pin Voltage Range
(MAX)
SEN
VCC
V
(MAX)
(MAX)
V
VDIM
DIM Pin Voltage Range
V
(MAX)
VDRV
DRV Pin Voltage Range
V
(MAX)
VCC
Maximum VCC Pin Pulse Voltage at t
Maximum DRV Pin Pulse Voltage at t
Maximum Junction Temperature
Storage Temperature Range
< 20 ns
V
(PULSE)
PULSE
VDRV
T
< 20 ns
8
V
(PULSE)
PULSE
150
°C
°C
°C/W
mW
kV
kV
J(MAX)
T
−65 to 150
263
STG
R
Junction−to−Ambient Thermal Impedance
Power Dissipation
q
JA
P
247
D
ESD
ESD
ESD Capability, Human Body Model (Note 2)
ESD Capability, Charged Device Model (Note 2)
1.2
HBM
2
CDM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters
2. This device series incorporates ESD protection and is tested by the following methods
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating: v150 mA per JEDEC standard: JESD78
Table 3. ORDERING INFORMATION
†
Device
Package
Shipping
FL7760AM6X
FL7760BM6X
6LD,SOT23, JEDEC MO−178 VARIATION AB, 1.6MM WIDE
6LD,SOT23, JEDEC MO−178 VARIATION AB, 1.6MM WIDE
Tape & Reel
Tape & Reel
Table 4. RECOMMENDED OPERATING RANGES
Rating
Symbol
Min
Max
Unit
Ambient Temperature
T
A
−40
125
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 5. ELECTRICAL CHARACTERISTICS
(V = 5 V, For typical values T = 25°C, for min/max values T = −40°C to +125°C, Max T = 150°C, unless otherwise noted)
CC
j
j
j
Characteristics
Condition
Symbol
Min
Typ
Max
Unit
VIN SECTION
Self BIAS Start Threshold Voltage
Self BIAS Stop Threshold Voltage
Self BIAS Current for Startup (Note 3)
V
V
= 5 V
= 5 V
V
7.05
6.55
7.5
7
7.95
7.45
V
V
CC
IN,ON
V
IN,OFF
CC
I
ST
2
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. This item is guaranteed by design.
4. This is only a recommended specification and there is no limit to the PWM Dimming frequency.
5. Drift after IC reliability test (JEDEC JESD22−A08) is not included.
6. This value indicates the change in internal reference voltage with temperature change and indicates the rate of change based on 25 °C
ambient temperature. This item is guaranteed by design.
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4
FL7760
Table 5. ELECTRICAL CHARACTERISTICS
(V = 5 V, For typical values T = 25°C, for min/max values T = −40°C to +125°C, Max T = 150°C, unless otherwise noted)
CC
j
j
j
Characteristics
Condition
Symbol
Min
Typ
Max
Unit
VCC SECTION
VCC Regulator Output Voltage
IC Start Threshold Voltage
IC Stop Threshold Voltage
UVLO Hysteresis
V
= 24 V
V
CC
4.5
4.04
3.03
0.505
51
5
5.5
4.95
3.96
1.485
495
V
V
VIN
DC
V
CC
Increasing
Decreasing
V
4.50
3.50
1.000
300
CC,ON
V
CC
V
V
V
CC,OFF
CC,HYS
V
Operation Current
No Switching
No Switching
I
uA
mA
CC
Stand−by Current (Note 3)
GATE SECTION
I
0.1
0.24
0.4
stby
Gate High Voltage
V
4.5
5
5.5
0.5
V
V
GATE,H
Gate Low Voltage
V
GATE.L
GATE,pullup
Peak Pull−up Current (Note 3)
Peak Pull−down Current (Note 3)
Recommended Maximum Operating Frequency (Note 4)
CURRENT−SENSE AND REFERENCE SECTION
V
V
= 5 V
= 5 V
I
1.5
2.5
1
A
CC
I
A
CC
GATE,pulldown
F
MHz
SW,MAX
V
= 3.5 V
DIM
J
Internal Reference Voltage
V
192
196
200
200
208
204
mV
mV
FB,DC
(T = 25°C)
V
= 3.5 V
DIM
J
Internal Reference Voltage Drift (Note 5)
V
FB,DC,R
(T = 25°C)
Variation of V
for Temperature (Note 6)
V
= 3.5 V
= 3.5 V
V
FB,DC,T
118.2
30
uV/°C
FB,DC
DIM
DIM
Feedback Reference Voltage Hysteresis
SWITCHING SECTION
V
V
mV
FB,HYS
Minimum On−Time (Note 3)
Minimum Off−Time (Note 3)
DIMMING SECTION
t
200
200
ns
ns
ON,MIN
t
OFF,MIN
V
2.7
3.0
3.3
V
V
Maximum Effective Dimming Voltage (Note 3)
Minimum Effective Dimming Voltage
DIM,MAX
V
>V
decreased
then
DIM
DIM,R
V
0.40
0.45
0.50
DIM,MIN
Dimming Recovery Voltage
V
0.45
5
0.50
6
0.55
7
V
DIM,R
Internal Sourcing Current Pull up to 3V
I
uA
us
pull up,DIM
V
= 0.5 V
= 3 V
T
5.00
5.35
5.70
Delay Time at 0.5 V
Delay Time at 3 V
(A version only, Note 3)
DIM
Delay.max
DIM
V
T
28.5
28
30.0
34
31.5
40
ns
(A version only, Note 3)
DIM
Delay.min
DIM
Blanking Time for Standby Mode (Note 3)
V
= 0 V
T
ms
DIM
Blank.stby
THERMAL SHUT DOWN SECTION
Thermal Shutdown Temperature (Note 3)
Hysteresis Temperature of TSD (Note 3)
140
150
30
°C
°C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. This item is guaranteed by design.
4. This is only a recommended specification and there is no limit to the PWM Dimming frequency.
5. Drift after IC reliability test (JEDEC JESD22−A08) is not included.
6. This value indicates the change in internal reference voltage with temperature change and indicates the rate of change based on 25 °C
ambient temperature. This item is guaranteed by design.
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5
FL7760
TYPICAL CHARACTERISTICS
7
6
5
7
6
5
4
3
2
1
4
3
2
1
0
0
-40
-20
0
20
40
60
80
100
120
140
-40
-20
0
20
40
60
80
100
120
140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 3. VCC vs. Temperature
Figure 4. VCC−ON vs. Temperature
7
0.7
0.6
0.5
6
5
4
3
2
1
0.4
0.3
0.2
0.1
0
0.0
-40
-20
0
20
40
60
80
100
120
140
-40
-20
0
20
40
60
80
100
120
140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. VCC−OFF vs. Temperature
Figure 6. ICC vs. Temperature
350
350
300
250
300
250
200
150
100
50
200
150
100
50
0
0
-40
-20
0
20
40
60
80
100
120
140
-40
-20
0
20
40
60
80
100
120
140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. VFB−HIGH vs. Temperature
Figure 8. VFB−LOW vs. Temperature
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6
FL7760
TYPICAL CHARACTERISTICS (Continued)
45
40
35
0.7
0.6
0.5
30
25
20
15
0.4
0.3
0.2
0.1
10
0.0
-40
-20
0
20
40
60
80
100
120
140
-40
-20
0
20
40
60
80
100
120
140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 9. VFB−HYS vs. Temperature
Figure 10. VDIM−MIN vs. Temperature
0.7
0.6
0.5
8.6
8.4
8.2
8.0
7.8
7.6
7.4
7.2
7.0
6.8
6.6
0.4
0.3
0.2
0.1
0.0
-40
-20
0
20
40
60
80
100
120
140
-40
-20
0
20
40
60
80
100
120
140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 11. VDIM−R vs. Temperature
Figure 12. VIN−ON vs. Temperature
1.0
8.0
7.8
7.6
7.4
7.2
7.0
6.8
6.6
6.4
6.2
6.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-40
-20
0
20
40
60
80
100
120
140
-40
-20
0
20
40
60
80
100
120
140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 14. VIN−HYS vs. Temperature
Figure 13. VIN−OFF vs. Temperature
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7
FL7760
APPLICATION INFORMATION
General
The FL7760 is a step down hysteretic LED current
controller that is easily configured in varies input voltage
range from 8 V to 70 V. The converter employs a high side
current sensing resistor to detect and regulate the LED
current. Analog, PWM and hybrid dimming can be easily
implemented with single DIM pin. In addition, the time
delay control operation can realize analog dimming less than
5%.
generated and the MOSFET is turned on, the LED current is
still close to zero in the crossover distortion area where the
input voltage is lower than the LED forward voltage.
Soft Start
The hysteric reference voltage to regulate LED current is
proportional to DIM voltage. Internal current source [6 uA]
charges an external capacitor connected at DIM pin and soft
start time can be programmable with capacitances. Soft start
time can be calculated as below equation.
Continuous Conduction Mode Regulation
The FL7760 employs hysteretic reference architecture
that accurately regulates LED current by detecting an
external high−side current−sense resistor voltage. The
voltage across the current sensing resistor is kept measured
and regulated in 200 mV 15% range. This control scheme
performs stable LED current regulation at input voltage and
load transient conditions..
CDIM 3V
(eq. 1)
TSoftStart
+
6uA
Vin
VDIM
VVIN −VSEN
High Reference
VVIN −VSEN
High Reference
Low Reference
Low Reference
Gate
Figure 17. Soft Start with DIM pin Resistor
Figure 15. CCM Operation with Hysteresis
Vin
VIN biasing at startup
Internal VIN biasing circuit quickly charges external
VCC capacitor to begin IC operation. During the initial
start−up, the VCC pin voltage gradually increases, and when
the voltage reaches 4.5 V, the IC starts operating by VCC
good signal.
VDIM
VVIN −VSEN
High Reference
Low Reference
Vin
LED VF
7.5V
7 V
Cross Over
Distortion
Cross Over
Distortion
Figure 18. Soft Start with DIM pin Capacitor
VCC
4.5V
Although soft start is not preferred, small filtering
capacitor (~ hundreds pF) at DIM pin is recommended for
noise immunity. PWM dimming signal delivered from an
external PWM generator can be filtered by the capacitor, so
the capacitor value needs to be carefully selected by
considering an output impedance of PWM signal generator.
4 V
VDIM
VVIN −VSEN
High Reference
Low Reference
Analog Dimming
When DIM voltage is higher than 3 V, hysteretic reference
voltage is set to 200 mV 30 mV. This hysteretic reference
condition limits LED current ripple spec of 15% without
storage capacitor in parallel with the LED string.
The control range of the DIM pin in analog dimming is
from 3 V to 0.5 V. As DIM voltage decreases, hysteretic
Gate
Figure 16. Start Up and Regulation
Thereafter, the internal current source in the DIM pin pulls
up the DIM voltage and internal hysteresis reference is
enabled with gate switching. Although the gate signal is
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8
FL7760
references are reduced accordingly with the fixed +/−30 mV
at DIM pin. It provides wide dimming range with good
dimming linearity.
hysteresis. To perform wide analog dimming range to less
than 5%, the FL7760 has Time Delay Control (built in
version A) with hysteresis control. In this delay control
method, gate is not turned on during the delay time
VFB.REF
High Side Reference
230mV
Low Side Reference
60mV (200mV 30mV)
170mV
determined by DIM voltage once V
− V
reaches to
VIN
SEN
t
the low reference. Therefore, operating mode is entered into
DCM (Discontinuous Current Mode) that makes non−linear
dimming curve in low DIM voltage range.
Therefore, for analog dimming application with wide
dimming requirement, version A is recommended and for
PWM dimming application with linear dimming curve,
version B is preferred.
3V
3V
VDIM
t
t
ILED
No Dimming
Hybrid Dimming(Analog DIM + PWM DIM)
Analog Dimming
Figure 21. Hybrid Dimming
Standby Operation
When the voltage of the DIM pin falls below 0.45 V for
34 ms, standby mode is entered and the power consumption
of the control circuitry is minimized. Standby mode is
terminated once DIM voltage is over 0.5 V.
100
90
80
70
60
50
40
30
20
10
0
VDim
0.45V
0.5V
TBlank.stby
34ms
0
0.5
1
1.5
2
2.5
3
3.5
Standby
mode
Analog Dimming Voltage [V]
Figure 19. Analog Dimming Curve
PWM Dimming
Gate
If the DIM pin voltage is less than 0.45 V for 1 us blanking
time, FL7760 stops switching. When the DIM voltage is up
again over 0.5 V for the blanking time, switching begins.
Based on the blanking time, the minimum duty ratio for
PWM dimming can be calculated as 0.2% for a 2 kHz
dimming signal.
Normal Mode
Stby Mode
Normal Mode
Figure 22. Standby Mode
Thermal Shut Down
If internal junction temperature is higher than 150°C, TSD
protection is triggered and released with 30°C hysteresis.
VDim
Selection the Input Capacitor
TBlank
A low ESR input capacitor reduces the surge current and
switching noise drawn from the front end power supply.
Ceramic capacitors (100 ~ 120 nF) closely connected to VIN
and GND pin can be effective in bypassing switching noise
generated from front−end power stage and FL7760 buck
converter stage.
1us
1us
1us
Gate
No Gate
Figure 20. PWM Dimming
Hybrid Dimming
The FL7760 can implement hybrid dimming by adjusting
amplitude and duty ratio of the single DIM signal provided
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9
FL7760
Single layer PCB layout guidance
3
RsenH
CIN
Elec−
Capacitor
CIN
Bypass
Capacitor
1
Dfrd
5
1
6
Lm
VIN
SEN
Analog or PWM Dimming Signal
3
5
2
DIM
VCC
GND
Q1
4
DRV
2
CDIM
Bypass
4
CVCC
FL7760
Capacitor
5
1
CIN bypass capacitor is closely connected to VIN and GND pins .
DIM bypass capacitor is closely connected to DIM and GND pins .
2
3
4
5
PG
C
(Power GND)
Sensing resistor is connected close at VIN and SEN pins .
VCC capacitor is connected close at VCC pin .
SG
(Signal GND)
SG and PG are combined and connected close at GND pin .
Figure 23. Single layer PCB layout guidance
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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23, 6 Lead
CASE 527AJ
ISSUE B
DATE 29 FEB 2012
SCALE 2:1
D
A
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DATUM C IS THE SEATING PLANE.
6
1
5
2
4
3
MILLIMETERS
E
E1
L2
GAGE
PLANE
DIM MIN
MAX
1.45
0.15
1.30
0.50
0.26
3.00
3.10
1.80
A
A1
A2
b
---
0.00
0.90
0.20
0.08
2.70
2.50
1.30
SEATING
PLANE
6X b
0.20
L
c
e
M
S
S
D
C A
B
DETAIL A
E
TOP VIEW
E1
e
0.95 BSC
A2
A
L
0.20
0.60
L2
0.25 BSC
c
GENERIC
MARKING DIAGRAM*
6X
0.10 C
DETAIL A
SEATING
PLANE
END VIEW
C
A1
SIDE VIEW
XXX MG
G
RECOMMENDED
SOLDERING FOOTPRINT*
1
XXX
M
= Specific Device Code
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
3.30
6X
0.85
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
6X
0.56
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34321E
SOT−23, 6 LEAD
PAGE 1 OF 1
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