FMS6141CSX [ONSEMI]
视频滤波器驱动器,单沟道 4 阶标准;型号: | FMS6141CSX |
厂家: | ONSEMI |
描述: | 视频滤波器驱动器,单沟道 4 阶标准 驱动 驱动器 |
文件: | 总12页 (文件大小:275K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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FMS6141
Low-Cost, Single-Channel 4th-Order
Standard Definition Video Filter Driver
Features
Description
The FMS6141 Low -Cost Video Filter is intended to replace
passive LC filters and drivers w ith a low -cost integrated
device. The 4th-order filter provides improved image
quality compared to typical 2nd or 3rd-order passive
solutions.
.
Single 4th-Order 8 MHz (SD) Filter
.
Drives Single, AC- or DC-coupled, Video Loads
(2 Vpp, 150 Ω)
.
Drives Dual, AC- or DC-coupled, Video Loads (2Vpp,
75Ω)
The FMS6141 may be directly driven by a DC-coupled
DAC output or an AC-coupled signal. Internal diode clamps
and bias circuitry may be used if an AC-coupled input is
required (see Application Information for details).
.
.
.
.
Transparent Input Clamping
AC- or DC-Coupled Input
AC- or DC-Coupled Output
The FMS6141’s output can drive an AC- or DC-coupled
single (150 Ω) or dual (75 Ω) load. DC-coupling the output
removes the need for output coupling capacitors. The
input DC level is offset approximately +280 mV at the
output (see Application Information for details).
DC-Coupled Output Eliminates AC-Coupling
Capacitors
.
.
.
Single Supply
Robust 8 kV ESD Protection
Lead-Free Packages: SOIC-8 or SC70-5
Related Applications Notes
.
http://w w w .onsemi.com/pub/Collateral/AN-
6041.pdf.pdf
Applications
.
.
.
.
.
.
Cable Set-Top Boxes
.
http://w w w .onsemi.com/pub/Collateral/AN-
6024.pdf.pdf
Satellite Set-Top Boxes
DVD Players
HDTVs
Personal Video Recorders (PVR)
Video On Demand (VOD)
Functional Block Diagram
VIDEO
OU
VIDEO
IN
Transparent Clamp
2X
T
th
8MHz, 4 -order
Figure 1. Block Diagram
© 2006 Semiconductor Components Industries, LLC.
October-2017, Rev . 2
Publication Order Number:
FMS6141/D
Ordering Information
Operating
Temperature Range
Packing
Method
Part Number
Package
FMS6141CSX
FMS6141S5X
-40°C to +85°C
8-Lead, Small Outline Integrated Circuit (SOIC)
5- Lead SC70 Package
Tape and Reel
Tape and Reel
-40°C to +85°C
Pin Configurations
1
2
3
4
8
7
6
5
V
V
IN
OUT
1
2
3
5
4
N/C
GND
N/C
V
GND
GND
V
V
CC
CC
FMS6141
SOIC-8
FMS6141
SC70-5
N/C
N/C
V
IN
OUT
Figure 2. SOIC-8
Figure 3. SC70
Pin Definitions
SOIC Pin #
SC70 Pin#
Name
VIN
Description
1
2
3
4
5
6
7
8
3
Video Input
No Connect
N/C
1, 2
GND
N/C
Must Be Connected to Ground
No Connect
N/C
No Connect
N/C
No Connect
5
4
VCC
+5V Supply, Do Not Float
Filtered Video Output
VOUT
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2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable
above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition,
extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute
maximum ratings are stress ratings only.
Symbol
VCC
Parameter
Min.
-0.3
Max.
6.0
Unit
V
DC Supply Voltage
VIO
Analog and Digital I/O
-0.3
VCC +0.3
50
V
IOUT
Output Current, Do Not Exceed
mA
Recommended Operating Conditions
Symbol
TA
Parameter
Operating Temperature Range
VCC Range
Min.
-40
Typ.
Max.
Unit
°C
85
VCC
4.75
5.00
5.25
V
ESD Information
Symbol
Parameter
Value
Unit
kV
Human Body Model, JESD22-A114
Charged Device Model, JESD22-C101
8.0
1.5
ESD
kV
Reliability Information
Symbol
Parameter
Min. Typ. Max. Unit
TJ
TSTG
TL
Junction Temperature
Storage Temperature Range
+150
+150
300
°C
°C
-65
Lead Temperature (Soldering, 10 s)
°C
115
332
SOIC-8
SC70-5
°C/W
Thermal Resistance
(JEDEC Standard Multi-Layer Test Boards, Still Air)
Θ
JA
°C/W
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3
DC Specifications
TA = 25°C, VCC = 5.0 V, RS = 37.5 Ω; input is AC coupled w ith 0.1 µF; output is AC coupled w ith 220 µF into a 150 Ω load;
unless otherw ise noted.
Symbol
ICC
Parameter
Supply Current(1)
Conditions
Min. Typ. Max. Unit
No Load
7
12
mA
Vpp
dB
VIN
Video Input Voltage Range
Referenced to GND if DC-Coupled
DC
1.4
40
PSRR
Pow er Supply Rejection Ratio
Note:
1. 100% tested at 25°C
AC Electrical Specifications
TA = 25°C, VCC = 5.0 V, RS = 37.5 Ω; input is AC coupled w ith 0.1 µF; output is AC coupled w ith 220 µF into a 150 Ω load;
unless otherw ise noted.
Symbol
AV
Parameter
Channel Gain(2)
Conditions
Min. Typ. Max. Unit
5.6
4.0
6.0
6.5
7.7
42
6.4
dB
MHz
MHz
dB
%
f1dB
-1dB Bandw idth(2)
fC
-3dB Bandw idth
fSB
Attenuation (Stopband Reject)
Differential Gain
f = 27 MHz
dG
0.4
0.4
0.4
dφ
Differential Phase
°
THD
Output Distortion (all channels)
VOUT = 1.8 Vpp, 1 MHz
%
NTC-7 Weighting; 100 kHz to
4.2 MHz
SNR
tpd
Signal-to-Noise Ratio
Propagation Delay
75
55
dB
ns
Delay from input to output,
4.5 MHz
Note:
2. 100% tested at 25°C
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4
Application Information
Input Considerations
Output Considerations
The FMS6141 Low -Cost Video Filter provides 6 dB (2X)
gain from input to output. The device provides an internal
diode clamp to support AC-coupled input signals. In this
configuration, a 0.1 µF ceramic capacitor is used to AC
couple the input signal. If the input signal does not go
below ground, the clamp is inactive; but if the input signal
goes below ground, the clamp circuitry sets the bottom of
the sync tip (or low est voltage) to just below ground. The
input level set by the clamp, combined w ith the internal DC
offset, keeps the output signal w ithin an acceptable
range. This clamp feature also allow s the FMS6141’s input
to be directly driven (DC-coupled) by a ground referenced
DAC output. Figure 4 show s typical DC voltage levels for
the input and output signals w hen driven by a DC-coupled
DAC output or an AC-coupled and clamped Y, CV signal.
The FMS6141 outputs w ill be DC offset from the input by
150 mv therefore VOUT = 2*VIN DC+150 mv. This offset is
required to obtain optimal performance from the output
driver and is held at the minimum value in order to
decrease the standing DC current into the load. Since the
FMS6141 has a 2x (6 dB) gain, the output is typically
connected via a 75 Ω series back-matching resistor
follow ed by the 75 Ω video cable. Because of the inherent
divide by tw o of this configuration, the blanking level at
the load of the video signal is alw ays less then 1 V. When
AC-coupling the output ensure that the coupling capacitor
of choice w ill pass the low est frequency content in the
video signal and that line time distortion (video tilt) is kept
as low as possible.
The selection of the coupling capacitor is a function of the
subsequent circuit input impedance and the leakage
current of the input being driven. In order to obtain the
highest quality output video signal the series termination
resistor must be placed as close to the device output pin
as possible. This greatly reduces the parasitic
capacitance and inductance effect on the FMS6141
output driver. Recommend distance from device pin to
place series termination resistor should be no greater than
0.1 inches.
1.0 -> 1.02V
2.28V
1.58V
0.65 -> 0.67V
0.3 -> 0.32V
0.0 -> 0.02V
0.88V
0.28V
Vin
Vout
Figure 4. Typical DC Voltage Levels
Figure 5. Distance from Device Pin to Series
Termination Resistor
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5
I/O Configurations
Figure 6 show s a typical AC-coupled input configuration
for driving the filter/driver. Using this configuration, a
0.1 µF ceramic capacitor is used to AC couple the input
signal. The coupling capacitor and the input termination
resistor at the input of the filter/driver should be placed
close to the input pin for optimal signal integrity.
0.1µF
Clamp /
Bias
Input
Buf
LPF
RTERM
Termination &
coupling close
to device input
Figure 6. Typical Input Configuration
75
W
75 Video Cables
W
LOAD2
(optional)
0.65V
75
W
75
W
Y
OUT
Y
IN
LOAD1
Driver
75
W
800 K ohms
Figure 7. Conceptual Illustration — Input Clamp Circuit and Output Driver
Connected to Drive Single or Dual Video Loads
0V - 1.4V
75
LCVF
Clamp Mode
DVD
SoC
RTERM
Figure 8. DC-Coupled Input and DC-Coupled Output
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6
0V - 1.4V
0.1µ
75
LCVF
Clamp Mode
DVD
SoC
RTERM
Figure 9. AC-Coupled Input and DC-Coupled Output
0V - 1.4V
75
220µF
LCVF
Clamp Mode
DVD
SoC
RTERM
Figure 10. DC-Coupled Input and AC-Coupled Output
0V - 1.4V
0.1µ
75
220µF
LCVF
Clamp Mode
DVD
SoC
RTERM
Figure 11. AC-Coupled Input and AC-Coupled Output
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7
Layout Considerations
General layout and supply bypassing play a major role in
high-frequency performance and thermal characteristics.
ON Semiconductor offers a demonstration board for the
FMS6141 to guide layout and aid device evaluation. The
demo board is a four-layer board w ith full pow er and
ground planes. Follow ing this layout configuration
each device dissipates. Ensure that devices of high
pow er are not placed in the same location, such as
directly above (top plane) and below (bottom plane) each
other on the PCB.
PCB Thermal Layout Considerations
provides
optimum
performance
and
thermal
characteristics for the device. For the best results, follow
the steps and recommended routing rules listed below .
. Understand the system pow er requirements and
environmental conditions.
. Maximize thermal performance of the PCB.
Recommended Routing/Layout Rules
. Consider using 70 µm of copper for high-pow er
designs.
. Do not run analog and digital signals in parallel.
. Use separate analog and digital pow er planes to supply
pow er.
. Make the PCB as thin as possible by reducing FR4
thickness.
. Traces should run on top of the ground plane at all
times.
. Use vias in pow er pad to tie adjacent layers together.
. Remember that baseline temperature is a function of
. No trace should run over ground/pow er splits.
. Avoid routing at 90-degree angles.
board area, not copper thickness.
. Modeling techniques can provide
a
first-order
approximation.
. Minimize clock and video data trace length differences.
. Include 10 µF and 0.1 µF ceramic pow er supply bypass
capacitors.
Power Dissipation
Consider the FMS6141’s output drive configuration w hen
calculating overall pow er dissipation. Care must be taken
not to exceed the maximum die junction temperature. The
follow ing example can be used to calculate the
FMS6141’s pow er dissipation and internal temperature
rise.
. Place the 0.1 µF capacitor w ithin 0.1 inches of the
device pow er pin.
. Place the 10 µF capacitor w ithin 0.75 inches of the
device pow er pin.
. For multilayer boards, use a large ground plane to help
TJ = TA + PCHANNEL
Θ
JA
w here PCHANNEL = VCC • ICH + (VO2/RL)
VO = 2VIN + 0.280V
dissipate heat.
. For tw o-layer boards, use a ground plane that extends
beyond the device body by at least 0.5 inches on all
sides. Include a metal paddle under the device on the
top layer.
ICH = ICC + (VO/RL)
VIN = RMS value of input signal
ICC = 7mA
VS = 5V
RL = channel load resistance
. Minimize all trace lengths to reduce series inductance.
The FMS6141 is specified to operate w ith output currents
typically less than 50 mA, w hich is more than sufficient
for a dual (75 Ω) video load. The internal amplifiers of the
FMS6141 are current limited to a maximum of 100 mA and
can w ithstand a brief-duration short-circuit condition, but
this capability is not guaranteed.
Thermal Considerations
Since the interior of most systems, such as set-top
boxes, TVs, and DVD players are at +70ºC; consideration
must be given to providing an adequate heat sink for the
device package for maximum heat dissipation. When
designing a system board, determine how much pow er
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8
Physical Dimensions
5.00
4.80
A
0.65
3.81
8
5
B
1.75
6.20
5.80
4.00
3.80
5.60
1
4
PIN ONE
INDICATOR
1.27
1.27
(0.33)
M
0.25
C B A
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.25
0.10
0.25
0.19
C
1.75 MAX
0.10
C
0.51
0.33
OPTION A - BEVEL EDGE
0.50
0.25
x 45°
R0.10
R0.10
GAGE PLANE
OPTION B - NO BEVEL EDGE
0.36
NOTES: UNLESS OTHERWISE SPECIFIED
8°
0°
0.90
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
SEATING PLANE
(1.04)
0.406
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
DETAIL A
SCALE: 2:1
Figure 12. SOIC-8 Package
Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change
in any manner without notice. Please note the revision and/or date on the drawing and contact an ON Semiconductor
representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON
Semiconductor’s worldwide terms and conditions, specifically the warranty therein, which covers ON Semiconductor
products.
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9
Physical Dimensions (Continued)
Figure 13. SC70-5 Package
Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change
in any manner without notice. Please note the revision and/or date on the drawing and contact an ON Semiconductor
representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON
Semiconductor’s worldwide terms and conditions, specifically the warranty therein, which covers ON Semiconductor
products.
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10
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the
United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A
listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make
changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor
products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by
ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and
actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for
use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction
or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs,
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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