FMS6363ACSX [ONSEMI]
VoltagePlus™ 三通道HD视频滤波驱动器;
| 型号： | FMS6363ACSX |
| 厂家： | 
ONSEMI |
| 描述： | VoltagePlus™ 三通道HD视频滤波驱动器 驱动 光电二极管 商用集成电路 驱动器 |
| 文件： | 总12页 (文件大小：449K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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August 2011
FMS6363A
Three-Channel 7th-Order High-Definition VoltagePlus™
Video Filter Driver
Features
Description
The FMS6363A VoltagePlus™ video filter is intended to
replace passive LC filters and drivers with a cost-
effective integrated device. The three 7th-order filters
provide improved frequency response performance over
the FMS6363 and other 3-channel HD VFD devices.
.
.
Three 7th-Order 32MHz (HD) Filters
Drives Single AC-or DC-Coupled Video
Loads (150Ω)
.
.
.
.
.
Drives Dual AC-or DC-Coupled Video Loads (75Ω)
Transparent Input Clamping
The FMS6363A may be directly driven by a DC-coupled
DAC output or an AC-coupled signal. Internal diode
clamps and bias circuitry may be used if AC coupled
inputs are required (see Applications section for details).
Single Supply: 3.3V – 5V
AC-or DC-Coupled Inputs and Outputs
The outputs can drive AC-or DC-coupled single (150Ω)
or dual (75Ω) video loads. DC coupling the outputs
removes the need for large output coupling capacitors.
The input DC levels are offset approximately +280mV at
the output (see Applications section for details).
DC-Coupled Output Eliminates AC-Coupling
Capacitor
.
.
Robust 9kV ESD Protection
Lead-Free SOIC-8 Package
Applications
Related Resources
AN-6024 – FMS6xxx Product Series Understanding
Analog Video Signal Clamps, Bias, DC Restore, and AC
or DC coupling Methods
.
.
.
.
.
.
Cable Set-Top Boxes
Satellite Set-Top Boxes
DVD Players
AN-6041 – PCB Layout Considerations for Video
Filter/Drivers
HDTV
Personal Video Recorders (PVR)
Video On Demand (VOD)
Ordering Information
Packing
Method
Part Number
Operating Temperature Range
Package
Quantity
FMS6363ACSX
-40°C to +85°C
8-Lead SOIC
Reel
2500
© 2008 Fairchild Semiconductor Corporation
FMS6363A • Rev. 2.0.2
www.fairchildsemi.com
Block Diagram
Clamp
Bias
6d
6d
6d
IN1
IN2
IN3
OUT1
OUT2
OUT3
B
B
B
Bias
Figure 1.
7th-Order 30MHz Filter
Pin Configuration
OUT1
OUT2
1
2
3
4
8
7
6
5
IN1
IN2
IN3
OUT3
GND
V
CC
Figure 2.
Pin Configuration
Pin Definitions
Pin#
Name
IN1
Type
Input
Description
1
2
3
4
5
6
7
8
Video Input Channel 1
Video Input Channel 2
Video Input Channel 2
Positive Power Supply
Device Ground Connection
Filtered Output Channel 3
Filtered Output Channel 2
Filtered Output Channel 1
IN2
Input
IN3
Input
VCC
Input
GND
OUT3
OUT2
OUT1
Input
Output
Output
Output
© 2008 Fairchild Semiconductor Corporation
FMS6363A • Rev. 2.0.2
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VS
Parameter
Min.
-0.3
-0.3
Max.
6.0
Unit
V
DC Supply Voltage
VIO
Analog and Digital I/O
VCC+0.3
50
V
VOUT
Maximum Output Current, Do Not Exceed
mA
ESD Information
Symbol
Parameter
Min
9
Unit
Human Body Model, JESD22-A114
Charged Device Model, JESD22-C101
ESD
kV
2
Reliability Information
Symbol
Parameter
Min.
Typ.
Max.
+150
+150
+300
Unit
°C
TJ
TSTG
TL
Junction Temperature
Storage Temperature Range
-65
°C
Lead Temperature (Soldering, 10s)
°C
Thermal Resistance, JEDEC Standard,
Multilayer Test Boards, Still Air
115
°C/W
JA
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Operating Temperature Range
Supply Voltage Range
Min.
-40
Typ.
Max.
+85
Unit
°C
VCC
3.14
3.30
5.25
V
© 2008 Fairchild Semiconductor Corporation
FMS6363A • Rev. 2.0.2
www.fairchildsemi.com
3
DC Electrical Characteristics
Unless otherwise noted TA=25°C, VCC=3.3V, RS=37.5Ω; all inputs are AC-coupled with 0.1µF; all output AC-coupled
with 220µF into 150Ω load.
Symbol
Parameter
Conditions
Min.
Typ.
Max. Units
Supply
VS
Supply Voltage Range
VS Range
3.14
3.30
22
5.25
35
V
VS=+3.3V, No Load
VS=+5V, No Load
mA
mA
ICC
Quiescent Supply Current(1)
34
40
Referenced to GND if
DC Coupled
VIN
Video Input Voltage Range
1.4
-60
VPP
dB
PSRR
Power Supply Rejection Ratio
DC (All Channels)
AC Electrical Characteristics
Unless otherwise noted, TA=25°C, VCC=3.3V, RS=37.5Ω; all inputs are AC-coupled with 0.1µF; all outputs AC-coupled
with 220µF into 150Ω load.
Symbol
Parameter
Conditions
Min.
Typ. Max.
Units
dB
AV
Channel Gain
Active Video Input Range = 1VPP
5.8
6.0
28
6.2
BW0.5dB ±0.5dB Bandwidth
BW-1.0dB -1.0 dB Bandwidth
BW3.0dB -3.0 dB Bandwidth
Att37.125M
MHz
MHz
MHz
RSOURCE=75Ω, RL=150Ω
26
30
30
34
R
SOURCE=75Ω, f=37.325MHz
6.5
14.5
44
Att44.25M
Att74.25M
Att78M
RSOURCE=75Ω, f=44.25MHz
RSOURCE=75Ω, f=74.25MHz
RSOURCE=75Ω, f=78MHz
f=10 MHz; VOUT=1.4VPP
f=15 MHz; VOUT=1.4VPP
f=22 MHz; VOUT=1.4VPP
Normalized Stopband
Attenuation
dB
40
46
THD1
-49
-48
-45
Output Distortion
(All Channels)
THD2
dBC
THD3
Crosstalk
(Channel-to-Channel)
Xtalk
SNR
tpd
f=1.00 MHz; VOUT=1.4VPP
-65
65
12
dB
dB
ns
Unweighted: 30MHz Lowpass,
100kHz to 30MHz
Peak Signal to RMS Noise
Propagation Delay
Delay from Input to Output;
100KHz to 28MHz
© 2008 Fairchild Semiconductor Corporation
FMS6363A • Rev. 2.0.2
www.fairchildsemi.com
4
Typical Application
Figure 3.
Typical Application
© 2008 Fairchild Semiconductor Corporation
FMS6363A • Rev. 2.0.2
www.fairchildsemi.com
5
Application Information
Application Circuits
The FMS6363A VoltagePlus™ video filter provides 6dB
gain from input to output. In addition, the input is slightly
offset to optimize the output driver performance. The
offset is held to the minimum required value to decrease
the standing DC current into the load. Typical voltage
levels are shown in Figure 4:
Video Cables
75ꢀ
LOAD2
(optional)
75ꢀ
75ꢀ
0.65V
Y
LOAD1
Driver
IN
Y
OUT
75ꢀ
Video Cables
1.0 -> 1.02V
0.65 -> 0.67V
0.3 -> 0.32V
Figure 5. Input Clamp Circuit
I/O Configurations
For a DC-coupled DAC drive with DC-coupled outputs,
use this configuration:
0.0 -> 0.02V
V
IN
2.28V
1.58V
Driven by:
0V - 1.4V
DC-Coupled DAC Outputs
AC-Coupled and Clamped
Y, CV, R, G, B
DVD or
STB
SoC
LCVF
Clamp
Inactive
75W
0.88V
0.28V
V
OUT
DAC
Output
There is a 280mV offset from the DC input level to the
ꢀ
DC output level. V
= 2 * V + 280mV.
IN
OUT
Figure 6. DC-Coupled Inputs and Outputs
0.85V
0.5V
Alternatively, if the DAC’s average DC output level causes
the signal to exceed the range of 0V to 1.4V, it can be
AC coupled as follows:
0.15V
V
IN
0V - 1.4V
0.1μ
1.98V
1.28V
0.58V
DVD or
STB
SoC
DAC
Output
LCVF
Clamp
Active
75ꢀ
Driven by:
AC-Coupled and Biased
U, V, Pb, Pr, C
V
OUT
Figure 4. Typical Voltage Levels
The FMS6363A provides an internal diode clamp to
support AC coupled input signals. If the input signal
does not go below ground, the input clamp does not
operate. This allows DAC outputs to directly drive the
FMS6363A without an AC coupling capacitor. When the
input is AC coupled, the diode clamp sets the sync tip
(or lowest voltage) just below ground. The worst-case
sync tip compression due to the clamp can not exceed
7mV. The input level set by the clamp, combined with
the internal DC offset, keeps the output within its
acceptable range.
Figure 7. AC-Coupled Inputs, DC-Coupled Outputs
When the FMS6363A is driven by an unknown external
source or a SCART switch with its own clamping circuitry,
the inputs should be AC-coupled like this:
0V - 1.4V
0.1μ
LCVF
Clamp
Active
75ꢀ
External video
source must
be AC coupled
75ꢀ
For symmetric signals like Chroma, U, V, Pb, and Pr;
the average DC bias is fairly constant and the inputs can
be AC-coupled. DAC outputs can also drive these same
signals without the AC coupling capacitor. A conceptual
illustration of the input clamp circuit is shown in Figure 5.
Figure 8. SCART with DC-Coupled Outputs
© 2008 Fairchild Semiconductor Corporation
FMS6363A • Rev. 2.0.2
www.fairchildsemi.com
6
The same method can be used for biased signals. The
Pb and Pr channels are baised to set the DC level to
500mV.
Power Dissipation
The FMS6363A output drive configuration must be
considered when calculating overall power dissipation.
Care must be taken not to exceed the maximum die
junction temperature. The following example can be
used to calculate the power dissipation and internal
temperature rise:
External video
0V -
source must
be AC coupled
0.1µ
220µ
LCVF
Clamp
Active
75
(1)
(2)
(3)
(4)
(5)
TJ = TA + Pd • JA
75
where:
Pd = PCH1 + PCH2 + PCH3
P
CHx = VCC • ICH - (VO2/RL)
Figure 9. Biased SCART with DC-Coupled Outputs
where:
VO = 2VIN + 0.280V
The same circuits can be used with AC-coupled outputs
if desired.
I
CH = (ICC/3) + (VO/RL)
VIN = RMS value of input signal
ICC = 22mA
0V - 1.4V
0.1μ
220μ
DVD or
STB
SoC
LCVF
Clamp
Active
75ꢀ
VCC = 3.3V
DAC
Output
RL = channel load resistance
Board layout can also affect thermal characteristics.
Refer to the Layout Considerations section for details.
The FMS6363A is specified to operate with output
currents typically less than 50mA, more than sufficient
for a dual (75ꢀ) video load. Internal amplifiers are
current limited to a maximum of 100mA and should
withstand brief-duration short-circuit conditions. This
capability is not guaranteed.
Figure 10. DC-Coupled Inputs, AC-Coupled Outputs
0V - 1.4V
0.1μ
220μ
DVD or
STB
SoC
LCVF
Clamp
Active
75ꢀ
DAC
Output
Figure 11. AC-Coupled Inputs and Outputs
External video
source must
be AC coupled
0V -
0.1µ
220µ
LCVF
Clamp
Active
75
75
Figure 12. Biased SCART with AC-Coupled Outputs
Note:
1. The video tilt or line time distortion is dominated by
the AC-coupling capacitor. The value may need to
be increased beyond 220μF to obtain satisfactory
operation in some applications.
© 2008 Fairchild Semiconductor Corporation
FMS6363A • Rev. 2.0.2
www.fairchildsemi.com
7
Layout Considerations
General layout and supply bypassing play a major role
The selection of the coupling capacitor is a function of
the subsequent circuit input impedance and the leakage
current of the input being driven. To obtain the highest
quality output video signal, the series termination
resistor must be placed as close to the device output pin
as possible. This greatly reduces the parasitic
capacitance and inductance effect on the output driver.
Distance from the device pin to the series termination
resistor should be no greater than 2.54mm (0.1in).
in
high-frequency
performance
and
thermal
characteristics. Fairchild offers a evaluation board to
guide layout and aid device evaluation. The evaluation
board is a four-layer board with full power and ground
planes. Following this layout configuration provides
optimum performance and thermal characteristics for
the device. For the best results, follow the steps and
recommended routing rules listed below.
Recommended Routing / Layout Rules
.
.
Do not run analog and digital signals in parallel.
Use separate analog and digital power planes to
supply power.
.
Traces should run on top of the ground plane at all
times.
.
.
.
No trace should run over ground/power splits.
Avoid routing at 90° angles.
Figure 13. Termination Resistor
Minimize clock and video data trace length
differences.
Thermal Considerations
.
.
.
.
.
Include 10μF and 0.1μF ceramic power supply
bypass capacitors.
Since the interior of most systems, such as set-top
boxes, TVs, and DVD players, are at +70ºC;
consideration must be given to providing an adequate
heat sink for the device package for maximum heat
dissipation. When designing a system board, determine
how much power each device dissipates. Ensure that
devices of high power are not placed in the same
location, such as directly above (top plane) or below
(bottom plane), each other on the PCB.
Place the 0.1μF capacitor within 2.54mm (0.1in)
of the device power pin.
Place the 10μF capacitor within 19.05mm (0.75in)
of the device power pin.
For multi-layer boards, use a large ground plane to
help dissipate heat.
For two-layer boards, use a ground plane that
extends beyond the device body at least 12.7mm
(0.5in) on all sides. Include a metal paddle under
the device on the top layer.
PCB Thermal Layout Considerations
.
Understand the system power requirements and
environmental conditions.
.
Minimize all trace lengths to reduce series
inductance.
.
.
Maximize thermal performance of the PCB.
Consider using 70μm of copper for high-power
designs.
Output Considerations
.
.
.
.
Make the PCB as thin as possible by reducing FR4
thickness.
The FMS6363A outputs are DC offset from the input by
150mV; therefore, VOUT = 2•VIN DC+150mV. This offset
is required to obtain optimal performance from the
output driver and is held at the minimum value to
decrease the standing DC current into the load. Since
the FMS6363A has a 2x (6dB) gain, the output is
typically connected via a 75ꢀ-series back-matching
resistor followed by the 75ꢀ video cable. Due to the
inherent divide-by-two of this configuration, the blanking
level at the load of the video signal is always less than
1V. When AC-coupling the output, ensure that the
coupling capacitor of choice passes the lowest
frequency content in the video signal and that line time
distortion (video tilt) is kept as low as possible.
Use vias in the power pad to tie adjacent layers
together.
Remember that baseline temperature is a function
of board area, not copper thickness.
Use modeling techniques to provide a first-order
approximation.
© 2008 Fairchild Semiconductor Corporation
FMS6363A • Rev. 2.0.2
www.fairchildsemi.com
8
Physical Dimensions
5.00
4.80
A
0.65
3.81
8
5
B
1.75
6.20
5.80
4.00
3.80
5.60
1
4
PIN ONE
INDICATOR
1.27
1.27
(0.33)
0.25
C B A
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.25
0.10
0.25
0.19
C
1.75 MAX
0.51
0.33
0.10 C
x 45°
OPTION A - BEVEL EDGE
0.50
0.25
R0.10
R0.10
GAGE PLANE
OPTION B - NO BEVEL EDGE
0.36
NOTES: UNLESS OTHERWISE SPECIFIED
8°
0°
0.90
0.40
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
SEATING PLANE
(1.04)
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
DETAIL A
SCALE: 2:1
Figure 14. 8-Lead Small Outline Integrated Circuit (SOIC)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2008 Fairchild Semiconductor Corporation
FMS6363A • Rev. 2.0.2
www.fairchildsemi.com
9
© 2008 Fairchild Semiconductor Corporation
FMS6363A • Rev. 2.0.2
www.fairchildsemi.com
10
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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