FMS6690MTC20X [ONSEMI]
六通道6阶SD/PS/HD的视频滤波器驱动器;型号: | FMS6690MTC20X |
厂家: | ONSEMI |
描述: | 六通道6阶SD/PS/HD的视频滤波器驱动器 驱动 光电二极管 商用集成电路 驱动器 |
文件: | 总15页 (文件大小:569K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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August 2009
FMS6690
Six Channel, 6th Order, SD/PS/HD Video Filter Driver
Features
Description
The FMS6690 Low-Cost Video Filter (LCVF) is intended
to replace passive LC filters and drivers with a low-cost
integrated device. Six 6th-order Butterworth filters
provide improved image quality compared to typical
passive solutions. The combination of low-power
Standard Definition (SD), Progressive Scan (PS), and
High Definition (HD) filters greatly simplifies DVD video
output circuitry. Three channels offer fixed SD filters
and feature an additional MUXed input, while the other
three channels are selectable between PS and HD
filters. The FMS6690 offers a fixed gain of 6dB.
Three Selectable Sixth-Order 15/32MHz (PS/HD)
Filters
Three Fixed Sixth-Order 8MHz (SD) Filters with
MUXed Input
Transparent Input Clamping
Single Video Load Drive (2VPP, 150Ω, AV= 6dB)
AC-or DC-Coupled Inputs
AC-or DC-Coupled Outputs
DC-Coupled Outputs Eliminate AC-Coupling
Capacitors
The FMS6690 may be directly driven by a DC-coupled
DAC output or an AC-coupled signal. Internal diode
clamps and bias circuitry may be used if AC-coupled
inputs are required (see Applications section for
details).
Low Power
5V Only
The outputs can drive AC-or DC-coupled single (150Ω)
video loads. DC-coupling the outputs removes the need
for output coupling capacitors. The input DC levels are
offset approximately +280mV at the output.
Applications
Cable and Satellite Set-Top Boxes
DVD Players
HDTV
Personal Video Recorders (PVR)
Video On Demand (VOD)
Ordering Information
Operating
Part Number Temperature
Range
Packing
Eco
Status
Package
Method
2500 Units in
Tape and Reel
FMS6690MTC20X
0° to 70°C
RoHS 20-Lead Thin Shrink Outline Package (TSSOP)
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
Block Diagram
Figure 1. Block Diagram
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
2
Pin Configuration
Figure 2. Pin Configuration
Pin Definitions
Pin #
1
Name
SD IN1
Type Description
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
SD Video Input, Channel 1
2
SD IN2
SD Video Input, Channel 2
3
SD IN3A
SD IN3B
VCC
SD Video Input, Channel 3A
4
SD Video Input, Channel 3B
5
+5V Supply
6
FcSEL
Selects Filter Corner Rrequency for Pins 7, 8, and 9; “0” = PS, “1” = HD
Selectable PS or HD Video Input, Channel 1
Selectable PS or HD Video Input, Channel 2
Selectable PS or HD Video Input, Channel 3
No Connect
7
PS/HD IN1
PS/HD IN2
PS/HD IN3
N/C
8
9
10
11
12
13
14
15
16
17
18
19
20
N/C
No Connect
PS/HD OUT3
PS/HD OUT2
PS/HD OUT1
MUXSEL
Output Filtered PS or HD Video Output, Channel 3
Output Filtered PS or HD Video Output, Channel 2
Output Filtered PS or HD Video Output, Channel 1
Input
Input
Input
MUX Selects Between Channel 3A and 3B Inputs; 0 = A, 1 = B
Must Be Tied to Ground
GND
GND
Must Be Tied to Ground
SD OUT3
SD OUT2
SD OUT1
Output Filtered SD Video Output, Channel 3
Output Filtered SD Video Output, Channel 2
Output Filtered SD Video Output, Channel 1
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
VCC
Parameter
Min.
-0.3
-0.3
Max.
Unit
V
DC Supply Voltage
Analog Digital I/O
6.0
VIO
VCC + 0.3
V
IOUT
Output Current, Any One Channel, Do Not Exceed
50
9
mA
Human Body Model, JESD22-A114
Electrostatic Discharge
Capability
ESD
kV
Charged Device Model, JESD22-C101
2
Reliability Information
Symbol
Parameter
Min.
Typ.
Max.
Unit
TJ
TSTG
TL
Junction Temperature
+150
+150
+300
°C
°C
°C
Storage Temperature Range
-65
Lead Temperature, Soldering 10 Seconds
Thermal Resistance, JEDEC Standard, Multi-Layer Test Board,
Still Air
74
°C/W
ΘJA
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Operating Temperature Range
Supply Voltage Range
Min.
0
Typ.
Max.
+70
Unit
°C
VCC
4.75
5.00
5.25
V
DC Electrical Characteristics
Unless otherwise noted, TA=25°C, VCC=5V, AC coupled with 0.1µF, all outputs AC coupled with 220µF into 150Ω
loads, referenced to 400kHz.
Symbol
ICC
Parameter
Supply Current(1)
Conditions
Min.
Typ.
60
Max.
Units
mA
VPP
V
No Load
80
VIN
Video Input Voltage Range Referenced to GND if DC Coupled
1.4
VIL
Digital Input Low(1)
Digital Input High(1)
FcSEL
FcSEL
0
0.8
VIH
2.4
VCC
V
Note:
1. 100% tested at 25°C.
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
4
Standard-Definition Electrical Characteristics
Unless otherwise noted, TA=25°C, VIN=1VPP, VCC=5V, all inputs AC coupled with 0.1µF, all outputs AC coupled with
220µF into 150Ω loads, referenced to 400kHz.
Symbol
AVSD
f1dBSD
fcSD
Parameter
Channel Gain(2)
-1dB Flatness(2)
-3dB Bandwidth(2)
Attenuation (Stopband Reject)(2) All SD Channels at f=27MHz
Conditions
All SD Channels
Min. Typ. Max. Units
5.6
5.20
6.5
43
6.0
7.15
8.0
50
6.4
dB
MHz
MHz
dB
%
All SD Channels
All SD Channels
fSBSD
DG
Differential Gain
All SD Channels
0.7
1.0
0.35
-54
72
DP
Differential Phase
Distortion, Output
Crosstalk (Ch-to-Ch)
Signal-to-Noise Ratio(3)
Propagation Delay
All SD Channels
°
THD
VOUT=1.4VPP, 3.58MHz
at 1MHz
%
XTALKSD
SNR
dB
dB
ns
NTC-7 Weighting, 100kHz to 4.2MHz
Delay from Input to Output, 4.5MHz
tpdSD
90
Notes:
2. 100% tested at 25°C.
3. SNR=20 • log (714mV / rms noise).
Progressive Scan Electrical Characteristics
Unless otherwise noted, TA=25°C, VIN=1VPP, VCC=3.3V, RSOURCE=37.5Ω, all inputs AC coupled with 0.1µF, all outputs
AC coupled with 220µF into 150Ω loads, referenced to 400kHz.
Symbol
AVPS
f1dBSD
fcPS
Parameter
Channel Gain(4)
-1dB Flatness(4)
-3dB Bandwidth(4)
Attenuation (Stopband Reject)(4) All PS Channels at f=54MHz
Conditions
All PS Channels
Min. Typ. Max. Units
5.6
12
13
37
6.0
14
16
45
6.4
dB
MHz
MHz
dB
All PS Channels
All PS Channels
fSBSD
Total Harmonic Distortion,
VOUT=1.4VPP, 7MHz
THD
0.35
%
Output (All PS Channels)
XTALKPS
SNR
Crosstalk (Ch-to-Ch)
Signal-to-Noise Ratio(5)
Propagation Delay
at 1MHz
-53
66
dB
dB
ns
Unweighted, 100kHz to 15MHz
Delay from Input to Output
tpdSD
47
Notes:
4. 100% tested at 25°C.
5. SNR=20 • log (714mV / rms noise).
High-Definition Electrical Characteristics
Unless otherwise noted, TA=25°C, VIN=1VPP, VCC=5V, RSOURCE=37.5Ω, all inputs AC coupled with 0.1µF, all outputs
AC coupled with 220µF into 150Ω loads, referenced to 400kHz.
Symbol
AVHD
Parameter
Channel Gain(6)
-1dB Flatness(6)
-3dB Bandwidth(6)
Attenuation (Stopband Reject)(6)
Conditions
All HD Channels
Min. Typ. Max. Units
5.6
28
30
30
6.0
31
6.4
dB
MHz
MHz
dB
f1dBHD
fcHD
All HD Channels
All HD Channels
34
fSBHD
All HD Channels at f=74.25MHz
41
THD
Output Distortion,(All PS Channels) VOUT=1.4VPP, 22MHz
0.9
-54
60
%
XTALKHD
SNR
Crosstalk (Ch-to-Ch)
Signal-to-Noise Ratio(7)
Propagation Delay
at 1MHz
dB
Unweighted, 100kHz to 30MHz
Delay from Input to Output
dB
tpdHD
25
ns
Notes:
6. 100% tested at 25°C.
7. SNR=20 • log (714mV / rms noise).
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
5
Typical Performance Characteristics
Unless otherwise noted TC=25°C, VIN=1VPP, VCC=5V, RSOURCE=37.5Ω, inputs AC coupled with 0.1µF, all outputs AC
coupled with 220µF into150Ω loads.
Figure 3. SD Gain vs. Frequency
Figure 4. SD Flatness vs. Frequency
Figure 5. PS Gain vs. Frequency
Figure 6. PS Flatness vs. Frequency
Figure 7. HD Gain vs. Frequency
Figure 8. HD Flatness vs. Frequency
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
6
Typical Performance Characteristics
Unless otherwise noted TC=25°C, VIN=1VPP, VCC=5V, RSOURCE=37.5Ω, inputs AC coupled with 0.1µF, all outputs AC
coupled with 220µF into150Ω loads.
Figure 9. SD Group Delay vs. Frequency
Figure 10. Noise vs. Frequency
Figure 11. PS Group Delay vs. Frequency
Figure 12. SD Differential Gain
Figure 13. HD Group Delay vs. Frequency
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
7
Applications Information
Functional Description
The FMS6690 Low-Cost Video Filter (LCVF) provides
6dB gain (9dB optional, contact factory for further
information) from input to output. In addition, the input is
slightly offset to optimize the output driver performance.
The offset is held to the minimum required value to
decrease the standing DC current into the load. Typical
voltage levels are shown in Figure 14.
0.65V
Y
Driver
IN
Y
OUT
800kΩ
Figure 15. Input Clamp Circuit
I/O Configurations
For DC-coupled DAC drive with DC-coupled outputs,
use the configuration in Figure 16.
0V- 1.4V
DVD or
STB
So C
LCVF
Clamp
Inactive
75Ω
DAC
Output
Figure 16. DC-Coupled Inputs and Outputs
Alternatively, if the DAC’s average DC output level
causes the signal to exceed the range of 0V to 1.4V, it
can be AC-coupled, as shown in Figure 17.
0V- 1.4V
0.1µ
DVD or
STB
SoC
LCVF
Clamp
Active
75Ω
DAC
Output
Figure 14. Typical Voltage Levels
The FMS6690 provides an internal diode clamp to
support AC-coupled input signals. If the input signal
does not go below ground, the input clamp does not
operate. This allows DAC outputs to directly drive the
FMS6690 without an AC coupling capacitor. The worst-
case sync tip compression, due to the clamp, does not
exceed 7mV. The input level set by the clamp,
combined with the internal DC offset, keeps the output
within acceptable range. When the input is AC-coupled,
the diode clamp sets the sync tip (or lowest voltage) just
below ground.
Figure 17. AC-Coupled Inputs, DC-coupled Outputs
When the FMS6690 is driven by an unknown external
source or a SCART with its own clamping circuitry, the
inputs should be AC-coupled, shown in Figure 18.
0V- 1.4V
0.1µ
LCVF
75Ω
Ext ern al Vi d eo
Cl amp
source must
Active
beAC-coupled.
For symmetric signals like C, U, V, Cb, Cr, Pb, and Pr;
the average DC bias is fairly constant and the inputs
can be AC-coupled with the addition of a pull-up resistor
to set the DC input voltage. DAC outputs can also drive
these same signals without the AC coupling capacitor.
A conceptual illustration of the input clamp circuit is
shown in Figure 15.
75Ω
Figure 18. SCART with DC-Coupled Outputs
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
8
The same method can be used for biased signals with
the addition of a pull-up resistor to make sure the clamp
never operates. The internal pull-down resistance is
800kΩ ±20%, so the external resistance should be
7.5MΩ to set the DC level to 500mV. If a pull-up
resistance of less than 7.5MΩ desired, add an external
pull-down such that the DC input level is set to 500mV.
(1)
(2)
TJ= TA+ Pd• ΘJA
where Pd= PCH1+ PCH2+ PCHx
and PCHx= VS • ICH- (VO2/RL)
,
where:
VO = 2VIN+ 0.280V;
I
CH = (ICC/ 6) + (VO/RL);
VIN= RMS value of input signal;
CC = 60mA;
I
Ext ern al Vi d eo
VS= 5V; and
RL= channel load resistance.
source must
be AC-coupled.
7.5MΩ
0.1µ
LCVF
Bi as
75Ω
Board layout affects thermal characteristics. Refer to
the Layout Considerations section for more information.
Input
75Ω
500mV+/-350mV
Output Considerations
The FMS6690 outputs are DC offset from the input by
150mV therefore, VOUT = 2•VIN DC+150mv. This offset
is required to obtain optimal performance from the
output driver and is held at the minimum value to
decrease the standing DC current into the load. Since
the FMS6690 has a 2x (6dB) gain, the output is typically
connected via a 75ꢀ-series back-matching resistor
followed by the 75ꢀ video cable. Because of the
inherent divide by two of this configuration, the blanking
level at the load of the video signal is always less then
1V. When AC-coupling the output, ensure that the
coupling capacitor of choice passes the lowest
frequency content in the video signal and that line time
distortion (video tilt) is kept as low as possible.
Figure 19. Biased SCART with DC-Coupled Outputs
The same circuits can be used with AC-coupled outputs
if desired.
0V- 1.4V
220µ
DVD or
STB
SoC
DAC
Output
LCVF
Clamp
Inactive
75Ω
The selection of the coupling capacitor is a function of
the subsequent circuit input impedance and the leakage
current of the input being driven. To obtain the highest-
quality output video signal, the series termination
resistor must be placed as close to the device output
pin as possible. This greatly reduces the parasitic
capacitance and inductance effect on the FMS6690
output driver. The distance from device pin to place
series termination resistor should be no greater than 0.1
inches.
Figure 20. DC-Coupled Inputs, AC-coupled Outputs
Ext er nal vi d eo
sourcemust
beAC-coupled.
7.5MΩ
0.1µ
220µ
LCVF
Clamp
Active
75Ω
75Ω
500mV+/-350mV
Figure 21. Biased SCART with AC-Coupled Outputs
Note:
8. The video tilt or line time distortion is dominated by
the AC-coupling capacitor. The value may need to
be increased beyond 220µF to obtain satisfactory
operation in some applications.
Power Dissipation
The FMS6690 output drive configuration must be
considered when calculating overall power dissipation.
Care must be taken not to exceed the maximum die
junction temperature. The following example can be
used to calculate the FMS6690’s power dissipation and
internal temperature rise.
Figure 22. Distance from Device Pin to Series
Termination Resistor
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
9
Layout Considerations
Layout and supply bypassing play major roles in high-
frequency performance and thermal characteristics.
Include 10µF and 0.1μF ceramic bypass
capacitors.
Fairchild
FMS6690DEMO, to use as a guide for layout and to aid
in device testing and characterization. The
offers
a
demonstration
board,
Place the 10μF capacitor within 0.75 inches of the
power pin.
FMS6690DEMO is a four-layer board with a full power
and ground plane. Following this layout configuration
provides the optimum performance and thermal
characteristics. For optimum results, follow these steps
as a basis for high-frequency layout:
Place the 0.1μF capacitor within 0.1 inches of the
power pin.
For multi-layer boards, use a large ground plane to
help dissipate heat.
For 2 layer boards, use a ground plane that
extends beyond the device by at least 0.5.
Minimize all trace lengths to reduce series
inductances.
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
10
Typical Application
Figure 23. Typical Application Diagram
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
11
Physical Dimensions
Figure 24. 20-Lead Thin Shrink Outline Package (TSSOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
12
© 2006 Fairchild Semiconductor Corporation
FMS6690 • Rev. 1.0.3
www.fairchildsemi.com
13
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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