FND42060F2 [ONSEMI]
智能功率模块 (IPM)，运动控制;
| 型号： | FND42060F2 |
| 厂家： | 
ONSEMI |
| 描述： | 智能功率模块 (IPM)，运动控制 |
| 文件： | 总15页 (文件大小：650K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Motion SPM) 45 Series
FND42060F2
General Description
FND42060F2 is an advanced Motion SPM 45 module providing
a fully−featured, high−performance inverter output stage for AC
Induction, BLDC, and PMSM motors. These modules integrate
optimized gate drive of the built−in IGBTs to minimize EMI and
losses, while also providing multiple on−module protection features
including under−voltage lockouts, over−current shutdown, thermal
monitoring, and fault reporting. The built−in, high−speed HVIC
requires only a single supply voltage and translates the incoming
logic−level gate inputs to the high−voltage, high−current drive signals
required to properly drive the module’s robust short−circuit−rated
IGBTs. Separate negative IGBT terminals are available for each phase
to support the widest variety of control algorithms.
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Features
• UL Certified No. E209204 (UL1557)
• 600 V − 20 A 3−Phase IGBT Inverter with Integral Gate Drivers
and Protection
• Low Thermal Resistance Using Ceramic Substrate
• Low−Loss, Short−Circuit Rated IGBTs
• Built−In Bootstrap Diodes and Dedicated Vs Pins Simplify PCB
Layout
• Built−In NTC Thermistor for Temperature Monitoring
• Separate Open−Emitter Pins from Low−Side IGBTs for
Three−Phase Current Sensing
SPMAA−C26
CASE MODFC
• Single−Grounded Power Supply
Figure 1. Package Overview
(Click to Activate 3D Content)
• Optimized for 5 kHz Switching Frequency
• Isolation Rating: 4000 V /min
rms
• Remove Dummy Pin
MARKING DIAGRAM
Applications
XXXXXXXXXXX
ZZZ ATYWW
NNNNNNN
• Motion Control − Home Appliance/Industrial Motor
Related Resources
®
• AN−9070 − Motion SPM 45 Series Users Guide
XXXX
ZZZ
AT
Y
WW
NNN
= Specific Device Code
= Lot ID
= Assembly and Test Location
= Year
= Work Week
= Serial Number
®
• AN−9071 − Motion SPM 45 Series Thermal Performance
Information
®
• AN−9072 − Motion SPM 45 Series Mounting Guidance
• RD−344 − Reference Design (Three Shunt Solution)
• RD−345 − Reference Design (One Shunt Solution)
ORDERING INFORMATION
Integrated Power Functions
• 600 V−20 A IGBT inverter for three−phase DC/AC
power conversion (Refer to Figure 3)
Device
Package
Shipping
FND42060F2
SPMAA−J26 12 Units/Rail
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
September, 2019 − Rev. 3
FND42060F2/D
FND42060F2
Integrated Drive, Protection and System Control
Functions
• For inverter high−side IGBTs: gate drive circuit,
• Fault signaling: corresponding to UVLO (low−side
supply) and SC faults
• Input interface: active−HIGH interface, works with
3.3/5 V logic, Schmitt−trigger input
high−voltage isolated high−speed level shifting control
circuit Under−Voltage Lock−Out (UVLO) protection
• For inverter low−side IGBTs: gate drive circuit,
Short−Circuit Protection (SCP) control supply circuit,
Under−Voltage Lock−Out (UVLO) protection
PIN CONFIGURATION
V
V
(26)
(25)
B(U)
V
R
(1)
(2)
TH
S(U)
TH
V
V
(24)
(23)
B(V)
S(V)
P (3)
U (4)
V (5)
W (6)
V
V
(22)
(21)
B(W)
S(W)
Case temperature (T )
C
IN (20)
UH
Detecting Point
IN (19)
IN
VH
(18)
WH
V
CC(H)
V
CC(L)
(17)
(16)
COM (15)
IN
(UL)
(14)
IN
IN
(13)
(12)
(VL)
N
(7)
U
(WL)
V
FO
(11)
N (8)
V
C
(10)
SC
N
(9)
W
Figure 2. Top View
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2
FND42060F2
PIN DESCRIPTIONS
Pin Number
Pin Name
Pin Description
1
V
R
Thermistor Bias Voltage
TH
TH
2
Series Resistor for the Use of Thermistor (Temperature Detection)
Positive DC−Link Input
3
P
U
V
4
Output for U−Phase
5
Output for V−Phase
6
W
Output for W−Phase
7
N
Negative DC−Link Input for U−Phase
U
8
N
Negative DC−Link Input for V−Phase
V
9
N
Negative DC−Link Input for W−Phase
Capacitor (Low−Pass Filter) for Short−circuit Current Detection Input
Fault Output
W
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
C
V
SC
FO
(WL)
IN
Signal Input for Low−Side W−Phase
IN
IN
Signal Input for Low−Side V−Phase
(VL)
Signal Input for Low−Side U−Phase
(UL)
COM
Common Supply Ground
V
CC(L)
CC(H)
Low−Side Common Bias Voltage for IC and IGBTs Driving
High−Side Common Bias Voltage for IC and IGBTs Driving
Signal Input for High−Side W−Phase
V
IN
(WH)
IN
IN
Signal Input for High−Side V−Phase
(VH)
(UH)
S(W)
B(W)
Signal Input for High−Side U−Phase
V
V
High−Side Bias Voltage Ground for W−Phase IGBT Driving
High−Side Bias Voltage for W−Phase IGBT Driving
High−Side Bias Voltage Ground for V−Phase IGBT Driving
High−Side Bias Voltage for V−Phase IGBT Driving
High−Side Bias Voltage Ground for U−Phase IGBT Driving
High−Side Bias Voltage for U−Phase IGBT Driving
V
S(V)
V
B(V)
V
S(U)
V
B(U)
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FND42060F2
INTERNAL EQUIVALENT CIRCUIT AND INPUT/OUTPUT PINS
V
R
(1)
(2)
TH
Thermister
TH
P (3)
V
V
(26)
(25)
B(U)
UVB
UVS
S(U)
OUT(UH)
UVS
V
V
(24)
(23)
B(V)
U (4)
VVB
VVS
S(V)
V
V
(22)
(21)
B(W)
WVB
WVS
S(W)
OUT(VH)
VVS
IN (20)
UH
V (5)
IN(UH)
IN(VH)
IN(WH)
IN (19)
VH
IN
(18)
WH
V
CC(H)
(17)
VCC
OUT(WH)
WVS
COM
W (6)
V
(16)
CC(L)
VCC
OUT(UL)
OUT(VL)
OUT(WL)
COM (15)
COM
N
(7)
U
IN
(14)
(UL)
IN(UL)
IN(VL)
IN(WL)
VFO
IN
IN
(13)
(12)
(VL)
(WL)
N (8)
V
V
FO
(11)
C
(10)
SC
C(SC)
N
(9)
W
NOTES:
1. Inverter high−side is composed of three IGBTs, freewheeling diodes, and one control IC for each IGBT.
2. Inverter low−side is composed of three IGBTs, freewheeling diodes, and one control IC for each IGBT. It has gate drive
and protection functions.
3. Inverter power side is composed of four inverter DC−link input terminals and three inverter output terminals.
Figure 3. Internal Block Diagram
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FND42060F2
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise specified)
J
Symbol
Parameter
Conditions
Rating
Unit
INVERTER PART
V
Supply Voltage
Applied between P−N , N , N
450
500
600
20
V
V
V
A
A
PN
PN(Surge)
U
V
W
V
Supply Voltage (Surge)
Applied between P−N , N , N
U V
W
V
CES
Collector−Emitter Voltage
I
C
Each IGBT Collector Current
Each IGBT Collector Current (Peak)
T
T
= 25°C, T ≤ 150°C
J
C
I
= 25°C, T ≤ 150°C, Under 1 ms
40
CP
C
J
Pulse Width
P
C
Collector Dissipation
T
C
= 25°C per Chip
50
W
T
J
Operating Junction Temperature
(Note 2)
−40 ∼ 150
°C
CONTROL PART
V
Control Supply Voltage
Applied between V
, V − COM
CC(H) CC(L)
20
20
V
V
CC
V
High−Side Control Bias Voltage
Applied between V
− V
,
BS
B(U)
S(U)
− V
S(V) B(W) S(W)
V
− V
, V
B(V)
V
IN
Input Signal Voltage
Applied between IN
, IN
, IN
,
−0.3 ∼ V +0.3
V
(UH)
(VH)
(WH)
CC
IN
, IN
, IN
− COM
(UL)
(VL)
(WL)
V
Fault Output Supply Voltage
Fault Output Current
Applied between V − COM
−0.3 ∼ V +0.3
V
mA
V
FO
FO
CC
I
Sink Current at V pin
1
FO
FO
V
SC
Current Sensing Input Voltage
Applied between C − COM
−0.3∼ V +0.3
SC
CC
BOOTSTRAP DIODE PART
V
Maximum Repetitive Reverse Voltage
Forward Current
600
0.50
1.50
V
A
A
RRM
I
F
T
T
= 25°C, T ≤ 150°C
J
C
I
Forward Current (Peak)
= 25°C, T ≤ 150°C, Under 1 ms
J
Pulse Width
FP
C
T
J
Operating Junction Temperature
−40 ∼ 150
°C
TOTAL SYSTEM
V
Self−Protection Supply Voltage Limit
(Short−Circuit Protection Capability)
V
J
= V = 13.5 V ∼ 16.5 V
400
V
PN(PROT)
CC
BS
T = 150°C, Non−repetitive, < 2 ms
T
Storage Temperature
Isolation Voltage
−40 ∼ 125
°C
STG
V
60 Hz, Sinusoidal, AC 1 minute,
Connect Pins to Heat Sink Plate (Note 3)
4000
V
rms
ISO
1. The maximum junction temperature rating of the power chips integrated within the Motion SPM 45 product is 150°C.
2. For the measurement point of case temperature (T ). Please refer to Figure 2.
C
3. For the Recommend Heat−Sink Design, Please refer to Figure 11. if do not follow Recommend Heat−Sink Design, Viso is 2000 Vrms.
THERMAL RESISTANCE
Symbol
Parameter
Conditions
Min.
−
Typ.
−
Max.
2.5
Unit
°C/W
°C/W
R
Junction to Case Thermal Resis-
tance
Inverter IGBT Part (per 1/6 module)
Inverter FWDi Part (per 1/6 module)
th(j−c)Q
R
−
−
3.6
th(j−c)F
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FND42060F2
ELECTRICAL CHARACTERISTICS − INVERTER PART (T = 25°C unless otherwise specified)
J
Symbol
Parameter
Conditions
= 20 A, T = 25°C
Min.
Typ.
Max.
Unit
V
Collector − Emitter Saturation
V
V
= V = 15 V,
I
C
−
1.85
2.35
V
CE(SAT)
CC
IN
BS
J
Voltage
= 5 V
V
FWDi Forward Voltage
Switching Times
V
V
= 0 V
I = 20 A, T = 25°C
−
0.45
−
1.95
0.75
0.20
0.70
0.15
0.15
0.75
0.20
0.75
0.15
0.15
−
2.45
1.25
0.45
1.20
0.40
−
V
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
mA
F
IN
F
J
HS
LS
t
= 300 V, V = V = 15 V, I = 20 A,
PN CC BS C
ON
T = 25°C
J
t
C(ON)
V
IN
= 0 V ⇔ 5 V, Inductive Load
(Note 4)
t
−
OFF
t
−
C(OFF)
t
rr
−
t
V
PN
= 300 V, V = V = 15 V, I = 20 A,
0.45
−
1.25
0.45
1.25
0.40
−
ON
CC
BS
C
T = 25°C
J
t
C(ON)
V
IN
= 0 V ⇔ 5 V, Inductive Load
(Note 4)
t
−
OFF
t
−
C(OFF)
t
rr
−
I
Collector−Emitter Leakage
Current
V
CE
= V
CES
−
5
CES
4. t and t
include the propagation delay of the internal drive IC. t
and t
are the switching time of IGBT itself under the given
ON
OFF
C(ON)
C(OFF)
gate driving condition internally. For the detailed information, please see Figure 4.
100% I
100% I
C
C
t
rr
I
C
I
C
V
CE
V
CE
V
IN
V
IN
t
ON
t
OFF
t
t
c(OFF)
c(ON)
10% I
C
V
IN(ON)
V
IN(OFF)
10% V
10% I
CE
C
90% I 10% V
C
CE
(a) turn − on
(b) turn − off
Figure 4. Switching Time Definition
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FND42060F2
Inductive Load, V = 300 V, V = 15 V, T = 25°C
Inductive Load, V = 300 V, V = 15 V, T = 150°C
PN
CC
J
PN
CC
J
1200
1100
1000
900
1200
1100
1000
900
IGBT Turn−ON, E
IGBT Turn−ON, E
on
on
off
IGBT Turn−OFF, E
IGBT Turn−OFF, E
IGBT Turn−OFF, E
off
rec
IGBT Turn−OFF, E
rec
800
800
700
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
0
2
4
6
8
10
12
14
16 18
20
22
0
2
4
6
8
10
12
14
16 18
20
22
COLLECTOR CURRENT, I [AMPERES]
COLLECTOR CURRENT, I [AMPERES]
C
C
Figure 5. Switching Loss Characteristics (Typical)
CONTROL PART
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
I
Quiescent V Supply Current
V
= 15 V,
(UH,VH.WH)
V
DD(H)
V
CC(L)
V
CC(H)
− COM
− COM
− COM
−
−
0.10
mA
mA
mA
QCCH
CC
CC(H)
IN
= 0 V
I
V
= 15 V,
−
−
−
−
2.65
0.15
QCCL
PCCH
CC(L)
IN
= 0 V
(UL,VL,WL)
I
Operating V Supply Current
V
CC(L)
= 15 V, f
= 20 kHz,
CC
PWM
duty = 50%, Applied to one
PWM Signal Input for High−Side
I
V
= 15 V, f
= 20 kHz,
V
− COM
−
−
−
−
−
−
4.00
0.30
2.00
mA
mA
mA
PCCL
CC(L)
PWM
CC(L)
duty = 50%, Applied to one
PWM Signal Input for Low−Side
I
Quiescent V Supply Current
V
= 15 V,
(UH,VH.WH)
V
B(U)
V
B(V)
V
B(W)
− V
S(V)
− V
,
QBS
BS
BS
S(U)
IN
= 0 V
− V
,
,
,
S(W)
I
Operating V Supply Current
V
PWM
= V = 15 V,
V
B(U)
V
B(V)
V
B(W)
− V
− V
,
PBS
BS
DD
BS
S(U)
S(V)
− V
f
= 20 kHz, duty = 50%,
,
Applied to one PWM Signal
Input for High−Side
S(W)
V
Fault Output Voltage
V
V
V
= 0 V, V Circuit: 10 kW to 5 V Pull−up
4.5
−
−
−
−
0.5
0.55
13.0
13.5
12.5
13.0
−
V
V
FOH
SC
SC
CC
FO
V
= 1 V, V Circuit: 10 kW to 5 V Pull−up
FOL
FO
V
SC(ref)
Short Circuit Trip Level
= 15 V (Note 5)
0.45
10.5
11.0
10.0
10.5
30
0.50
−
V
UV
Supply Circuit Under−Voltage
Protection
Detection Level
Reset Level
V
CCD
CCR
BSD
BSR
UV
UV
UV
−
V
Detection Level
Reset Level
−
V
−
V
t
Fault−Out Pulse Width
ON Threshold Voltage
OFF Threshold Voltage
Resistance of Thermister
−
ms
V
FOD
V
IN(ON)
Applied between IN
IN
IN
(VH),
IN
(WH),
IN
(UL),
−
−
2.6
−
(UH),
− COM
IN
(WL)
(VL),
V
0.8
−
−
V
IN(OFF)
R
@ T = 25°C (Note 6)
47
2.9
−
kW
kW
TH
TH
@ T = 100°C
−
−
TH
5. Short−circuit current protection os functioning only at the low−sides.
6. T is the temperature of thermister itself. To know case temperature (T ), please make the experiment considering your application.
TH
C
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FND42060F2
R−T Curve
600
R−T Curve in 505C ~ 1255C
550
500
20
16
12
8
450
400
350
300
250
200
150
100
4
0
50
60
70
80
90
100
110
120
Temperature [5C]
50
0
−20 −10
0
10
20
30
40
50
60
70
80
90 100 110 120
Temperature, T [5C]
TH
Figure 6. R−T Curve of the Built−In Thermistor
BOOTSTRAP DIODE PART
Symbol
Parameter
Conditions
Min.
−
Typ.
2.5
80
Max.
Unit
V
V
F
Forward Voltage
I = 0.1 A, T = 25°C
−
−
F
C
t
rr
Reverse−Recovery Time
I = 0.1 A, T = 25°C
−
ns
F
C
Built−In Bootstrap Diode V −I Characteristic
F
F
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
T
C
= 25°C
0.0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
F
[V]
NOTE: Built−in bootstrap diode includes around 15 W resistance characteristic.
Figure 7. Built−In Bootstrap Diode Characteristics
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FND42060F2
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Supply Voltage
Conditions
Min.
−
Typ.
300
Max.
400
Unit
V
V
PN
V
CC
Applied between P − N , N , N
U
V
W
Control Supply Voltage
Applied between V
Applied between V
− COM, V
− COM
13.5
13.0
15.0
15.0
16.5
18.5
V
CC(H)
CC(L)
V
BS
High−Side Bias Voltage
− V , V
S(U) B(V)
− V ,
S(V)
V
B(U)
V
− V
B(W)
S(W)
dV /dt,
Control Supply Variation
−1
−
−
1
V/ms
ms
CC
dV /dt
BS
t
Blanking Time for Preventing
Arm−Short
For Each Input Signal
−40°C < T < 150°C
1.5
−
dead
f
PWM Input Signal
−
−
−
20
4
kHz
V
PWM
J
V
SEN
Voltage for Current Sensing
Applied between N , N , N − COM
−4
U
V
W
(Including Surge Voltage)
PW
Minimum Input Pulse Width
(Note 7)
0.7
0.7
−
−
−
−
ms
IN(ON)
PW
IN(OFF)
7. This product might not make response if input pulse width is less than the recommended value.
Allowable Maximum Output Current
18
f
= 5 kHz
SW
16
14
12
10
f
= 15 kHz
SW
8
6
V
= 300 V, V = V = 15 V,
CC BS
DC
4
2
0
T
J
< 150°C, T ≤ 125°C
C
M.I. = 0.9, P.F. = 0.8
Sinusoidal PWM
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140
Case Temperature, T [5C]
C
NOTE: This allowable output current value is the reference data for the safe operation of this product. This may be
different from the actual application and operating condition
Figure 8. Allowable Maximum Output Current
MECHANICAL CHARACTERISTICS AND RATINGS
Value
Min.
0
Typ.
−
Max.
+120
0.8
Parameter
Device Flatness
Conditions
Unit
mm
See Figure 9
Mounting Torque
Mounting Screw: M3
See Figure 10
Recommended 0.7 N•m
Recommended 7.1 kg•cm
0.6
6.2
−
0.7
N•m
kg•cm
g
7.1
8.1
Weight
11.00
−
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FND42060F2
Figure 9. Flatness Measurement Position
Pre−Screwing: 1 à 2
Final Screwing: 2 à 1
Figure 10. Mounting Screws Torque Order
Figure 11. Recommended Heat−Sink Design
NOTES:
8. Do not make over torque when mounting screws. Much mounting torque may cause ceramic cracks, as well as bolts and Al heat−sink
destruction.
9. Avoid one side tightening stress. Figure 10 shows the recommended torque order for mounting screws. Uneven mounting can cause the
ceramic substrate of the SPM 45 package to be damaged. The pre−screwing torque is set to 20 ∼ 30% of maximum torque rating.
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FND42060F2
TIME CHARTS OF PROTECTIVE FUNCTION
Input signal
Protection
Circuit State
RESET
a1
SET
RESET
UV
CCR
a6
Control
Supply Voltage
UV
CCD
a3
a4
a2
a7
Output Current
a5
Fault Output Signal
a1: Control supply voltage rises: after the voltage rises UV
a2: Normal operation: IGBT ON and carrying current.
, the circuits start to operate when next input is applied.
CCR
a3: Under voltage detection (UV
).
CCD
a4: IGBT OFF in spite of control input condition.
a5: Fault output operation starts.
a6: Under voltage reset (UV
).
CCR
a7: Normal operation: IGBT ON and carrying current.
Figure 12. Under−Voltage Protection (Low−Side)
Input signal
Protection
Circuit State
RESET
b1
SET
RESET
UV
BSR
b5
Control
Supply Voltage
UV
BSD
b3
b4
b6
b2
Output Current
High−level (no fault output)
Fault Output Signal
b1: Control supply voltage rises: after the voltage reaches UV
b2: Normal operation: IGBT ON and carrying current.
, the circuits start to operate when next input is applied.
BSR
b3: Under voltage detection (UV
).
BSD
b4: IGBT OFF in spite of control input condition, but there is no fault output signal.
b5: Under voltage reset (UV ).
BSR
b6: Normal operation: IGBT ON and carrying current..
Figure 13. Under−Voltage Protection (High−Side)
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FND42060F2
Lower Arms
Control Input
c6
c7
Protection
Circuit State
SET
RESET
c4
c3
Internal IGBT
Gate−Emitter Voltage
c2
SC
c1
c8
Output Current
SC Reference Voltage
Sensing Voltage
of Shunt Resistance
CR Circuit Time
c5 Constant Delay
Fault Output Signal
(with the external sense resistance and CR connection)
c1: Normal operation: IGBT ON and carrying current.
c2: Short−circuit current detection (SC trigger).
c3: Hard IGBT gate interrupt.
c4: IGBT turns OFF.
c5: Input “LOW”:IGBT OFF state.
c6: Input “HIGH”: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.
c7: IGBT OFF state.
Figure 14. Short−Circuit Protection (Low−Side Operation Only)
INPUT/OUTPUT INTERFACE CIRCUIT
+5 V (for MCU and Control power)
R
PF
= 10 kΩ
SPM
IN
IN
, IN
, IN
(UH)
(VH)
(WH)
, IN
(VL)
, IN
(WL)
(UL)
MCU
VFO
COM
NOTE:
10.RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme in the application and the wiring
impedance of the application’s printed circuit board. The input signal section of the Motion SPM 45 product integrates a 5 kW (typ.)
pull−down resistor. Therefore, when using an external filtering resistor, pay attention to the signal voltage drop at input terminal.
Figure 15. Recommended MCU I/O Interface Circuit
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12
FND42060F2
HVIC
(26) VB(U)
VB(U)
P (3)
U (4)
CBS
CBS
CBS
CBSC
(25) VS(U)
(20) IN(UH)
VS(U)
OUT(UH)
VS(U)
RS
RS
RS
IN(UH)
Gating UH
Gating VH
Gating WH
(24) VB(V)
(23) VS(V)
VB(V)
CBSC
VS(V)
(19) IN
(VH)
OUT(VH)
VS(V)
IN(VH)
V (5)
(22) VB(W)
(21) VS(W)
M
VB(W)
VS(W)
CBSC
(18) IN(WH)
(17) VCC(H)
CDCS
VDC
IN(WH)
VCC
M
C
U
OUT(WH)
VS(W)
+15 V
W (6)
CPS CPS CPS
CSPC15
CSP15
(15) COM
COM
+5 V
LVIC
(16) VCC(L)
VCC
VFO
OUT(UL)
RPF
RSU
NU (7)
CSPC05
CSP05
RS
(11) VFO
Fault
CPF
CBPF
OUT(VL)
RS
(14) IN(UL)
(13) IN(VL)
(12) IN(WL)
RSV
Gating UL
Gating VL
Gating WL
IN(UL)
IN(VL)
IN(WL)
NV (8)
RS
RS
CSC
OUT(WL)
COM
CSC
(10) CSC
(1) VTH
(2) RTH
CPS CPS
CPS
RSW
NW (9)
RF
THERMISTOR
RTH
U−Phase Current
V−Phase Current
W−Phase Current
Input Signal for
Short−Circuit Protection
Temp. Monitoring
NOTES:
11. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2−3 cm).
)
12.By virtue of integrating an application−specific type of HVIC inside the Motion SPM 45 product, direct coupling to MCU terminals without
any optocoupler or transformer isolation is possible.
13.V output is open−drain type. The signal line should be pulled up to the positive side of the MCU or control power supply with a resistor
FO
that makes I up to 1 mA (please refer to Figure 15).
FO
14.Input signal is active−HIGH type. There is a 5 kW resistor inside the IC to pull−down each input signal line to GND. RC coupling circuits
is recommended for the prevention of input signal oscillation. R C time constant should be selected in the range 50 ∼ 150 ns
S
PS
(recommended R = 100 W, C = 1 nF).
S
PS
15.To prevent errors of the protection function, the wiring around R C time constant in the range 1.5 ∼ 2 ms.
F
SC
16.The connection between control GND line and power GND line which includes the N , N , N must be connected to only one point.
U
V
W
Please do not connect the control GND to the power GND by the broad pattern. Also, the wiring distance between control GND and power
GND should be as short as possible.
17.Each capacitor should be mounted as close to the pins of the Motion SPM 45 product as possible.
18.To prevent surge destruction, the wiring between the smoothing capacitor and the P & GND pins should be as short as possible. The
use of a high−frequency non−inductive capacitor of around 0.1 ∼ 0.22 ms between the P and GND pins is recommended.
19.Relays are used in almost every systems of electrical equipment in home appliances. In these cases, there should be sufficient distance
between the MCU and the relays.
20.The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each
pair of control supply terminals (recommended zener diode is 22 V/1 W. which has the lower zener impedance characteristic than
about 15 W).
21.Please choose the electrolytic capacitor with good temperature characteristic in C . Also choose 0.1 ∼ 0.2 mF R−category ceramic
BS
capacitors with good temperature and frequency characteristics in C
.
BSC
22.For the detailed information, please refer to the AN−9070, AN−9071, AN−9072, RD−344 and RD−345.
Figure 16. Typical Application Circuit
SPM is registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.
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13
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SPMAA−C26 / 26LD, PDD STD CERAMIC TYPE, LONG LEAD DUAL FORM TYPE
CASE MODFC
ISSUE O
DATE 31 JAN 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13555G
SPMAA−C26 / 26LD, PDD STD CERAMIC TYPE, LONG LEAD DUAL
PAGE 1 OF 1
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