FOD3180TV [ONSEMI]
2 A 输出电流，高速 MOSFET 门极驱动器光耦合器;
| 型号： | FOD3180TV |
| 厂家： | 
ONSEMI |
| 描述： | 2 A 输出电流，高速 MOSFET 门极驱动器光耦合器 驱动 输出元件 光电 驱动器 |
| 文件： | 总14页 (文件大小：387K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
2 A Output Current, High
Speed MOSFET Gate Driver
Optocoupler
PDIP8 6.6x3.81, 2.54P
CASE 646BW
8
1
PDIP8 9.655x6.6, 2.54P
CASE 646CQ
8
8
FOD3180
1
1
Description
PDIP8 GW
CASE 709AC
The FOD3180 is a 2 A Output Current, High Speed MOSFET Gate
Drive Optocoupler. It consists of a aluminium gallium arsenide
(AlGaAs) light emitting diode optically coupled to a CMOS detector
with PMOS and NMOS output power transistors integrated circuit
power stage. It is ideally suited for high frequency driving of power
MOSFETs used in Plasma Display Panels (PDPs), motor control
inverter applications and high performance DC/DC converters.
The device is packaged in an 8−pin dual in−line housing compatible
with 260°C reflow processes for lead free solder compliance.
PDIP8 GW
CASE 709AD
8
1
MARKING DIAGRAM
Features
3180
VXXYYB
• Guaranteed Operating Temperature Range of −40°C to +100°C
• 2 A Minimum Peak Output Current
• High Speed Response: 200 ns Max Propagation Delay over
3180 = Device Number
V
Temperature Range
= VDE Mark (NOTE: Only Appears on Parts
Ordered with VDE Option − See Order
Table)
• 250 kHz Maximum Switching Speed
• 30 ns Typ Pulse Width Distortion
XX = Two Digit Year Code, e.g., ‘03’
YY = Two Digit Work Week, Ranging from ‘01’ to
‘53’
• Wide V Operating Range: 10 V to 20 V
CC
• 5000 Vrms, 1 Minute Isolation
B
= Assembly Package Code
• Under Voltage Lockout Protection (UVLO) with Hysteresis
• Minimum Creepage Distance of 7.0 mm
• Minimum Clearance Distance of 7.0 mm
• C−UL, UL and VDE* Approved
FUNCTIONAL BLOCK DIAGRAM
FOD3180
• R
of 1.5 W (Typ.) Offers Lower Power Dissipation
DS(ON)
1
2
8
7
NO CONNECTION
ANODE
VCC
• 15 kV/ms Minimum Common Mode Rejection
• These are Pb−Free Devices
OUTPUT
Applications
CATHODE 3
6 OUTPUT
5 VEE
• Plasma Display Panel
• High Performance DC/DC Convertor
• High Performance Switch Mode Power Supply
• High Performance Uninterruptible Power Supply
• Isolated Power MOSFET Gate Drive
NO CONNECTION 4
NOTE: A 0.1 mF bypass capacitor must be
connected between pins 5 and 8.
*Requires “V” ordering option
ORDERING INFORMATION
See detailed ordering and shipping information on page 9 of
this data sheet.
© Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
April, 2023 − Rev. 2
FOD3180/D
FOD3180
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Value
−40 to +125
−40 to +100
−40 to +125
260 for 10 sec.
25
Unit
°C
°C
°C
°C
mA
ns
A
T
STG
Storage Temperature
T
OPR
Operating Temperature
T
J
Junction Temperature
TSOL
Lead Solder Temperature
Average Input Current (Note 1)
LED Current Minimum Rate of Rise/Fall
I
F(AVG)
I
250
F(tr, tf)
I
Peak Transient Input Current (<1 ms Pulse Width, 300 pps)
Reverse Input Voltage
1.0
F(TRAN)
V
R
5
V
I
“High” Peak Output Current (Note 2)
“Low” Peak Output Current (Note 2)
Supply Voltage
2.5
A
OH(PEAK)
I
2.5
A
OL(PEAK)
V
– V
−0.5 to 25
V
CC
EE
V
Output Voltage
0 to V
V
O(PEAK)
CC
P
P
Output Power Dissipation (Note 3)
Total Power Dissipation (Note 4)
250
295
mW
mW
O
D
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Derate linearly above +70°C free air temperature at a rate of 0.3 mA/°C.
2. The output currents I and I are specified with a capacitive current limited load = (3 x 0.01 mF) + 0.5 W, frequency = 8 kHz, 50% DF.
OH
OL
3. Derate linearly above +87°C, free air temperature at the rate of 0.77 mW/°C. Refer to Figure 13.
4. No derating required across operating temperature range.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
10 to 20
10 to 16
−3.0 to 0.8
Unit
V
V
CC
– V
Power Supply
EE
I
Input Current (ON)
Input Voltage (OFF)
mA
V
F(ON)
V
F(OFF)
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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2
FOD3180
ELECTRICAL−OPTICAL CHARACTERISTICS (DC) (Over recommended operating conditions unless otherwise specified.)
Symbol
Parameter
Test Conditions
= (V – V – 1 V)
Min
0.5
2.0
0.5
2.0
Typ*
−
Max
−
Unit
I
High Level Output Current (Note 5) (Note 6)
V
OH
V
OH
V
OL
V
OL
A
OH
CC
EE
= (V – V – 3 V)
−
−
CC
EE
I
OL
Low Level Output Current (Note 5) (Note 6)
= (V – V – 1 V)
−
−
A
CC
EE
= (V – V – 3 V)
−
−
CC
EE
V
High Level Output Voltage (Note 7) (Note 8)
Low Level Output Voltage (Note 7) (Note 8)
High Level Supply Current
I
I
= −100 mA
= 100 mA
V – 0.5
CC
−
−
V
V
OH
O
O
V
−
−
−
V
+ 0.5
OL
EE
I
Output Open, I = 10 to 16 mA
4.8
5.0
−
6.0
6.0
8.0
−
mA
mA
mA
V
CCH
F
I
Low Level Supply Current
Output Open, V = −3.0 to 0.8 V
−
CCL
F
I
Threshold Input Current Low to High
Threshold Input Voltage High to Low
Input Forward Voltage
I
O
I
O
= 0 mA, V > 5 V
−
FLH
O
V
FHL
= 0 mA, V < 5 V
0.8
1.2
−
−
O
V
I = 10 mA
F
1.43
−1.5
8.3
7.7
0.6
−
1.8
−
V
F
DV / T
Temperature Coefficient of Forward Voltage I = 10 mA
mV/°C
V
F
A
F
VU
UVLO Threshold
V
> 5 V, I = 10 mA
−
−
VLO+
O
O
F
V
V
< 5 V, I = 10 mA
−
−
V
UVLO–
F
UVLO
BV
UVLO Hysteresis
−
−
V
HYST
Input Reverse Breakdown Voltage
Input Capacitance
I
R
= 10 mA
5
−
V
R
C
f = 1 MHz, V = 0 V
−
60
−
pF
IN
F
*Typical values at T = 25°C
A
5. The output currents I and I are specified with a capacitive current limited load = (3 x 0.01 mF) + 0.5 W, frequency = 8 kHz, 50% DF.
OH
OL
6. The output currents I and I are specified with a capacitive current limited load = (3 x 0.01 mF) + 8.5 W, frequency = 8 kHz, 50% DF.
OH
OL
7. In this test, V is measured with a dc load current of 100 mA. When driving capacitive load V will approach V as I approaches zero
OH
OH
CC
OH
amps.
8. Maximum pulse width = 1 ms, maximum duty cycle = 20%.
SWITCHING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.)
Symbol
Parameter
Test Conditions
I = 10 mA, R = 10 W,
Min
Typ*
Max
Unit
t
Propagation Delay Time to High Output
Level (Note 9)
50
135
200
ns
PLH
F
g
f = 250 kHz, Duty Cycle = 50%,
C = 10 nF
g
t
Propagation Delay Time to Low Output
Level (Note 9)
50
105
200
ns
PHL
P
Pulse Width Distortion (Note 10)
−
−
−
65
90
ns
ns
WD
P
PHL
Propagation Delay Difference Between Any
) Two Parts (Note 11)
PLH
−90
DD
– t
(t
t
Rise Time
C = 10nF, R = 10 W
−
−
75
55
2.0
0.3
−
−
−
−
−
−
ns
ns
r
L
g
t
Fall Time
f
t
UVLO Turn On Delay
UVLO Turn Off Delay
−
ms
UVLO ON
t
−
ms
UVLO OFF
| CM
|
Output High Level Common Mode Transient T = +25°C, I = 10 to 16 mA,
Immunity (Note 12) (Note 13)
15
kV/ms
H
A
f
V
= 1.5 kV, V = 20 V
CM CC
| CM |
Output Low Level Common Mode Transient T = +25°C, V = 0 V,
15
−
−
kV/ms
L
A
V
f
Immunity (Note 12) (Note 14)
= 1.5 kV, V = 20 V
CM CC
*Typical values at T = 25°C
A
9. t
propagation delay is measured from the 50% level on the falling edge of the input pulse to the 50% level of the falling edge of the V
PHL
O
signal. t
propagation delay is measured from the 50% level on the rising edge of the input pulse to the 50% level of the rising edge of the
PLH
V
O
signal.
10.PWD is defined as | t
– t
PLH
| for any given device.
PHL
11. The difference between t
and t
between any two FOD3180 parts under same test conditions.
PHL
PLH
12.Pin 1 and 4 need to be connected to LED common.
13.Common mode transient immunity in the high state is the maximum tolerable dVCM/dt of the common mode pulse VCMto assure that the output
will remain in the high state (i.e. VO > 10.0 V).
14.Common mode transient immunity in a low state is the maximum tolerable dV /dt of the common mode pulse, V , to assure that the output
CM
CM
will remain in a low state (i.e. V < 1.0 V).
O
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3
FOD3180
ISOLATION CHARACTERISTICS
Symbol
Parameter
Test Conditions
T = 25°C, R.H. < 50%,
Min
Typ*
Max
Unit
V
ISO
Withstand Isolation Voltage (Note 15)
(Note 16)
5000
−
−
Vrms
A
t = 1 min., I
≤ 20 mA
I−O
11
R
C
Resistance (Input to Output) (Note 16)
Capacitance (Input to Output)
V
= 500 V
−
−
10
−
−
W
I−O
I−O
I−O
Freq. = 1 MHz
1
pF
*Typical values at T = 25°C
A
15.In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000 Vrms, 60 Hz for 1 second (leakage
detection current limit I < 5 mA).
I−O
16.Device considered a two−terminal device: pins on input side shorted together and pins on output side shorted together.
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4
FOD3180
TYPICAL PERFORMANCE CURVES
100
10
6
V
V
= 10 to 20 V
= 0
CC
EE
5
4
3
2
1
0
Output = Open
T = 100°C
A
T = −40°C
A
1
T = 25°C
A
0.1
0.01
0.001
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
−40 −20
0
20
40
60
80
100
V , FORWARD VOLTAGE (V)
F
T , AMBIENT TEMPERATURE (°C)
A
Figure 1. Input Forward Current vs.
Forward Voltage
Figure 2. Low To High Input Current Threshold vs.
Ambient Temperature
0.30
0.00
V (OFF) = −3.0 V to 0.8 V
F
V = 10 V to 20 V, V = 0
CC EE
I
V
V
= 100 mA
= 10 V to 20 V
= 0
I = 10 mA to 16 mA
F
OUT
0.25
0.20
0.15
0.10
0.05
0.00
−0.05
−0.10
−0.15
−0.20
−0.25
−0.30
I
= −100 mA
CC
EE
OUT
−40 −20
0
20
40
60
80
100
−40 −20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 3. Output Low Voltage vs. Ambient
Temperature
Figure 4. High Output Voltage Drop vs.
Ambient Temperature
6.2
6.2
5.8
5.4
5.0
4.6
4.2
3.8
V
= 20 V, V = 0
I = 10 mA (for I
)
CC
EE
F
CCH
I = 10 mA (for I
)
I = 0 mA (for I
)
F
CCH
F
CCL
5.8
5.4
5.0
4.6
4.2
3.8
I = 0 mA (for I
F
)
T = 25°C, V = 0 V
A EE
CCL
I
I
CCL
CCL
I
I
CCH
CCH
−40 −20
0
20
40
60
80
100
10
12
14
16
18
20
T , AMBIENT TEMPERATURE (°C)
A
V
CC
, SUPPLY VOLTAGE (V)
Figure 5. Supply Current vs. Ambient Temperature
Figure 6. Supply Current vs. Supply Voltage
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5
FOD3180
TYPICAL PERFORMANCE CURVES (continued)
200
180
160
140
120
100
80
200
V
= 20 V, V = 0
V
CC
= 20 V, V = 0
CC
EE
EE
I = 10 mA, T = 25°C
R
= 10 W, C = 10 nF
F
A
G
G
180
160
140
120
100
80
R
= 10 W
f = 250 kHz, D. Cycle = 50%
T = 25°C
A
G
f = 250 kHz, D. Cycle = 50%
t
t
t
PHL
PHL
PLH
PLH
t
60
5
60
10
15
20
25
6
8
10
12
14
16
C , LOAD CAPACITANCE (nF)
G
I , FORWARD LED CURRENT (mA)
F
Figure 7. Propagation Delay vs.
Load Capacitance
Figure 8. Propagation Delay vs.
Forward LED Current
200
180
160
140
120
100
80
200
180
160
140
120
100
80
V
= 20 V, V = 0
V
= 20 V, V = 0
CC
EE
CC EE
I = 10 mA, T = 25°C
I = 10 mA
F
R = 10 W, C = 10 nF
G G
f = 250 kHz, D. Cycle = 50%
F
A
C
= 10 nF
G
f = 250 kHz, D. Cycle = 50%
t
PHL
t
t
PHL
t
PLH
PLH
60
10
60
20
30
40
50
−40 −20
0
20
40
60
80
100
R , SERIES LOAD RESISTANCE (W)
G
T , AMBIENT TEMPERATURE (°C)
A
Figure 9. Propagation Delay vs.
Series Load Resistance
Figure 10. Propagation Delay vs.
Ambient Temperature
180
I = 10 mA, T = 25°C
F
A
R
= 10 W, C = 10 nF
G
G
160
140
120
100
80
f = 250 kHz, D. Cycle = 50%
t
PHL
PLH
t
60
10
15
20
25
V
CC
, SUPPLY VOLTAGE (V)
Figure 11. Propagation Delay vs. Supply Current
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6
FOD3180
REFLOW PROFILE
300
250
200
150
100
50
245°C, 10 − 30 s
260°C peak
Time above 183°C, <160 s
Ramp up = 2 − 10°C/s
• Peak reflow temperature: 260°C (package surface temperature)
• Time of temperature higher than 183°C for 160 seconds or less
• One time soldering reflow is recommended
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
Time (Minute)
Figure 12. Reflow Profile
OUTPUT POWER DERATING
The output power is the product of the average output
The maximum package power dissipation is 295 mW. The
package is limited to this level to ensure that under normal
operating conditions and over extended temperature range
that the semiconductor junction temperatures do not exceed
125°C. The package power is composed of three elements;
the LED, static operating power of the output IC, and the
power dissipated in the output power MOSFET transistors.
The power rating of the output IC is 250 mW. This power is
divided between the static power of the integrated circuit,
current squared times the output transistor’s R
:
DS(ON)
PO(AVG) + IO(AVG)2 @ RDS(ON)
(eq. 1)
The I
is the product of the duty factor times the peak
O(AVG)
current flowing in the output. The duty factor is the ratio of
the ‘on’ time of the output load current divided by the period
of the operating frequency. An R
of 2.0 W results in
DS(ON)
an average output load current of 200 mA. The load duty
factor is a ratio of the average output time of the power
MOSFET load circuit and period of the driving frequency.
The maximum permissible, operating frequency is
determined by the load supplied to the output at its resulting
output pulse width. Figure 14 shows an example of a 0.03 mF
gate to source capacitance with a series resistance of 8.50 W.
This reactive load results in a composite average pulse width
of 1.5 ms. Under this load condition it is not necessary to
derate the absolute maximum output current until the
frequency of operation exceeds 63 kHz.
which is the product of I times the power supply voltage
DD
(V
− V ). The maximum IC static output power is
DD
EE
150 mW, (V − V ) = 25 V, I = 6 mA. This maximum
DD
EE
DD
condition is valid over the operational temperature range of
−40°C to +100°C. Under these maximum operating
conditions, the output of the power MOSFET is allowed to
dissipate 100 mW of power.
The absolute maximum output power dissipation versus
ambient temperature is shown in Figure 13. The output
driver is capable of supplying 100 mW of output power over
the temperature range from −40°C to 87°C. The output
derates to 90 mW at the absolute maximum operating
temperature of 100°C.
2.5
2
0.15
V
DD
– V = Max. = 25 V
EE
1.5
I
= 6 mA
DD
T = −40°C to 100°C
Load = .03 mF +8.5 W
A
LED Power = 45 mW
V
= 20 V
DD
1
0.5
0
0.1
0.05
0
I = 12 mA
F
LED Duty Factor = 50%
Output Pulse Width = 1.5 ms
1
10
100
F, FREQUENCY (kHz)
Figure 14. Output Current Derating vs. Frequency
−40 −20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
Figure 13. Absolute Maximum Power Dissipation vs.
Ambient Temperature
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7
FOD3180
I
AND I TEST CONDITIONS
This device is tested and specified when driving a
Figure 15 illustrates the relationship of the LED input
drive current and the device’s output voltage and sourcing
and sinking currents. The 0.03 mF capacitor load rep
resents the gate to source capacitance of a very large
power MOSFET transistor. A single supply voltage of 20 V
is used in the evaluation.
OH
OL
complex reactive load. The load consists of a capacitor in the
series with a current limiting resistor. The capacitor
represents the gate to source capacitance of a power
MOSFET transistor. The test load is a 0.03 mF capacitor in
series with an 8.5 W resistor. The LED test frequency is
Figure16 shows the test schematic to evaluate the out− put
voltage and sourcing and sinking capability of the device.
10.0 kHz with a 50% duty cycle. The combined I and I
OH
OL
output load current duty factor is 0.6% at the test frequency.
The I and I are measured at the peak of their respective
OH OL
current pulses.
I = 8 mA
F
OFF
LED
ON
20 V
0
N−Channel (ON)
P−Channel (ON)
= 2.2 A
OUTPUT
I
OH
Load
Current
I
OL
= 2.2 A
1 ms/Div
Figure 15. FOD 3180 Output Current and Output Voltage vs. LED Drive
Pulse
Generator
FOD3180
1
2
3
4
8
7
6
5
0.1 mF
IOMON
VO
0.33 mF
IFMON
22 mF
8.5 W
100 W
100 W
Figure 16. Test Schematic
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8
FOD3180
ORDERING INFORMATION
†
Option
Order Entry Identifier (Example)
FOD3180
Description
No option
Standard Through Hole Device
Surface Mount, Lead Bend
Surface Mount, Tape and Reel
0.4” Lead Spacing
S
SD
T
FOD3180S
FOD3180SD
FOD3180T
V
FOD3180V
VDE 0884
TV
SV
SDV
FOD3180TV
VDE 0884, 0.4” Lead Spacing
VDE 0884, Surface Mount
VDE 0884, Surface Mount, Tape and Reel
FOD3180SV
FOD3180SDV
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 6.6x3.81, 2.54P
CASE 646BW
ISSUE O
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13445G
PDIP8 6.6X3.81, 2.54P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 9.655x6.6, 2.54P
CASE 646CQ
ISSUE O
DATE 18 SEP 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13446G
PDIP8 9.655X6.6, 2.54P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 GW
CASE 709AC
ISSUE O
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13447G
PDIP8 GW
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 GW
CASE 709AD
ISSUE O
DATE 31 JUL 2016
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98AON13448G
PDIP8 GW
PAGE 1 OF 1
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