FOD8160 [ONSEMI]
高抗噪能力、3.3 V/5 V, 10 Mbit/秒 逻辑栅极光电耦合器;
| 型号： | FOD8160 |
| 厂家： | 
ONSEMI |
| 描述： | 高抗噪能力、3.3 V/5 V, 10 Mbit/秒 逻辑栅极光电耦合器 栅 输出元件 光电 栅极 |
| 文件： | 总17页 (文件大小：726K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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2013 年 9 月
FOD8160
高抗噪能力、3.3 V / 5 V、10 Mbit/sec 逻辑门光电耦合器，采
用宽体 SOP 5 引脚封装
特性
■ Optoplanar® 封装技术允许大于10 mm的爬电和间隙距
说明
FOD8160 是一款 3.3V/5V 高速逻辑门输出 （开路集电极
输出）光电耦合器，支持隔离式通信，允许数字信号在不
传导接地环路或危险电压的情况下在系统间通信。该器件
采用飞兆专有的 Optoplanar® 共面封装技术，优化了 IC
设计，通过高共模抑制规格实现了高抗噪能力。
离以及 0.5 mm 的绝缘距离，以实现可靠的高绝缘电压
■ 通过共模瞬变抑制 (CMTi) 实现高抗噪能力
–20kV/µs 最小 CMTI
■ 保证 3 V 至 5.5 V 电源电压规格和 -40°C 到 100°C 的扩
展工业温度范围
FOD8160 封装在宽体 SOP 5 引脚封装中，它由一个铝砷
化铝镓 （AlGaAs） LED 和一个集成式高速光检测器组
成。检测器 IC 输出是一个开路集电极肖特基箝位晶体
管。电子和开关性能在 -40°C
围内得到了保证， VCC 范围为 3V 至 5.5V。
■ 高速， 10 Mbit/sec 数据速率 (NRZ)
■ 安全和法规认证
至 100°C 的扩展工业温度范
–UL1577， 5000 VACRMS 持续 1 分钟
–DIN-EN/IEC60747-5-5， 1414 V 峰值工作绝缘电压
（待审批）
功能原理图
应用
V
V
1
3
6
5
4
ANODE
CC
O
■ 隔离智能功率模块
■ 隔离工业通信接口
相关资源
■ www.fairchildsemi.com/products/opto/
■ www.fairchildsemi.com/pf/FO/FODM8061.html
■ www.fairchildsemi.com/pf/FO/FODM611.html
CATHODE
GND
©2012 飞兆半导体公司
FOD8160 Rev. 1.0.1
www.fairchildsemi.com
真值表
LED
输出
关断
导通
高
低
引脚定义
引脚号
名称
说明
1
3
4
5
6
阳极
阴极
GND
VO
阳极
阴极
输出地
输出电压
输出电源电压
VCC
引脚布局
1
6
5
4
V
V
ANODE
CC
O
3
CATHODE
GND
©2012 飞兆半导体公司
www.fairchildsemi.com
FOD8160 Rev. 1.0.1
2
安全性和绝缘标准
根据 DIN EN/IEC60747-5-5 （待审批），此光电耦合器仅适用于安全极限数据之内的 “安全电气绝缘”。通过保护性
电路确保各项安全标准达标。
符号
参数
安装标准符合 DIN VDE 0110/1.89 表 1
对于额定市电电压 <150 Vrms
对于额定市电电压 <300 Vrms
对于额定市电电压 <450 Vrms
对于额定市电电压 <600 Vrms
气候分类
最小值
典型值 最大值 单位
I–IV
I–IV
I–IV
I–IV
40/100/21
2
污染等级 (DIN VDE 0110/1.89)
相比漏电起痕指数
CTI
VPR
175
2,651
Vpeak
输入至输出测试电压，方法 b，
VIORM x 1.875 = VPR， 100 % 生产测试，
tm = 1 s，局部放电 <5 pC
2,121
Vpeak
输入至输出测试电压，方法 a，
VIORM x 1.5 = VPR，类型和样品测试，
tm = 60 s，局部放电 <5 pC
VIORM
VIOTM
1,414
8,000
10.0
10.0
0.5
Vpeak
Vpeak
mm
最大工作绝缘电压
最高允许过电压
外部爬电距离
mm
外部绝缘间隙
mm
绝缘厚度
安全极限值 – 发生故障时允许的最大值
壳体温度
TS
IS,INPUT
PS,OUTPUT
RIO
150
200
600
109
°C
mA
mW
Ω
输入电流
输出功率
TS, VIO = 500V 时的绝缘阻抗
©2012 飞兆半导体公司
www.fairchildsemi.com
FOD8160 Rev. 1.0.1
3
绝对最大额定值
应力若超过绝对最大额定值，可能会损坏器件。在超出推荐的工作条件和应力的情况下，该器件可能无法正常工作，所
以不建议让器件在这些条件下工作。此外，过度暴露在高于推荐的工作条件的应力下，会影响器件的可靠性。绝对最大
额定值仅为额定应力值。 TA = 25°C，除非另有说明。
符号
TSTG
TOPR
TJ
参数
数值
单位
°C
存储温度
工作温度
结温
-40 至 +125
-40 至 +100
-40 至 +125
10 秒 260
°C
°C
TSOL
°C
引脚焊接温度
（请参阅第 12 页上的回流焊温度曲线）
输入特性
IF
25
5.0
45
mA
V
平均正向输入电流
反向输入电压
输入功耗 (1)
VR
PDI
mW
输出特性
VCC
VO
V
V
电源电压
0 至 7.0
输出电压
-0.5 至 VCC + 0.5
IO
50
85
mA
mW
平均输出电流
输出功耗 (1)
PDO
注意：
1. 至 100°C 无需降额。
推荐工作条件
推荐的操作条件表定义了器件的真实工作条件。指定推荐的工作条件，以确保器件的最佳性能达到数据表中的规格。
飞兆不建议超出额定或依照绝对最大额定值进行设计。
符号
TA
参数
最小值
-40
最大值
+100
5.5
单位
ºC
工作环境温度
电源电压 (2)
VCC
VFL
IFL
3.0
V
0
0.8
V
逻辑低输入电压
逻辑低输入电流
逻辑高输入电流
扇出 (RL = 1 k¾)
输出上拉电阻
250
15
µA
mA
IFH
N
6.0
5
TTL 负载
RL
330
4,000
Ω
注意：
2. 0.1 µF 旁路电容必须连接在引脚 4 和 6 之间。
©2012 飞兆半导体公司
FOD8160 Rev. 1.0.1
www.fairchildsemi.com
4
绝缘特性
应用于所有推荐的条件；典型值测量条件为 TA = 25°C.
符号
参数
工作条件
最小值 典型值 最大值
单位
VISO
5,000
VACRMS
输入输出绝缘
电压
TA = 25°C, R.H. < 50%, t = 1.0 min,
II-O < 20 µA(3)(4)
RISO
CISO
Isolation Resistance
VI-O = 500 V(3)
1011
1.0
Ω
VI-O = 0 V, 频率 = 1.0 MHz(3)
pF
绝缘电容
注：
3. 器件属于双端器件：引脚 1 和 3 短接在一起，引脚 4、 5 和 6 短接在一起。
4. 1 分钟期间的 5000 VACRMS 与 1 秒钟期间的 6000 VACRMS 等效。
电气特性
适用于推荐的所有条件； TA = -40°C 至 +100°C， 3.0 V < VCC < 5.5 V ；除非另有说明。
典型值测量条件为 TA = 25°C，且 VCC = 3.3 V 或 VCC = 5 V。
符号
参数
工作条件
最小值 典型值 最大值
单位
图
输入特性
VF
IF = 10 mA
1.05
5.0
1.45
-1.8
1.80
V
mV/°C
V
1
正向电压
Δ(VF/TA)
BVR
正向电压温度系数
IR = 10 µA
输入反向
击穿电压
IFHL
VO = 0.6 V,
IOL(sink) = 13 mA
2.5
0.4
6.0
0.6
mA
2
3
输入电流阈值
输出特性
VOL
V
逻辑低输出电压
逻辑高输出电流
IF = 额定 IFHL
,
I
OL （灌电流） = 13 mA
IOH
ICCL
ICCH
IF = 250 µA, VO = 3.3 V
IF = 250 µA, VO = 5.0 V
IF = 10 mA, VCC = 3.3 V
IF = 10 mA, VCC = 5.0 V
IF = 0 mA, VCC = 3.3 V
IF = 0 mA, VCC = 5.0 V
8.0
3.0
5.3
7.1
3.5
5.3
50.0
40.0
8.5
µA
µA
4
4
mA
mA
mA
mA
5, 7
5, 7
6, 7
6, 7
逻辑低输出电源电流
逻辑高输出电源电流
10.0
7.0
9.0
©2012 飞兆半导体公司
www.fairchildsemi.com
FOD8160 Rev. 1.0.1
5
开关特性
适用于推荐的所有条件； TA = -40°C 至 +100°C， VCC = 3.3 V， IF = 6.0 mA ； 除非另有说明。典型值测量条件为
TA = 25°C 且 VCC = 3.3 V。
符号
参数
工作条件
RL = 350 Ω
最小值 典型值 最大值
单位
Mbit/sec
ns
图
10
数据速率
tPHL
RL = 350 Ω, CL = 15 pF
RL = 350 Ω, CL = 15 pF
RL = 350 Ω, CL = 15 pF
40
50
10
80
90
35
8, 9, 13
8, 9, 13
逻辑低输出的传播延迟。
逻辑高输出的传播延迟。
脉宽失真度，
tPLH
ns
PWD
ns
10, 11,
13
| tPHL – tPLH
|
tPSK
tR
RL = 350 Ω, CL = 15 pF
40
ns
ns
传播延迟差异
(5)
RL = 350 Ω, CL = 15 pF
RL = 350 Ω, CL = 15 pF
20
10
40
40
12, 13
12, 13
14
输出上升时间
（10% 至 90%）
tF
ns
输出下降时间
（90% 至 10%）
| CMH |
| CML |
IF = 0 mA, VO > 2 V,
VCM = 1,000 V(6)
20
20
kV/µs
kV/µs
输出高时的共模
瞬态抑制
IF = 6.0 mA, VO < 0.8 V,
VCM = 1,000 V(6)
14
输出低时的共模
瞬态抑制
应用于所有推荐的条件； TA = -40°C 至 +100°C， VCC = 5 V， IF = 6.0 mA ；除非另有规定。典型值测量条件为
TA = 25°C 且 VCC = 5 V.
符号
参数
工作条件
RL = 350 Ω
最小值 典型值 最大值
单位
Mbit/sec
ns
图
10
数据速率
tPHL
RL = 350 Ω, CL = 15 pF
RL = 350 Ω, CL = 15 pF
RL = 350 Ω, CL = 15 pF
37
41
4
80
90
25
8, 9, 13
8, 9, 13
逻辑低输出的传播延迟。
逻辑高输出的传播延迟。
脉宽失真度，
tPLH
ns
PWD
ns
10, 11,
13
| tPHL – tPLH
|
tPSK
tR
RL = 350 Ω, CL = 15 pF(5)
RL = 350 Ω, CL = 15 pF
40
ns
ns
传播延迟差异
22
9
12, 13
12, 13
14
输出上升时间
（10% 至 90%）
tF
RL = 350 Ω, CL = 15 pF
ns
输出下降时间
（90% 至 10%）
| CMH |
| CML |
IF = 0 mA, VO > 2 V,
20
20
40
40
kV/µs
kV/µs
输出高时的共模
瞬态抑制
V
CM = 1,000 V(6)
IF = 6.0 mA, VO < 0.8 V,
VCM = 1,000 V(6)
14
输出低时的共模
瞬态抑制
©2012 飞兆半导体公司
www.fairchildsemi.com
FOD8160 Rev. 1.0.1
6
注：
5. tPSK 等于相同制造日期代码的任意两个单元之间的 tPHL 和 / 或 tPLH 最糟情况差异，两个单元在相同壳体温度
( ± 5°C)、相同工作条件下运行，具有相同的负载 (RL = 350 Ω, CL = 15 pF)，且输入上升时间小于 5 ns。
6. 输出高电平状态下的共模瞬变抑制是共模脉冲信号 VCM 前沿上的最大容许正 dVcm/dt，从而确保输出将保持高电平
状态。输出低电平状态下的共模瞬变抑制是共模脉冲信号 VCM 后沿上的最大容许负 dVcm/dt，从而确保输出将保持
低电平状态。
©2012 飞兆半导体公司
FOD8160 Rev. 1.0.1
www.fairchildsemi.com
7
典型性能特征
100
3.0
2.5
2.0
1.5
1.0
I
= 13 mA
OL
10
1
V
= 3.3 V
CC
V
= 5.0 V
CC
0.1
-40°C
25°C
T
A
= 100°C
0.01
0.001
-40
-20
0
20
40
60
80
100
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
TA – AMBIENT TEMPERATURE (°C)
VF – FORWARD VOLTAGE (V)
Figure 2.Threshold Input Current (I
) vs. Ambient Temperature
Figure 1. Input LED Current (I ) vs. Forward Voltage (V )
FHL
F
F
30
0.50
0.45
0.40
0.35
0.30
0.25
0.20
I = 250 μA
F
I
I
= 13 mA
OL
= 6 mA
V
= 3.3 V / 5.0 V
O
F
25
20
15
10
5
V
= 3.3 V
CC
V
= 5.0 V
CC
V
= 3.3 V
= 5.0 V
CC
V
CC
40
0
-40
-20
0
20
60
80
100
-40
-20
0
20
40
60
80
100
TA – AMBIENT TEMPERATURE (°C)
TA – AMBIENT TEMPERATURE (°C)
Figure 4. Logic High Output Current (I
vs. Ambient Temperature
)
Figure 3. Logic Low Output Voltage (V
vs. Ambient Temperature
)
OH
OL
10
8
10
8
I
F
= 10 mA
I = 0 mA
F
V
= 5.0 V
CC
6
6
V
CC
= 5.0 V
V
= 3.3 V
CC
4
4
V
CC
= 3.3 V
2
2
0
-40
0
-40
-20
0
20
40
60
80
100
-20
0
20
40
60
80
100
TA – AMBIENT TEMPERATURE (°C)
TA – AMBIENT TEMPERATURE (°C)
Figure 5. Logic Low Output Supply Current (I
vs. Ambient Temperature
)
Figure 6. Logic High Output Supply Current (I
)
CCH
CCL
vs. Ambient Temperature
©2012 飞兆半导体公司
www.fairchildsemi.com
FOD8160 Rev. 1.0.1
8
典型性能特征 （续）
10
80
70
60
50
40
30
20
I
T
= 0 mA (for I
), 10 mA (for I
)
Frequency = 5 MHz, 50% Duty Cycle
I = 6 mA, R = 350 Ω
F
F
CCH
CCL
= 25°C
A
L
8
6
4
2
0
I
CCL
t
@ V = 3.3 V
CC
PLH
I
CCH
t
@ V = 5.0 V
CC
PLH
t
@ V = 3.3 V
CC
PHL
t
@ V = 5.0 V
CC
PHL
3.0
3.5
4.0
4.5
5.0
5.5
-40
-20
0
20
40
60
80
100
VCC – OUTPUT SUPPLY VOLTAGE (V)
TA – AMBIENT TEMPERATURE (°C)
Figure 8. Propagation Delay vs. Ambient Temperature
Figure 7. Output Supply Current (I
)
CC
)
vs. Output Supply Voltage (V
CC
70
60
50
40
30
20
20
16
12
8
Frequency = 5 MHz, 50% Duty Cycle
= 350 Ω, T = 25°C
Frequency = 5 MHz, 50% Duty Cycle
R
L
I
F
= 6 mA, R = 350 Ω
A
L
V
CC
= 3.3 V
t
@ V
CC
= 3.3 V
= 5.0 V
PLH
t
@ V
CC
PLH
t
@ V
= 3.3 V
PHL
CC
V
CC
= 5.0 V
4
t
@ V = 5.0 V
CC
PHL
0
-40
5
6
7
8
9
10
-20
0
20
40
60
80
100
IF – INPUT LED CURRENT (mA)
TA – AMBIENT TEMPERATURE (°C)
Figure 9. Propagation Delay vs. Input LED Current (I )
F
Figure 10. Pulse Width Distortion vs. Ambient Temperature
40
25
20
15
10
5
Frequency = 5 MHz, 50% Duty Cycle
Frequency = 5 MHz, 50% Duty Cycle
I = 6 mA, R = 350 Ω
F
R
L
= 350 Ω, T = 25°C
A
L
30
20
10
0
V
= 3.3 V
CC
t
t
@ V
@ V
= 5.0 V
= 3.3 V
R
CC
R
CC
V
CC
= 5.0 V
t
t
@ V
@ V
= 3.3 V
= 5.0 V
F
CC
F
CC
0
-40
-20
0
20
40
60
80
100
5
6
7
8
9
10
TA – AMBIENT TEMPERATURE (°C)
IF – INPUT LED CURRENT (mA)
Figure 12. Rise Time (t ) and Fall Time (t )
Figure 11. Pulse Width Distortion vs. Input LED Current (I )
R
F
F
vs. Ambient Temperature
©2012 飞兆半导体公司
FOD8160 Rev. 1.0.1
www.fairchildsemi.com
9
测试电路
I
F
Pulse Gen.
5 MHz
t = tr = 5 ns
f
DC = 50%
0.1 μF
Bypass
350 Ω
V
Node
Monitoring
O
C
L
Input
Monitoring
Mode
R
M
(I = 6 mA)
F
Input
50%
t
f
t
r
90%
1.5 V
10%
Output
V
OL
t
t
PLH
PHL
图 13. 传播延迟、上升时间和下降时间的测试回路
I
F
V
V
CC
0.1 μF
Bypass
350 Ω
Monitoring
O
Node
SW
C
L
R
M
V
CM
Pulse Gen
1 kV
0 V
V
CM
90%
10%
t
r
t
f
V
OH
V
V
(I = 0 mA)
F
O
2 V
0.8 V
(I = 6 mA)
F
O
V
OL
图 14. 瞬时共模抑制电压的测试回路
©2012 飞兆半导体公司
www.fairchildsemi.com
FOD8160 Rev. 1.0.1
10
订购信息
器件编号
封装
包装方法
管 （每管 100 单位）
FOD8160
宽体 5 引脚 SOP 封装
宽体 5 引脚 SOP 封装
FOD8160R2
编卷带包装 （每卷 1000 单位）
管 （每管 100 单位）
FOD8160V
（初始版）
宽体 SOP 5 引脚， DIN EN/IEC60747-5-5 选项
（待审批）
FOD8160R2V
（初始版）
宽体 SOP 5 引脚， DIN EN/IEC60747-5-5 选项
（待审批）
编卷带包装 （每卷 1000 单位）
根据 JEDEC:J-STD-020B 标准，所有包装都是无铅的。
标识信息
1
3
2
V
8160
8
D X YY KK W
6
4
5
7
定义
1
2
3
飞兆徽标
器件号，例如，“8160”代表 FOD8160
DIN EN/IEC60747-5-5 选项 （只有组件订购附带此选项时
出现）
4
5
6
7
8
工厂代码，例如，“D”
上一个数字年份代码，例如，“D”代表 2013
两位数的工作周数，从 “01”到 “53”
批量可追溯性代码
包装组装代码， W
©2012 飞兆半导体公司
www.fairchildsemi.com
FOD8160 Rev. 1.0.1
11
回流焊数据
Max. Ramp-up Rate = 3°C/s
Max. Ramp-down Rate = 6°C/s
T
P
260
240
220
200
180
160
140
120
100
80
t
P
T
L
T
smax
t
L
Preheat Area
T
smin
t
s
60
40
20
0
120
Time 25°C to Peak
240
360
Time (seconds)
特征
无铅装配数据
150°C
最低温度 (Tsmin
)
200°C
最高温度 (Tsmax
)
时间 （tS）（Tsmin 至 Tsmax
）
60 至 120 秒
3°C/ 秒最大
217°C
斜升率 （tL 至 tP）
液态温度 (TL)
保持在 (tL) 以上的时间 (tL)
体封装温度峰值
60 至 150 秒
260°C +0°C / – 5°C
30 秒
时间 (tP)， 260°C 的 5°C 内
斜降率 （TP 至 TL）
25°C 至峰值温度的时间
6°C/ 秒最大
8 分钟最大
©2012 飞兆半导体公司
www.fairchildsemi.com
FOD8160 Rev. 1.0.1
12
封装尺寸
0.20 C A-B
D
3.95
0.60
2X
1.27
4
6
1.38
1.27
A
6
4
4.60
11.38
11.80
11.60
9.20
1
3
0.10 C D
3
1
2X
0.33 C
PIN ONE
INDICATOR
2.54
2.54
0.25
C A-B D
B
5X
LAND PATTERN
RECOMMENDATION
0.51
0.31
5 TIPS
2.65
2.45
A
0.10 C
SEATING
PLANE
2.90
2.60
0.10 C
0.30
0.10
5X
C
NOTES: UNLESS OTHERWISE SPECIFIED
1.35
1.15
A) THIS PACKAGE DOES NOT
CONFORM TO ANY STANDARD.
B) ALL DIMENSIONS ARE IN
MILLIMETERS.
(R0.54)
C) DIMENSIONS ARE EXCLUSIVE OF
BURRS, MOLD FLASH AND TIE BAR
PROTRUSIONS
D) DRAWING CONFORMS TO ASME
Y14.5M-1994
GAUGE
PLANE
0.25
0.19
8°
0°
E) DRAWING FILE NAME:
MKT-M05AREV2
0.74
0.44
0.25
(R1.29)
C
SEATING
PLANE
SCALE: 3.2:1
封装图纸是作为一项服务而提供给考虑选用飞兆半导体产品的客户。具体参数可能会有变化，且不会做出相应通知。请
注意图纸上的版本和 / 或日期，并联系飞兆半导体代表核实或获得最新版本。封装规格并不超出飞兆公司全球范围内的
条款与条件，尤其指保修，保修涉及飞兆半导体的全部产品。
随时访问飞兆半导体在线封装网页，可以获取最新的封装图纸：
http://www.fairchildsemi.com/packaging/
©2012 飞兆半导体公司
FOD8160 Rev. 1.0.1
www.fairchildsemi.com
13
承载带规格 （SOIC-5L OPTO R2 & R2V 选项）
Po
P2
Do
E
t
F
W
W1
Bo
d
K1
Ko
P
Ao
D1
User Direction of Feed
尺寸 (mm)
符号
W
说明
24.00 +0.20 / -0.10
带宽
带厚
孔距
孔径
t
0.30 ± 0.05
4.00 ± 0.20
Po
Do
D1
E
1.50 +0.10 / -0.00
1.50 +0.25 / -0.00
Pocket Hole Diameter
孔位置
1.75 ± 0.10
11.50 ± 0.10
2.00 ± 0.10
8.00 ± 0.10
4.50 ± 0.10
12.00 ± 0.10
3.35 ± 0.10
2.85 ± 0.10
21.30 ± 0.10
0.05 ± 0.01
10°
F
Pocket 位置
P2
P
Pocket 间距
Pocket 直径
Ao
Bo
Ko
K1
W1
d
覆带宽
覆带厚
组件翻转或倾斜的最大值
©2012 飞兆半导体公司
www.fairchildsemi.com
FOD8160 Rev. 1.0.1
14
©2012 飞兆半导体公司
www.fairchildsemi.com
FOD8160 Rev. 1.0.1
15
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