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April 2017

FPF3042

IntelliMAX™ 18 V-Rated, Dual-Input, Single-Output,

Power-Source-Selector Switch

Features

Description

The FPF3042 is an 18 V-rated Dual-Input Single-Output

(DISO) load switch consisting of two channels of slew-

rate-controlled, low-on-resistance, N-channel MOSFET

switches with protection features. The slew-rate-

controlled turn-on characteristic prevents inrush current

and the resulting excessive voltage droop on the input

power rails. The input voltage range operates from 4.0 V

to 12.4 V at both V_BUSand V_INto align with the needs of

high-voltage portable device power rails.

.

Dual-Input, Single-Output Load Switch (DISO)

Input Supply Operating Range:

• 4.0 V~12.4 V at V_IN

• 4.0 V~12.4 V at V_BUS

.

Typical R_ON:

•

95 mΩ at V_IN=5 V

70 mΩ at V_BUS=5 V

Both V_INand V_BUShave the over-voltage protection of

14 V (typical) to avoid damage to the system.

.

Bidirectional Switch for V_INand V_BUS

Slew Rate Controlled:

V_INand V_BUSbidirectional switching allows reverse

current from V_OUTto V_INor V_BUSfor On-The-Go, (OTG)

Mode. The switching is controlled by logic input EN and

V_{IN_SEL}is capable of interfacing directly with low-voltage

control signal General-Purpose Input / Output (GPIO).

•

50 µs at V_INfor < 4.7 µF C_OUT

90 µs at V_BUSfor < 4.7 µF C_OUT

.

Maximum I_SW: 2.7 A per Channel

Break-Before-Make Transition

Under-Voltage Lockout (UVLO)

Over-Voltage Lockout (OVLO)

Thermal Shutdown

FPF3042 is available in 1.76 mm x 1.96 mm Wafer-

Level Chip-Scale Package (WLCSP), 16-bump, 0.4 mm

pitch.

Applications

Logic CMOS IO Meets JESD76 Standard for GPIO

Interface and Related Power Supply Requirements

.

Input Power-Selection Block Supporting USB and

Wireless Charging

.

ESD Protected:

Smart Phone / Tablet PC

• Human Body Model: >3 kV

• Charged Device Model: >1.5 kV

• IEC 61000-4-2 Air Discharge: >15 kV

• IEC61000-4-2 Contact Discharge: >8 kV

Ordering Information

Top

Mark

Typical R_ONper

Channel at 5 V_IN

Part Number

Channel

Rise Time (t_R)

Package

95 mΩ for V_IN

50 µs for V_IN

16-Bump, 1.76 mm x 1.96 mm,

Wafer-Level Chip-Scale Package

(WLCSP), 0.4 mm Pitch

FPF3042UCX

TR

DISO

70 mΩ for V_BUS

90 µs for V_BUS

FPF3042 • Rev. 1.0.1

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Application Diagram

V

V_OUT

IN

V

IN

C_IN1

C_OUT

V

IN

V_BUS

C_IN2

V_I/O

V_BUS

FPF3042

EN

V

ON

DF_IN

OFF

Other_V

IN_SEL

IN_AVA

GND GND

Figure 1. Typical Application

EN

VOUT

FPF3042

Charger

R1

20 kΩ

5V charging voltage at VOUT creates 3V at EN when

Q1 gate is LOW (OFF)

Note:

Q1 gate should be HIGH (ON) when not in OTG mode.

R2

30 kΩ

Q1

1.8V GPIO

Figure 2. Example Circuit for OTG Operation with Low-Voltage GPIO

FPF3042 • Rev. 1.0.1

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2

Block Diagram

FPP3042

V_OUT

V_IN

HV Power Device

SW1

V_OUT

C1

OVP

V_OUT

HV Power Device

SW2

V_BUS

V_OUT

C2

VMAX

V_CC

C1

C2

V_GATE

V_REF

Startup

EN

Reference Voltage

Reference Current

Thermal Protection

Other_V_IN__AVA

Gate Driver

&

Logic Control

TSD

V_IN__SEL

DF_IN

GND

Figure 3. Functional Block Diagram

FPF3042 • Rev. 1.0.1

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3

Pin Configuration

Figure 4. Pin Assignment (Top View)

Figure 5. Pin Assignment (Bottom View)

Description

Pin Description

Pin #

Name

Input / Output

V_BUSat USB: Power input / output; bi-directional switch when

V_{IN_SEL}= LOW.

A1, B1, C1

V_BUS

Input / Output

V_INSupply Input: Power input / output; bi-directional switch

when V_{IN_SEL}= HIGH.

A4, B4, C4

V_IN

Input / Output

Switch Output: Power input / output

Enable: Active HIGH;

A2, A3, B3, C3

V_OUT

EN voltage ≥ 2.5 V can power internal circuit when V_INand V_BUS

are absent.

C2

D4

EN

Input

1 MΩ pull-down resistor is included.

Supply Selector & Status: Input power source selection input

and status output. This signal is ignored during EN=LOW.

Selector input during EN=HIGH:

V_{IN_SEL}

Input / Output

HIGH = switch V_INto V_OUT/ LOW = switch V_BUSto V_OUT

.

Status output during EN=LOW:

HIGH = V_INis used for V_OUT/ LOW = V_BUSis used for V_OUT

.

Default Supply Selector during EN=LOW:

Floating = V_BUSconnects to V_OUT

LOW = V_INconnects to V_OUT

.

D3

DF_IN

Input

.

This signal is ignored during EN=HIGH. 1 µA pull-up current

source is included.

Other Supply Input Status: Open-drain output.

HIGH-Z = both V_INand V_BUSare valid.

B2

Other_V_{IN_AVA}

GND

Output

LOW = the other power source is not valid.

Ground

D1, D2

FPF3042 • Rev. 1.0.1

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4

Table 1.

Truth Table

EN V_IN>V_UVLOV_BUS>V_UVLOV_{IN_SEL}DF_IN

Other_V_{IN_AVA}

V_OUT

Comment

HI-Z if V_IN& V_BUS>V_UVLO

LOW if V_INor V_BUS<V_UVLO

HIGH

X

LOW

X

V_BUS

V_OUTis selected by

V_{IN_SEL}

HI-Z if V_IN& V_BUS>V_UVLO

LOW if V_INor V_BUS<V_UVLO

Bidirectional channel

HIGH

LOW

X

HIGH

LOW

X

V_IN

YES

NO

LOW

Automatic selection to

valid input

YES

NO

V_BUS

V_IN

V_{IN_SEL}is output.

YES

NO

LOW Floating

HIGH-Z

Floating

V_OUTis selected by

DF_IN

HIGH

NO

LOW

X

V_{IN_SEL}is output.

OFF

LOW

Floating

Notes:

1. Internal pull-down at EN.

2. 1 µA pull-up current source at DF_IN.

FPF3042 • Rev. 1.0.1

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5

Absolute Maximum Ratings

Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Symbol

Parameters

Continuous

Pulsed, 100 ms Maximum Non-Repetitive

Min. Max.

Unit

-1.4

18.0

-2.0

V_IN,V_BUSto GND

V_OUTto GND⁽3⁾

V_PIN

V

-0.3

16.0

6.0

EN, DF_IN, V_{IN_SEL}, Other_V_{IN_AVA}to GND

T_A=25°C

T_A=65°C

T_A=75°C

T_A=85°C

2.70

2.50

2.25

+150

55⁽4⁾

I_SW

Maximum Continuous Switch Current per Channel

A

t_PD

T_J

Total Power Dissipation at T_A=25°C

Operating Junction Temperature

Storage Junction Temperature

W

°C

-40

-65

T_STG

ϴJA

°C

Thermal Resistance, Junction-to-Ambient (1in. Square Pad of 2 oz. Copper)

Human Body Model, ANSI/ESDA/JEDEC JS-001-2012

Charged Device Model, JESD22-C101

°C/W

3.0

1.5

Electrostatic

Discharge Capability

Air Discharge

(V_IN,V_BUSto GND)

ESD

kV

15.0

8.0

IEC61000-4-2 System Level⁽5⁾

Contact Discharge

(V_IN,V_BUSto GND)

Notes:

3. If an external voltage of more than 13 V is applied to V_OUT, the slew rate should be <1 V/ms from 13 V.

4. Measured using 2S2P JEDEC standard PCB.

5. System-level ESD can be guaranteed by design.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor

does not recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol

Parameters

Min. Max. Unit

V_IN

4.0

-40

12.4

+85

V_PIN

T_A

V

V_BUS

Ambient Operating Temperature

°C

FPF3042 • Rev. 1.0.1

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6

Electrical Characteristics

V_IN=4 to 12.4 V, V_BUS=4 to 12.4 V, T_A=-40 to 85°C unless otherwise noted. Typical values are at V_IN=V_BUS=5 V,

EN=HIGH and T_A=25°C unless otherwise noted.

Symbol

V_IN

Parameters

Input Voltage from V_IN

Input Voltage from V_BUS

Condition

Min. Typ. Max. Unit

4.0

12.4

120

70

V

V_BUS

I_OUT=0 mA, EN=HIGH, V_INor V_BUS=5 V

I_OUT=0 mA, EN=5 V, V_INand V_BUS=GND

V_IN=12 V, I_OUT=200 mA, T_A=25°C

V_IN=8 V, I_OUT=200 mA, T_A=25°C

V_IN=5 V, I_OUT=200 mA, T_A=25°C

55

33

95

μA

I_Q

Quiescent Current

On Resistance for V_IN

mΩ

150

200

V_IN=5 V, I_OUT=200 mA,

T_A=25°C to 85°C⁽6⁾

R_ON

V_BUS=12 V, I_OUT=200 mA, T_A=25°C

V_BUS=6 V, I_OUT=200 mA, T_A=25°C

V_BUS=5 V, I_OUT=200 mA, T_A=25°C

70

On Resistance for V_BUS

100

140

V_BUS=5 V, I_OUT=200 mA,

T_A=25°C to 85°C⁽6⁾

V_IH

V_IL

Input Logic High Voltage

Input Logic Low Voltage

V_IN, V_BUS= 4.0 V~12.4 V

1.15

2.5

V

V_IN, V_BUS=4.0 V~12.4 V

0.52

V_EN(OTG)EN Voltage in OTG Mode⁽⁶⁾

R_{EN_PD}Pull-Down Resistance at EN

Protection

V_IN& V_BUS=Float or V_IN& V_BUS<V_UVLO

V

1000

kΩ

V_INor V_BUSRising

V_INor V_BUSFalling

3.05 3.50 4.00

V

V_UVLOUnder-Voltage Lockout Threshold

V_UVHYSUnder-Voltage Lockout Hysteresis

2.55 3.00 3.55

0.5

V

V_INRising Threshold

V_INFalling Threshold

V_BUSRising Threshold

V_BUSFalling Threshold

V_IN

12.9 14.0 15.0

V

12.4 13.5 14.5

V

V_OVLOOver-Voltage Lockout Threshold

V_OVHYSOver-Voltage Lockout Hysteresis

12.9 14.0 15.0

V

12.4 13.5 14.5

V

0.5

150

20

V

V_BUS

V

T_SDN

Thermal Shutdown Threshold

°C

T_SDNHYSThermal Shutdown Hysteresis

Reverse Current Blocking (RCB)

I_RCB

V_INor V_BUSCurrent During RCB

V_OUT=8 V, V_INor V_BUS=GND

30

μA

Dynamic Characteristics

V_OUTRise Time, V_BUS⁽6^,7⁾

90

50

t_R

μs

V_OUTRise Time, V_IN⁽6^,7⁾

V_OUTFall Time⁽6^,7⁾

V_IN=V_BUS=5 V, R_L=150 Ω, C_L=4.7 μF,

T_A=25°C

t_F

t_TRAN

t_SD

1.4

ms

μs

Transition Delay⁽6^,7⁾

Selection Delay⁽6^,7⁾

50

100

50

Notes:

6. This parameter is guaranteed by characterization and/or design; not production tested.

7. t_SD/t_TRAN/t_R/t_Fare defined in Figure 6.

FPF3042 • Rev. 1.0.1

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7

Timing Diagram

Figure 6. Transition Delay (V_IN=V_BUS=5 V)

FPF3042 • Rev. 1.0.1

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8

Typical Characteristics

Figure 7. V_INQuiescent Current (I_q) vs. Temperature Figure 8. V_BUSQuiescent Current (I_q) vs. Temperature

Figure 9. V_INQuiescent Current vs. Supply Voltage Figure 10.V_BUSQuiescent Current vs. Supply Voltage

Figure 11.V_INOn Resistance (mΩ) vs. Temperature

Figure 12.V_BUSOn Resistance (mΩ) vs. Temperature

Figure 13.V_INOn Resistance (mΩ) vs. Supply Voltage Figure 14.V_BUSOn Resistance (mΩ) vs. Supply Voltage

FPF3042 • Rev. 1.0.1

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9

Typical Characteristics (Continued)

Figure 15.V_IN_SEL Input Logic HIGH & Low Voltage

vs. Temperature

Figure 16.EN Input Logic HIGH & Low Voltage

vs. Temperature

Figure 17.DF_IN Logic HIGH & Low Voltage

vs. Temperature

Figure 18.V_IN__VULVOvs. Temperature

Figure 19.V_BUS

_

_VULVOvs. Temperature

Figure 20.V_IN__VOVLOvs. Temperature

Figure 21.V_BUS

_

_VOVLOvs. Temperature

Figure 22.V_OUTt_Rvs. Temperature

FPF3042 • Rev. 1.0.1

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10

Typical Characteristics (Continued)

Figure 23.V_OUTt_Fvs. Temperature

Figure 24.t_TRANvs. Temperature

Figure 25.Power Source Transition (V_IN=V_BUS=5 V,

EN=HIGH, V_IN_SEL=LOWHIGHLOW,

C_OUT=4.7 µF, R_L=150 Ω)

Figure 26.V_INOn Response (V_IN=GND5 V,

V_BUS=EN=GND, C_OUT=4.7 µF, R_L=150 Ω)

Figure 27.V_BUSOn Response (V_BUS=GND5 V,

V_IN=EN=GND, C_OUT=4.7 µF, R_L=150 Ω)

Figure 28.Off Response (V_IN=V_BUS=5 V, EN=HIGH,

V_IN_SEL=LOHIGH or HIGHLOW, C_OUT=4.7 µF,

R_L=150 Ω)

Figure 29.V_INOver-Voltage Protection Response

(V_IN=5 V15 V, V_BUS=5 V, EN=V_IN_SEL=HIGH,

C_OUT=4.7 µF, R_L=150 Ω)

Figure 30.V_BUSOver-Voltage Protection Response

(V_BUS=5 V15 V, V_IN=5 V, EN=HIGH,

V_IN_SEL=LOW, C_OUT=4.7 µF, R_L=150 Ω)

FPF3042 • Rev. 1.0.1

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11

Operation and Application Information

The FPF3042 is an 18 V, 2.7 A-rated, Dual-Input Single-

Output (DISO) N-channel MOSFET load switch with

slew-rate-controlled and low on resistance. The input

operating range is from 4 V to 12.4 V at V_BUSand at V_IN.

The internal circuitry is powered from the highest

voltage source among V_IN, V_BUS, and EN.

is highest voltage among V_IN, V_BUS, and EN if none of

them is higher than 5.3 V.

EN Voltage for Control Logic Power Supply

Internal control logic is powered from the highest

voltage among V_IN, V_BUS, and V_EN. If valid V_INor V_BUS

higher than UVLO is applied, ON/OFF control by EN

should be accomplished with V_IH/V_IL. If EN powers the

internal control block without valid V_INand V_BUS, more

than 2.5 V is required on the EN pin to operate properly.

Input Power-Source Selection

The input power source can be selected by V_{IN_SEL}and

DF_IN, respectively, depending on the EN state. When

EN is HIGH, the input source is selected by V_{IN_SEL}

regardless of DF_IN. If V_{IN_SEL}is LOW, V_BUSis selected.

If V_{IN_SEL}is HIGH, V_INis selected.

Over-Voltage Protection (OVP)

The FPF3042 includes over-voltage protection at both V_IN

and V_BUS. If V_INor V_BUSis higher than 14 V (typical), the

power switch is off until input voltage is lower than the

over-voltage trip level by a hysteresis voltage of 0.5 V.

Table 2. Input Power Selection by VIN_SEL

EN V_IN>V_UVLOV_BUS>V_UVLOV_{IN_SEL}DF_IN V_OUT

Reverse Power Supply for OTG

HIGH

X

LOW

X

V_BUS

V_IN

HIGH

The bidirectional switch allows reverse power for On-The-

Go (OTG) operation. Even if both V_INand V_BUSare

unavailable, reverse power can be supported if internal

control circuitry is powered by EN.

When EN is LOW, the input source is selected by

DF_IN and the number of valid input sources. If only

one input source is valid (greater than V_UVLO(MAX)), the

source is selected automatically, regardless of DF_IN,

to make charging path in case the battery is depleted. If

both V_BUSand V_INhave valid input sources, the input

source is selected by DF_IN. If DF_IN is LOW, V_INis

selected. If DF_IN is HIGH or floating, V_BUSis selected.

DF_IN is biased HIGH with an internal 1 µA pull-up

current source.

Reverse-Current Blocking (RCB)

FPF3042 supports reverse-current blocking during EN

LOW and an unselected channel.

Thermal Shutdown

During thermal shutdown, the power switch is turned off

if junction temperature exceeds 150°C to avoid damage.

Table 3. Input Power Selection by DF_IN

EN V_IN>V_UVLOV_BUS>V_UVLOV_{IN_SEL}DF_IN V_OUT

Wireless Charging System

FPF3042 can be used as an input power selector

supporting Travel Adaptor (TA) and Wireless Charging

(WC) with a single-input-based battery charger or Power

Management IC (PMIC), including a charging block as

shown in Figure 31. The system can recognize an input

power source change between 5 V TA and 5 V WC

without detection circuitry because FPF3042 has a

100 ms transition delay. OTG Mode can be supported

without an additional power path, such as a MOSFET.

LOW

YES

NO

YES

NO

HIGH

LOW

X

V_IN

V_BUS

YES

NO

LOW Floating V_BUS

HIGH LOW

V_IN

X

Floating

V_{IN_SEL}can be the status output to indicate which input

power source is used during EN is LOW. If V_INis used,

V_{IN_SEL}shows HIGH. If V_BUSis used, V_{IN_SEL}shows

LOW. The voltage level of HIGH signal is 5.3 V if any

one of V_IN, V_BUS, or EN is higher than 5.3 V. The signal

FPF3042

V_BUS

PMIC

with

Travel Adaptor

System

V_OUT

BAT Charger &

OTG Boost &

V_IN

Wireless Charging

Power Path

Li-Pol

BAT

V_{IN_SEL}, Other_V_IN_Ava

EN, V_{IN_SEL}, DF_IN

Figure 31.Input Power Selector for Wireless Charging System

FPF3042 • Rev. 1.0.1

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12

Product Specific Package Information

D

E

X

Y

1.96 mm 0.03 mm

1.76 mm 0.03 mm

0.28 mm

0.38 mm

FPF3042 • Rev. 1.0.1

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13

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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型号：	FPF3042UCX
厂家：	ONSEMI
描述：	18 V-Rated, Dual-Input, Single-Output, Power-Source-Selector Switch
文件：	总16页 (文件大小：998K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FPF3042UCX [ONSEMI]

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