FQD3P50TM-F085 [ONSEMI]
500V，P 沟道 MOSFET;
| 型号： | FQD3P50TM-F085 |
| 厂家： | 
ONSEMI |
| 描述： | 500V，P 沟道 MOSFET 开关 脉冲 晶体管 |
| 文件： | 总9页 (文件大小：1206K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi
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liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and holdonsemi and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
FQD3P50TM-F085
500V P-Channel MOSFET
Features
General Description
•
•
•
•
•
•
-2.1A, -500V, R
= 4.9Ω @V = -10 V
DS(on) GS
These P-Channel enhancement mode power field effect
transistors are produced using ON Semiconductor’s
proprietary, planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for electronic lamp ballast based on complimentary
half bridge.
Low gate charge ( typical 18 nC)
Low Crss ( typical 9.5 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
•
•
Qualified to AEC Q101
RoHS Compliant
S
!
D
●
●
G!
▶
▲
●
D-PAK
G
S
!
Absolute Maximum Ratings
T
= 25°C unless otherwise noted
D
C
Symbol
Parameter
FQD3P50TM-F085
Units
V
V
I
Drain-Source Voltage
-500
-2.1
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
-1.33
-8.4
A
C
I
(Note 1)
Drain Current
- Pulsed
A
DM
V
E
I
Gate-Source Voltage
± 30
250
V
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
-2.1
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
5.0
mJ
V/ns
W
AR
dv/dt
-4.5
Power Dissipation (T = 25°C) *
2.5
P
A
D
Power Dissipation (T = 25°C)
50
W
C
- Derate above 25°C
Operating and Storage Temperature Range
0.4
W/°C
°C
T , T
-55 to +150
J
STG
Maximum lead temperature for soldering purposes,
T
300
°C
L
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
Typ
--
Max
Units
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
2.5
50
θJC
θJA
θJA
--
--
110
* When mounted on the minimum pad size recommended (PCB Mount)
©2010 Semiconductor Components Industries, LLC.
September-2017, Rev. 3
Publication Order Number:
FQD3P50TM-F085/D
Elerical Characteristics
T = 25°C unless otherwise noted
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
V
= 0 V, I = -250 µA
GS D
Drain-Source Breakdown Voltage
-500
--
--
--
--
V
DSS
∆BV
Breakdown Voltage Temperature
Coefficient
DSS
I
= -250 µA, Referenced to 25°C
0.42
V/°C
D
/
∆T
J
I
V
V
V
V
= -500 V, V = 0 V
--
--
--
--
--
--
--
--
-1
µA
µA
nA
nA
DSS
DS
GS
Zero Gate Voltage Drain Current
= -400 V, T = 125°C
-10
DS
GS
GS
C
I
= -30 V, V = 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
-100
100
GSSF
DS
I
= 30 V, V = 0 V
GSSR
DS
On Characteristics
V
V
V
V
= V , I = -250 µA
Gate Threshold Voltage
-3.0
--
--
-5.0
4.9
--
V
Ω
S
GS(th)
DS
GS
DS
GS
D
R
Static Drain-Source
On-Resistance
DS(on)
= -10 V, I = -1.05 A
3.9
2.1
D
g
= -50 V, I = -1.05 A
(Note 4)
Forward Transconductance
--
FS
D
Dynamic Characteristics
C
C
C
Input Capacitance
--
--
--
510
70
660
90
pF
pF
pF
iss
V
= -25 V, V = 0 V,
GS
DS
Output Capacitance
oss
rss
f = 1.0 MHz
Reverse Transfer Capacitance
9.5
12
Switching Characteristics
t
t
t
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
--
--
--
--
--
--
--
12
56
35
45
18
3.6
9.2
35
120
80
100
23
--
ns
ns
d(on)
V
= -250 V, I = -2.7 A,
DD
D
r
R
= 25 Ω
G
ns
d(off)
f
(Note 4, 5)
ns
Q
Q
Q
nC
nC
nC
g
V
V
= -400 V, I = -2.7 A,
DS
D
= -10 V
gs
gd
GS
(Note 4, 5)
--
Drain-Source Diode Characteristics and Maximum Ratings
I
Maximum Continuous Drain-Source Diode Forward Current
--
--
--
--
--
--
--
-2.1
-8.4
-5.0
--
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current
SM
V
t
V
V
= 0 V, I = -2.1 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
--
V
SD
GS
S
= 0 V, I = -2.7 A,
270
1.5
ns
µC
rr
GS
S
(Note 4)
dI / dt = 100 A/µs
Q
Reverse Recovery Charge
--
F
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 102mH, I = -2.1A, V = -50V, R = 25 Ω, Starting T = 25°C
AS
DD
G
J
3. I ≤ -2.7A, di/dt ≤ 200A/µs, V ≤ BV Starting T = 25°C
SD
DD
DSS, J
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
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2
Typical Characteristics
VGS
Top :
-15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-6.0 V
100
Bottom: -5.5 V
100
℃
150
-1
10
℃
25
※
Notes :
μ
※
Notes :
℃
-55
1. 250 s Pulse Test
1. VDS = -50V
℃
2. TC = 25
μ
2. 250 s Pulse Test
-2
-1
10
10
-1
100
101
2
4
6
8
10
10
-VGS , Gate-Source Voltage [V]
-VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
8
7
6
5
4
3
2
VGS = - 10V
VGS = - 20V
100
℃
150
℃
25
※
Notes :
1. VGS = 0V
※
℃
Note : T = 25
J
μ
2. 250 s Pulse Test
-1
10
0
2
4
6
8
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
1200
1000
800
600
400
200
0
12
10
8
C
iss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
rss = C
C
gd
VDS = -100V
VDS = -250V
VDS = -400V
C
iss
6
Coss
4
※
Notes :
1. VGS = 0 V
2. f = 1 MHz
C
rss
2
※
Note : ID = -2.7 A
0
-1
10
100
101
0
2
4
6
8
10
12
14
16
18
20
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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3
Typical Characteristics (Continued)
2.5
2.0
1.5
1.0
0.5
0.0
1.2
1.1
1.0
※Notes :
1. VGS = 0 V
2. ID = -250 μA
0.9
0.8
※
Notes :
1. VGS = -10 V
2. ID = -1.35 A
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
TJ, Junction Temperature [oC]
TJ, Junction Temperature [oC]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
2.5
2.0
1.5
1.0
0.5
0.0
Operation in This Area
is Limited by R DS(on)
101
100 µs
1 ms
10 ms
100
DC
-1
10
※
Notes :
1. TC = 25 o
2. TJ = 150 o
3. Single Pulse
C
C
-2
10
100
101
102
103
25
50
75
100
125
150
℃
TC, Case Temperature [
]
-VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 .5
1 0 0
※
N o te s
1 . Z θ J C(t)
2 . D u ty F a c to r, D = t1 /t2
3 . T J M T C P D Z θ J C(t)
:
0 .2
℃
/W M a x.
=
2 .5
0 .1
-
=
*
M
0 .0 5
1 0-1
0 .0 2
PDM
0 .0 1
t1
s in g le p u ls e
t2
1 0-2
1 0 -5
1 0-4
1 0 -3
1 0 -2
1 0 -1
1 0 0
1 0 1
t1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
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4
Gate Charge Test Circuit & Waveform
VGS
Same Type
50KΩ
as DUT
Qg
12V
200nF
-10V
300nF
VDS
VGS
Qgs
Qgd
DUT
-3mA
Charge
Resistive Switching Test Circuit & Waveforms
RL
t on
t off
VDS
td(on)
tr
td(off)
tf
VDD
VGS
VGS
RG
10%
DUT
-10V
90%
VDS
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
--------------------
BVDSS - VDD
L
1
2
2
----
EAS
=
LIAS
VDS
ID
t p
Time
VDD
VDS (t)
RG
VDD
ID (t)
DUT
-10V
IAS
t p
BVDSS
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5
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
VDS
DUT
_
I SD
L
Driver
RG
Compliment of DUT
(N-Channel)
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
10V
( Driver )
Body Diode Reverse Current
IRM
I SD
( DUT )
di/dt
IFM , Body Diode Forward Current
VSD
VDS
( DUT )
Body Diode
VDD
Forward Voltage Drop
Body Diode Recovery dv/dt
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6
Mechanical Dimensions
TO-252 (DPAK) (FS PKG Code 36)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
millimeters
Part Weight per unit (gram): 0.33
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7
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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