FQP6N40C [ONSEMI]

功率 MOSFET,N 沟道,QFET®,400 V,6 A,1.0 Ω,TO-220;
FQP6N40C
型号: FQP6N40C
厂家: ONSEMI    ONSEMI
描述:

功率 MOSFET,N 沟道,QFET®,400 V,6 A,1.0 Ω,TO-220

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December 2013  
FQP6N40C  
N-Channel QFET® MOSFET  
400 V, 6.0 A, 1.0 Ω  
Description  
Features  
6.0 A, 400 V, RDS(on) = 1.0 (Max.) @ VGS = 10 V,  
This N-Channel enhancement mode power MOSFET is  
produced using Fairchild Semiconductor’s proprietary planar  
stripe and DMOS technology. This advanced MOSFET  
technology has been especially tailored to reduce on-state  
resistance, and to provide superior switching performance  
and high avalanche energy strength. These devices are  
suitable for switched mode power supplies, active power  
factor correction (PFC), and electronic lamp ballasts.  
ID = 3 A  
Low Gate Charge (Typ. 16 nC)  
Low Crss (Typ. 15 pF)  
100% Avalanche Tested  
D
G
G
D
S
TO-220  
S
Absolute Maximum Ratings  
T = 25°C unless otherwise noted.  
C
Symbol  
Parameter  
Unit  
V
FQP6N40C  
V
I
Drain-Source Voltage  
400  
DSS  
- Continuous (T = 25°C)  
Drain Current  
6
3.6  
A
D
C
- Continuous (T = 100°C)  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
24  
A
DM  
V
E
I
Gate-Source Voltage  
± 30  
270  
V
GSS  
AS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
6
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
7.3  
mJ  
V/ns  
W
AR  
dv/dt  
4.5  
P
Power Dissipation (T = 25°C)  
73  
D
C
- Derate above 25°C  
0.58  
-55 to +150  
W/°C  
°C  
T , T  
Operating and Storage Temperature Range  
Maximum Lead Temperature for Soldering,  
1/8" from Case for 5 Seconds.  
J
STG  
T
300  
°C  
L
Thermal Characteristics  
ꢀꢁꢂꢃꢄꢅ  
ꢆꢇꢈꢇꢂꢉꢊꢉꢈ  
FQP6N40C  
1.71  
ꢋꢌꢍꢊ  
6ꢀ?  
6ꢀ?  
+
Thermal Resistance, Junction-to-Case, Max.  
Thermal Resistance, Junction-to-Ambient, Max.  
θꢀꢁ  
θꢀꢂ  
+
62.5  
www.fairchildsemi.com  
©2003 Fairchild Semiconductor Corporation  
FQP6N40C Rev. C1  
1
Package Marking and Ordering Information  
Part Number  
Top Mark  
Package  
Packing Method Reel Size Tape Width  
Tube  
N/A  
N/A  
Quantity  
FQP6N40C  
TO-220  
FQP6N40C  
50 units  
Electrical Characteristics  
T = 25°C unless otherwise noted.  
C
Symbol  
Parameter  
Test Conditions  
Min. Typ.  
Max.  
Unit  
Off Characteristics  
BV  
V
= 0 V, I = 250 µA  
GS D  
Drain-Source Breakdown Voltage  
400  
--  
--  
--  
--  
V
DSS  
BV  
Breakdown Voltage Temperature  
Coefficient  
DSS  
I
= 250 µA, Referenced to 25°C  
0.54  
V/°C  
D
/ T  
J
I
V
V
V
V
= 400 V, V = 0 V  
--  
--  
--  
--  
--  
--  
--  
--  
1
µA  
µA  
nA  
nA  
DSS  
DS  
GS  
Zero Gate Voltage Drain Current  
= 320 V, T = 125°C  
10  
DS  
GS  
GS  
C
I
I
= 30 V, V = 0 V  
Gate-Body Leakage Current, Forward  
Gate-Body Leakage Current, Reverse  
100  
-100  
GSSF  
DS  
= -30 V, V = 0 V  
GSSR  
DS  
On Characteristics  
V
V
V
V
= V , I = 250 µA  
Gate Threshold Voltage  
2.0  
--  
--  
4.0  
1
V
S
GS(th)  
DS  
GS  
DS  
GS  
D
R
Static Drain-Source  
On-Resistance  
DS(on)  
= 10 V, I = 3A  
0.83  
4.7  
D
g
= 40 V, I = 3A  
Forward Transconductance  
--  
--  
FS  
D
Dynamic Characteristics  
C
C
C
Input Capacitance  
--  
--  
--  
480  
80  
625  
105  
20  
pF  
pF  
pF  
iss  
V
= 25 V, V = 0 V,  
GS  
DS  
Output Capacitance  
oss  
rss  
f = 1.0 MHz  
Reverse Transfer Capacitance  
15  
Switching Characteristics  
t
t
t
t
Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
--  
--  
--  
--  
--  
--  
--  
13  
65  
21  
38  
16  
2.3  
8.2  
35  
140  
55  
85  
20  
--  
ns  
ns  
d(on)  
V
= 200 V, I = 6A,  
DD  
D
r
R
= 25 Ω  
G
ns  
d(off)  
f
(Note 4)  
(Note 4)  
ns  
Q
Q
Q
nC  
nC  
nC  
g
V
V
= 320 V, I = 6A,  
DS  
D
= 10 V  
gs  
gd  
GS  
--  
Drain-Source Diode Characteristics and Maximum Ratings  
I
Maximum Continuous Drain-Source Diode Forward Current  
--  
--  
--  
--  
--  
--  
--  
6
24  
1.4  
--  
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current  
SM  
V
t
V
V
= 0 V, I = 6 A  
Drain-Source Diode Forward Voltage  
Reverse Recovery Time  
--  
V
SD  
GS  
S
= 0 V, I = 6 A,  
230  
1.7  
ns  
µC  
rr  
GS  
S
dI / dt = 100 A/µs  
Q
Reverse Recovery Charge  
--  
F
rr  
Notes:  
1. Repetitive rating : pulse-width limited by maximum junction temperature.  
2. L = 13.7 mH, I = 6 A, V = 50 V, R = 25 Ω, starting  
T = 25°C .  
AS  
DD  
G
J
3. I  
6 A, di/dt 200 A/µs, V BV  
starting T = 25°C.  
SD  
DD  
DSS, J  
4. Essentially independent of operating temperature.  
www.fairchildsemi.com  
©2003 Fairchild Semiconductor Corporation  
FQP6N40C Rev. C1  
2
TTyyppiiccaall CChhaarraacctteerriissttiiccss  
VGS  
Top :  
15.0V  
10.0 V  
8.0 V  
7.0 V  
6.5 V  
6.0 V  
5.5 V  
101  
101  
Bottom: 5.0V  
150oC  
100  
25oC  
-55oC  
100  
Notes :  
Notes :  
μ
-1  
10  
1. V = 40V  
2. 250 s Pulse Test  
1. 250 s Pulse Test  
2. TC = 25  
DS μ  
-1  
10  
-1  
10  
100  
101  
2
4
8
10  
6
VGS, Gate-Source Voltage [V]  
VDS, Drain-Source Voltage [V]  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
1
10  
VGS = 10V  
0
10  
VGS = 20V  
Notes :  
150  
25  
1. V = 0V  
2. 250 s Pulse Test  
GS μ  
Note : T = 25  
J
-1  
10  
0
5
10  
15  
20  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
ID, Drain Current [A]  
VSD, Source-Drain voltage [V]  
Figure 3. On-Resistance Variation vs  
Drain Current and Gate Voltage  
Figure 4. Body Diode Forward Voltage  
Variation with Source Current  
and Temperature  
1200  
12  
10  
8
C
iss = Cgs + Cgd (Cds = shorted)  
Coss = Cds + C  
gd  
VDS = 80V  
Crss = C  
gd  
1000  
800  
600  
400  
200  
0
VDS = 200V  
VDS = 320V  
C
iss  
C
6
oss  
4
Note ;  
1. VGS = 0 V  
2. f = 1MHz  
C
rss  
2
Note: ID = 6A  
0
-1  
100  
101  
0
5
10  
15  
20  
10  
QG, Total Gate Charge [nC]  
VDS, Drain-Source Voltage [V]  
Figure 5. Capacitance Characteristics  
Figure 6. Gate Charge Characteristics  
©2003 Fairchild Semiconductor Corporation  
FQP6N40C Rev. C1  
www.fairchildsemi.com  
3
(Continued)  
Typical Characteristics  
1.2  
1.1  
1.0  
0.9  
0.8  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
Notes :  
1. VGS = 0 V  
2. ID= 250 μA  
Notes :  
1. VGS = 10 V  
2. ID = 3 A  
-100  
-50  
0
50  
100  
150  
200  
-100  
-50  
0
50  
100  
150  
200  
T, Junction Temperature [oC]  
T, Junction Temperature [oC]  
J
J
Figure 8. On-Resistance Variation  
vs Temperature  
Figure 7. Breakdown Voltage Variation  
vs Temperature  
102  
6
5
4
3
2
1
0
Operation in This Area  
is Limited by R DS(on)  
10 µs  
101  
100  
100 µs  
1 ms  
10 ms  
100 ms  
DC  
-1  
10  
Notes :  
1. TC = 25 o  
2. TJ = 150 o  
3. Single Pulse  
C
C
-2  
10  
10  
0
1
10  
2
10  
3
10  
25  
50  
75  
100  
125  
150  
TC, Case Temperature [  
]
VDS, Drain-Source Voltage [V]  
Figure 10. Maximum Drain Current  
vs Case Temperature  
Figure 9. Maximum Safe Operating Area  
1 00  
D = 0 .5  
0 .2  
0 .1  
N o tes  
1 . Z θ JC (t)  
2 . D uty F ac to r, D = t1/t2  
3 . T JM T C P D Z θ JC (t)  
:
/W M a x.  
=
1 .7 1  
0 .0 5  
1 0-1  
-
=
*
M
0 .0 2  
0 .0 1  
PDM  
s in g le p u ls e  
t1  
t2  
1 0-2  
1 0-5  
1 0-4  
1 0-3  
1 0-2  
1 0-1  
1 00  
1 01  
t1 , S q u a r e W a v e P u l s e D u r a t i o n [ s e c ]  
Figure 11. Transient Thermal Response Curve  
©2003 Fairchild Semiconductor Corporation  
FQP6N40C Rev. C1  
www.fairchildsemi.com  
4
VGS  
Same Type  
as DUT  
50KΩ  
Qg  
12V  
200nF  
300nF  
VDS  
VGS  
Qgs  
Qgd  
DUT  
I
= const.  
G
Charge  
Figure 12. Gate Charge Test Circuit & Waveform  
RL  
VDS  
90%  
VDS  
VDD  
VGS  
RG  
10%  
VGS  
DUT  
V
GS  
td(on)  
tr  
td(off)  
tf  
t on  
t off  
Figure 13. Resistive Switching Test Circuit & Waveforms  
BVDSS  
--------------------  
BVDSS - VDD  
L
1
2
2
----  
EAS  
=
L IAS  
VDS  
I D  
BVDSS  
IAS  
RG  
VDD  
ID (t)  
V
VDS (t)  
VDD  
DUT  
GS  
t p  
t p  
Time  
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms  
©2003 Fairchild Semiconductor Corporation  
FQP6N40C Rev. C1  
www.fairchildsemi.com  
5
+
DUT  
VDS  
_
I SD  
L
Driver  
RG  
Same Type  
as DUT  
VDD  
VGS  
• dv/dt controlled by RG  
• ISD controlled by pulse period  
Gate Pulse Width  
--------------------------  
VGS  
D =  
Gate Pulse Period  
10V  
( Driver )  
IFM , Body Diode Forward Current  
I SD  
di/dt  
( DUT )  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
VSD  
VDS  
( DUT )  
VDD  
Body Diode  
Forward Voltage Drop  
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms  
www.fairchildsemi.com  
©2003 Fairchild Semiconductor Corporation  
FQP6N40C Rev. C1  
6
Mechanical Dimensions  
Figure 16. TO220, Molded, 3-Lead, Jedec Variation AB  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-  
ically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TO220-003  
7
www.fairchildsemi.com  
©2003 Fairchild Semiconductor Corporation  
FQP6N40C Rev. C1  
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Rev. I66  
8
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©2003 Fairchild Semiconductor Corporation  
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