FSA221MUX [ONSEMI]

多媒体和 USB 2.0 高速和音频开关,具有负信号功能;
FSA221MUX
型号: FSA221MUX
厂家: ONSEMI    ONSEMI
描述:

多媒体和 USB 2.0 高速和音频开关,具有负信号功能

开关 光电二极管 输出元件
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March 2013  
FSA221 USB2.0 High-Speed (480Mbps) and  
Audio Switches with Negative Signal Capability  
Features  
Description  
The FSA221 is a Double-Pole, Double Throw (DPDT)  
multiplexer that combines a low-distortion audio and a  
USB2.0 High-Speed (HS) switch path. This  
configuration enables audio and USB data to share a  
common connector port. The architecture is designed to  
allow audio signals to swing below ground. This means  
a common USB and headphone jack can be used for  
personal media players and portable peripheral devices.  
.
.
.
.
.
.
.
HS-USB: 4Typical On Resistance  
HS-USB: 4.5pF Typical On Capacitance  
Audio: 3Typical On Resistance  
-3db Bandwidth: > 720MHz  
Low Power Consumption  
Power-off Protection on Common D+/R, D-/L Ports  
Since USB2.0 is an industry standard for shared data-  
path in portable devices, the FSA221 also incorporates  
a Vbus detection capability. The FSA221 includes a  
power-off feature to minimize current consumption when  
Vbus is not present. This power-off circuitry is available  
for the common D+/R, D-/L ports only. Typical  
applications involve switching in portables and  
consumer applications, such as cell phones, digital  
cameras, and notebooks with hubs or controllers.  
Automatically Detects Vbus for Switch Path  
Selection  
Applications  
.
.
Cell Phone, PDA, Digital Camera, and Notebook  
LCD Monitor, TV, and Set-Top Box  
Ordering Information  
Part Number  
Package Number Top Mark  
Package Description  
FSA221L10X  
FSA221MUX  
FSA221UMX  
MAC10A  
MUA10A  
UMLP10A  
GK  
FSA221  
GL  
10-Lead MicroPak, JEDEC MO-255, 1.6 x 2.1mm  
10-Lead MSOP JEDEC MO-187, 3.0 mm Wide  
10-Lead Quad, Ultrathin MLP, 1.4 x 1.8mm  
Vbus  
ASel  
Switch Select  
Control Circuitry  
VAUDIO  
R
pd  
D+  
R
GND  
D+/R  
D-/L  
D--  
L
Figure 1.  
Analog Symbol  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 • Rev. 1.1.0  
Pin Assignments  
Vbus  
10  
1
9
D+  
1
10  
9
Vbus  
R
2
D-  
1
D+  
ASel  
D-  
R
2
3
ASel  
D+/R  
3
4
10 D+  
9
L
GND  
Vaudio  
2
3
4
D-  
R
L
D+/R  
D-/L  
8
7
6
8
Vbus  
L
4
5
7
D-/L  
5
8
ASel  
6
7
GND  
Vaudio  
D-/L D+/R  
6
Vaudio  
5
GND  
Figure 2. 10-Lead MicroPak™  
Figure 3. 10-Lead MSOP  
Figure 4. 10-Lead UMLP  
Pin Descriptions  
Name  
Description  
Vaudio  
Vbus  
Power supply (Audio)  
Power supply (USB) and auto USB switch-path select  
Audio select to override auto USB detect when VAUDIO supply is present  
USB data bus input sources  
ASel  
D+, D-  
R, L  
Audio right and left input sources  
D+/R, D-/L USB and audio common connector ports  
Truth Table  
(1)  
ASel  
Vaudio  
Vbus  
L, R  
D+, D-  
LOW  
LOW  
HIGH(2)  
HIGH(2)  
HIGH(2)  
LOW  
HIGH(2)  
LOW  
HIGH(2)  
HIGH(2)  
OFF  
OFF  
ON  
OFF  
ON  
OFF  
ON  
LOW  
HIGH  
OFF  
ON  
OFF  
Notes:  
1. ASel - Internal resistor to GND provides auto-Vbus detect if there is no external connection. Forcing ASel HIGH  
when VAUDIO is present overrides the USB path even if Vbus is present.  
2. HIGH - Value is the threshold as defined to meet USB2.0 Vbus requirements and audio supply threshold in a  
system (see DC Tables).  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
2
 
 
Functional Description  
The FSA221 is a combined USB and audio switch that  
enables sharing the D+/D- lines of a USB connector with  
stereo audio CODEC outputs. The switch is optimized  
for high-speed USB signals and includes an automatic  
Vbus-detection circuit. When a USB connector, rather  
than a headphone, is connected to the ultra-portable  
device the switch is automatically configured for high-  
speed USB data transfer. If no Vbus is detected, and yet  
VAUDIO is present, the switch is configured for the low-  
distortion audio switch path. The audio switch path also  
handles negative signals (down to -2V), which  
eliminates the need for large coupling capacitors.  
control, to the audio path. The ASel pin is internally  
terminated by a resistor to GND (typical value 3M) and  
requires no connection for the standard ultra-portable  
(cell-phone, MP3, or portable media player). In an  
application where the supply to the FSA221 Vbus pin is  
not guaranteed to be removed, a GPIO pin can be used  
to switch out of high-speed USB mode into audio mode,  
using the ASel pin.  
The FSA221 Vbus pin must be connected directly to Vbus  
or a supply > 3.8V, not an LDO regulated down to 3.6V  
or a Vbat-generated supply that may fall below 3.8V in  
normal operation.  
For those applications where the Vbus is generated as a  
self-powered device or where Vbus is not removed, the  
ASel pin provides the ability to switch, under software  
Application Diagram  
Vbus  
3.0V - 3.6V  
ASel  
5V  
Vaudio  
Switch Select  
Control Circuitry  
R
pd  
D+  
R
USB 2.0  
Source  
GND  
D+/R  
D-/L  
Vbus  
USB  
Mini-AB  
Connector  
D-  
L
ID  
Audio  
CODEC  
GND  
Figure 5.  
Typical Application  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
3
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
Parameter  
Min.  
Max.  
Unit  
VAUDIO  
VBUS  
/
Supply Voltage  
-0.5  
6.0  
V
D+, D-, D+/R, D-/L Pins  
R, L, Pins  
VBUS -7.0 VBUS +0.3  
VAUDIO -7.0 VAUDIO -0.3  
V
V
VSW  
Switch I/O Voltage(3)  
ASEL  
IIK  
Control Input Voltage(3)  
-0.5  
-50  
6.0  
V
Input Clamp Diode Current  
mA  
USB  
50  
50  
ISW  
Switch I/O Current (Continuous)  
mA  
mA  
Audio  
USB  
100  
Peak Switch Current (Pulsed at 1ms  
Duration, <10% Duty Cycle)  
ISWPEAK  
Audio  
100  
TSTG  
TJ  
Storage Temperature Range  
-65  
+150  
+150  
+260  
Level 1  
7500  
7500  
12000  
2000  
°C  
°C  
°C  
Maximum Junction Temperature  
Lead Temperature (Soldering, 10 seconds)  
TL  
MSL  
Moisture Sensitivity Level (JEDEC J-STD-020A)  
I/O to GND  
Human Body Model  
All Other Pins  
(JEDEC: JESD22-A114)  
ESD  
V
VAUDIO VBUS to GND  
Charged Device Model (JEDEC: JESD22-C101)  
Note:  
3. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
Parameter  
Minimum  
Maximum  
VAUDIO  
VBUS  
ASel  
Supply Voltage  
3.0V  
4.25V  
4.2V  
5.50V  
Supply Voltage  
Control Input Voltage  
0V  
VAUDIO  
VAUDIO 6.5V  
VBUS 6.5V  
-40°C  
VAUDIO 0.3V  
VBUS  
VSW  
Switch I/O Voltage  
TA  
Operating Temperature  
85°C  
Thermal Resistance (Free Air)  
MicroPak™  
330°C / W (Estimated)  
JA  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
4
 
DC Electrical Characteristics  
All typical values are at TA=25°C unless otherwise specified.  
TA=- 40°C to  
+85°C  
VAUDIO  
(V)  
Symbol  
Parameter  
Condition  
Unit  
Min. Typ. Max.  
Common Pins  
VIK  
VIH  
VIL  
Clamp Diode Voltage  
3.0  
IIK=-18mA  
-1.2  
Control Input Voltage HIGH 3.0 to 3.6  
Control Input Voltage LOW 3.0 to 3.6  
1.2  
V
0.5  
VIN=3.6V  
VIN=0V  
-1  
-1  
10  
1
IIN  
ASel Input HIGH Current  
3.6  
µA  
µA  
Power-Off Leakage Current  
(Common Port Only D+/R,  
D-/L)  
VAUDIO  
=
Common Port (D+/R, D-/L), VSW=0V  
VBUS=0V to 5.5V  
IOFF  
10  
50  
50  
VBUS=0V, 5. 5V, D+/R, D-/L=0.3V,  
VAUDIO 0.3V, D+, D-, R, L=0.3V,  
VAUDIO 0.3V or Floating, Figure 11  
Off-Leakage Current of Port  
D+, D-, R, L  
INO(0FF)  
4.2  
4.2  
-50  
1
nA  
Vbus=0V, 5.5V, D+/R, D-/L=0.3V,  
VAUDIO 0.3V, D+, D-, R, L=Floating, -50  
Figure 12  
On-Leakage Current of Port  
D+/R or D-/L  
INC(0N)  
1
3
nA  
ASel Internal Pull-Down  
Resistor  
RPD  
M  
USB Switch Path  
USB Analog Signal Range  
VBUS (V)  
4.25  
0
3.6  
6
V
VD+/D-=0V, 0.4V, ION=-8mA,  
VAUDIO=3V  
RONUSB HS Switch On Resistance(4)  
4
(5,6)  
∆RONUSB HS Delta RON  
4.25  
VD+/D-=0V, ION=-8mA, VAUDIO=3V  
0.4  
Audio Switch Path  
VAUDIO (V)  
VAUDIO  
5.5  
Audio Analog Signal Range  
VAUDIO  
5
V
Audio Switch On  
RONAudio  
VL/R=-2V, 0V, 0.7V, VBUS=0V,  
VAUDIO-0.7V, VAUDIO, ION=-26mA  
3.0  
3
Resistance(4)  
(5)  
∆RONAudio Audio Delta RON  
3.0  
3.0  
VL/R=0.7V ION=-26mA  
ION=-26mA  
0.4  
1.5  
RFLAT(Audio) Audio RON Flatness(7)  
2.5  
Power Supply  
Vbusth  
Vaudioth VAUDIO Threshold  
Quiescent Supply Current  
VBUS Threshold Voltage  
3.2  
0.5  
3.8  
1.5  
V
V
ICC(Audio)  
4.2  
4.2  
VASel=0 to VAUDIO, IOUT=0  
6
10  
20  
µA  
µA  
(Audio)  
Quiescent Supply Current  
ICC(Vbus)  
VASel=0 to VAUDIO, IOUT=0, VBUS=5.5V  
12  
(VBUS  
)
VASel=2.6V, VBUS=Floating  
VASel =1.8V, VBUS=Floating  
10  
14  
15  
18  
Increase in ICC Current per  
Control Voltage and VCC  
ICCT  
µA  
Notes:  
4. On resistance is determined by the voltage drop between the A and B pins at the indicated current through the switch.  
5. ∆ RON=RON max RON min measured at identical VCC, temperature, and voltage. Worst-case signal path, audio, or  
USB channel, is characterized.  
6. Guaranteed by characterization, not production tested.  
7. Flatness is defined as the difference between the maximum and minimum values of on resistance over the  
specified range of conditions.  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
5
 
 
 
 
AC Electrical Characteristics  
All typical value are for VAUDIO=3.3V and Vbus=5.0 at TA=25ºC unless otherwise specified.  
TA=- 40°C to +85°C  
VAUDIO / VBUS  
(V)  
Symbol  
Parameter  
Condition  
Unit  
Min. Typ. Max.  
VD+/R, D-/L=1.0V,  
RL=50Ω, CL=50pF  
Figure 13, Figure 15  
Turn-On Time VAUDIOto  
Output  
tONAUDIO1  
VBUS=0V  
10  
μs  
μs  
μs  
μs  
μs  
μs  
VD+/R, D-/L=1.0V,  
RL=50Ω, CL=50pF  
Figure 13, Figure 15  
VAUDIO=3.0  
tOFFAUDIO1 Turn-Off Time VBusto Output  
tONAUDIO2 Turn-On Time ASel to Output  
tOFFAUDIO2 Turn-Off Time ASel to Output  
tONAUDIO3 Turn-On Time VBusto Output  
10  
2
for VBUS  
VD+/R, D-/L=1.0V,  
RL=50Ω, CL=50pF  
Figure 13, Figure 14  
VBUS=4.25V  
VAUDIO=3.0  
VD+/R, D-/L=1.0V,  
RL=50Ω, CL=50pF  
Figure 13, Figure 14  
VBUS=4.25V  
VAUDIO=3.0  
2
VD+/R, D-/L=1.0V,  
VAUDIO=3.0 RL=50Ω, CL=50pF  
10  
10  
Figure 13, Figure 15  
VD+/R, D-/L=1.0V,  
VAUDIO=3.0 RL=50Ω, CL=0pF  
Figure 13, Figure 15  
tONUSB  
Turn-On Time VUSBto Output  
VD+/R, D-/L=1.0V,  
VAUDIO=3.0 RL=50Ω, CL=0pF  
Figure 13, Figure 15  
tOFFUSB Turn-Off Time VUSBto Output  
10  
μs  
ns  
dB  
USB Switch Propagation  
VAUDIO=3.0 RL=50Ω, CL=0pF,  
VBUS=4.25V Figure 16  
tPDUSB  
0.25  
Delay(8)  
f=20kHz, RT=32Ω,  
CL=0pF  
Figure 7, Figure 21  
Non-Adjacent Channel  
XtalkA  
VAUDIO=3.0  
VBUS=4.25V  
-110  
Crosstalk - Audio  
RT=50Ω, CL=0pF,  
VAUDIO=3.0  
BW  
-3db Bandwidth - USB  
Signal 0dBm  
720  
MHz  
%
VBUS=4.25V  
Figure 9, Figure 19  
f=20Hz to 20kHz,  
VAUDIO=3.0  
THD  
Total Harmonic Distortion  
RL=32Ω, VIN=2Vpp  
VBUS=0V  
0.05  
Figure 24  
Note:  
8. Guaranteed by characterization, not production tested.  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
6
 
USB High-Speed-Related AC Electrical Characteristics  
TA= -40°C to +85°C.  
VAUDIO  
VBUS(V)  
/
Symbol  
tSK(o)  
Parameter  
Conditions  
Typ. Unit  
Channel-to-Channel VAUDIO=3.0V tR=tF=750ps (10-90%) at 240MHz CL=0pF, RL=50Ω  
35  
Skew(9)  
VBUS=4.25V Figure 17, Figure 18  
ps  
35  
Skew of Opposite  
Transitions of the  
Same Output(9)  
VAUDIO=3.0V tR=tF=750ps (10-90%) at 240MHz CL=0pF, RL=50Ω  
VBUS=4.25V Figure 17, Figure 18  
tSK(P)  
VAUDIO=3.0V RL=50Ω, CL=50pF, tR=tF=500ps (10-90%) at  
VBUS=4.25V 480Mbps (PRBS=215 1)  
tJ  
Total Jitter(9)  
130  
ps  
Note:  
9. Guaranteed by characterization, not production tested.  
Capacitance  
TA= -40°C to +85°C.  
Symbol  
Parameter  
VAUDIO / VBUS(V)  
Condition  
Typ. Unit  
Control Pin Input  
Capacitance (ASel  
CIN (ASel)  
VAUDIO=3.0V, VBUS=4.25V  
VAUDIO=3.0V, VBUS=4.25V,  
VBias=0.2V  
2.0  
4.5  
9.0  
1.5  
3.0  
pF  
pF  
)
VBias=0.2V, f=240MHz,  
Figure 23  
ASel=0V (CONUSB  
VAUDIO=3.0V, VBUS=4.25V,  
ASel=3.0V (CONAudio  
)
D+/R, D-/L (Source Port)  
On Capacitance  
CON(D+/R, D-/L)  
VBias=0.2V, f=1MHz,  
Figure 23  
)
USB Input Source  
Off Capacitance  
VAUDIO=3.0V, VBUS=4.25V,  
ASel=3.0V  
COFF(D+, D-)  
COFF(R/L)  
f=1MHz, Figure 22  
f=1MHz, Figure 22  
pF  
pF  
Audio Input Source  
Off Capacitance  
VAUDIO=3.0V, VBUS=4.25V,  
ASel =0V  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
7
 
Typical Characteristics  
Figure 6.  
RON Audio, VAudio=3.0V, VBUS=Float  
0.1  
0
1.0  
10.0  
100.0  
1000.0  
-20  
-40  
-60  
-80  
-100  
-120  
-140  
Frequency (KHz)  
(Vaudio) = 3.0V  
CC  
V
Figure 7.  
Non-Adjacent Channel Crosstalk Audio  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
8
Typical Characteristics (Continued)  
0.1  
1.0  
10.0  
100.0  
1000.0  
10000.0  
0
-20  
-40  
-60  
-80  
-100  
-120  
-140  
-160  
Frequency (KHz)  
(Vaudio) = 3.0V  
VCC  
Figure 8.  
Off-Isolation Audio  
1
0
10  
100  
1000  
10000  
-1  
-2  
-3  
-4  
-5  
-6  
-7  
-8  
Frequency (MHz)  
Figure #. Bandwidth Characterization, FrequencyResponse at CL= 0pF,VCC (Vbus) = 4.25V  
Figure 9.  
Bandwidth, Gain vs. Frequency USB  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
9
Test Diagrams  
VON  
I (OFF)  
A
Dn or R/L  
D+/R or D-/L  
V
D+/R or D-/L  
sw  
V
SW  
D+, D-  
or R/L  
GND  
ION  
GND  
GND  
VCNTRL = fn (Vaudio and Vbus)  
VCNTRL = fn (Vaudio and Vbus)  
RON = VON / ION  
Figure 10. On Resistance  
Figure 11. Off Leakage  
D+, D- or R,L  
D+/R or D-/L  
VOUT  
C
D+, D- or R/L  
R
IA(ON)  
L
L
V
sw  
R
S
GND  
A
GND  
D+/R or  
D-/L  
V
sw  
VCNTRL = fn (Vaudio and Vbus)  
GND  
GND  
RL , R and CL are function of application  
S
VCNTRL = fn (Vaudio and Vbus)  
environment (see AC Tables for specific values)  
CL includes test fixture and stray capacitance  
Figure 12. On Leakage  
Figure 13. AC Test Circuit Load  
tRISE = 1us  
tFALL = 1 us  
tRISE = 2.5ns  
tFALL = 2.5ns  
Vbus  
3V  
90%  
Vth(min)  
90%  
50%  
90%  
50%  
Vth(max)  
Input - VCNTRL  
10%  
Input - VASel  
GND  
10%  
90%  
10%  
10%  
90%  
GND  
VOH  
VOH  
90%  
90%  
Output - VOUT  
VOL  
Output - VOUT  
VOL  
Vth = Vbusth or Vaudioth  
tOFF  
tON  
tON  
tOFF  
VCNTRL = fn (Vaudio and Vbus)  
Figure 15. Turn-On / Turn-Off Waveforms (USB/Audio)  
Figure 14. Turn-On / Turn-Off  
Waveforms (ASel  
)
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
10  
Test Diagrams (Continued)  
tRISE = 750ps  
tFALL = 750ps  
0.4V  
90%  
50%  
90%  
50%  
Input VD+/D-  
10%  
10%  
50%  
GND  
VOH  
Output - VOUT  
VOL  
50%  
tpLH  
tpHL  
Figure 16. USB Switch Propagation Delay Waveforms  
tRISE = 750ps  
tFALL = 750ps  
0.4V  
90%  
50%  
90%  
50%  
Input VD+/D-  
10%  
10%  
50%  
GND  
VOH  
Output - VOUT  
VOL  
50%  
tpLH  
tpHL  
Figure 17. Pulse Skew: tSK(P)=| tPHL tPLH  
|
tRISE = 750ps  
tFALL = 750ps  
0.4V  
90%  
50%  
90%  
50%  
Input VD+/D-  
10%  
10%  
GND  
VOH  
Output1 - VOUT  
VOL  
50%  
50%  
tpLH1  
tpHL1  
tsk(o)  
VOH  
Output2 - VOUT  
VOL  
50%  
50%  
tpLH2 tpHL2  
Figure 18. Output Skew: tSK(O)=| tPLH1 tPLH2 | or | tPHL1 tPHL2  
|
© 2006 Fairchild Semiconductor Corporation  
FSA221 Rev. 1.1.0  
www.fairchildsemi.com  
11  
Test Diagrams (Continued)  
Network Analyzer  
R
S
V
IN  
V
GND  
S
GND  
V
VCNTRL  
GND  
OUT  
GND  
R
T
VCNTRL = fn (Vaudio and Vbus)  
GND  
RS and RT are function of application  
environment (see AC Tables for specific values)  
Figure 19. USB Bandwidth  
Network Analyzer  
R
S
V
IN  
V
S
GND  
R
T
GND  
V
GND  
CNTRL  
V
OUT  
GND  
GND  
R
T
VCNTRL = fn (Vaudio and Vbus)  
RS and RT are function of application  
GND  
environment (see AC Tables for specific values)  
OFF-Isolation = 20 Log (V  
/ V  
)
OUT  
IN  
Figure 20. Channel Off Isolation  
Network Analyzer  
NC  
R
S
V
IN  
V
GND  
S
V
GND  
CNTRL  
GND  
R
T
GND  
V
V
= fn (Vaudio and Vbus)  
OUT  
GND  
CNTRL  
R
T
RS and RT are function of application  
environment (see AC Tables for specific values)  
CROSSTALK = 20 Log (V  
GND  
/ V  
)
IN  
OUT  
Figure 21. Non-Adjacent Channel-to-Channel Crosstalk  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
12  
Test Diagrams (Continued)  
Dn or R/L or D+/R or D-/L  
Capacitance  
Meter  
VCNTRL = fn (Vaudio and Vbus)  
Dn or R/L or  
D+/R or D-/L  
F = 1MHz  
Figure 22. Channel Off Capacitance  
Dn or R/L or  
D+/R or D-/L  
Capacitance  
Meter  
= fn (Vaudio and Vbus)  
V
F= 1MHz, 240MHz  
CNTROL  
Dn or R/L or  
D+/R or D-/L  
Figure 23. Channel On Capacitance  
Audio Analyzer  
R
S
V
IN  
V
GND  
S
GND  
V
VCNTRL  
GND  
OUT  
GND  
R
T
VCNTRL = fn (Vaudio and Vbus)  
GND  
RS and RT are function of application  
environment (see AC Tables for specific values)  
Figure 24. Total Harmonic Distortion  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
13  
Physical Dimensions  
0.10  
C
2.10  
A
2X  
1.62  
B
KEEPOUT ZONE, NO TRACES  
OR VIAS ALLOWED  
(0.11)  
0.56  
1.12  
1.60  
PIN1 IDENT IS  
2X LONGER THAN  
OTHER LINES  
0.10  
C
10X  
(0.35)  
(0.25)  
2X  
10X  
0.50  
TOP VIEW  
RECOMMENDED LAND PATTERN  
0.55 MAX  
0.05 C  
0.05 C  
0.05  
0.00  
(0.20)  
C
0.35  
0.25  
SIDE VIEW  
(0.15)  
D
DETAIL A  
(0.36)  
0.35  
0.25  
0.65  
0.55  
0.35  
0.25  
DETAIL A 2X SCALE  
1
4
0.56  
NOTES:  
10  
5
A. PACKAGE CONFORMS TO JEDEC  
REGISTRATION MO-255, VARIATION UABD .  
B. DIMENSIONS ARE IN MILLIMETERS.  
C. DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M, 1994.  
D. PRESENCE OF CENTER PAD IS PACKAGE  
SUPPLIER DEPENDENT. IF PRESENT IT  
IS NOT INTENDED TO BE SOLDERED AND  
HAS A BLACK OXIDE FINISH.  
(0.29)  
0.35  
6
9
9X  
0.25  
0.50  
0.25  
0.15  
9X  
1.62  
0.10  
0.05  
C
C
A B  
ALL FEATURES  
E. DRAWING FILENAME: MKT-MAC10Arev5.  
BOTTOM VIEW  
Figure 25. 10-Lead MicroPak™  
Package Designator  
Tape Section  
Number Cavity  
Cavity Status  
Cover Tape Status  
Leader (Start End)  
Carrier  
125 (Typical)  
5000  
Empty  
Filled  
Sealed  
Sealed  
Sealed  
L10X  
Trailer (Hub End)  
75 (Typical)  
Empty  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  
specifically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:  
http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
14  
Physical Dimensions  
Figure 26. 10-Lead Molded Small Outline Package (MSOP)  
Tape Size  
A
13  
B
C
D
N
W1  
W2  
W3  
0.059  
(1.5)  
0.512  
(13)  
0.795  
(20.2)  
7.008  
(178)  
0.448  
(12.4)  
0.724  
(18.4)  
0.486-0.606  
(11.9-15.4)  
(12mm)  
(330)  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  
specifically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:  
http://www.fairchildsemi.com/products/analog/pdf/msop10_tr.pdf.  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
15  
Physical Dimensions  
(9X)  
0.563  
1.70  
0.15 C  
2X  
1.40  
A
B
0.663  
1
2.10  
1.80  
PIN#1 IDENT  
0.40  
0.15 C  
0.225  
(10X)  
TOP VIEW  
2X  
RECOMMENDED  
LAND PATTERN  
0.55 MAX.  
0.152  
0.10 C  
0.08 C  
9X  
0.45  
1.45  
0.55  
0.40  
SEATING  
PLANE  
C
0.05  
SIDE VIEW  
1.85  
0.35  
(9X)  
0.45  
0.225  
(10X)  
3
OPTIONAL MINIMIAL  
TOE LAND PATTERN  
0.40  
6
DETAIL A  
1
NOTES:  
PIN#1 IDENT  
A. PACKAGE DOES NOT FULLY CONFORM TO  
0.15  
0.25  
10  
JEDEC STANDARD.  
(10X)  
B. DIMENSIONS ARE IN MILLIMETERS.  
C. DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M, 1994.  
0.10 C A B  
0.05 C  
BOTTOM VIEW  
D. LAND PATTERN RECOMMENDATION IS  
BASED ON FSC DESIGN ONLY.  
E. DRAWING FILENAME: MKT-UMLP10Arev3.  
0.55  
0.45  
0.10  
0.10  
0.10  
DETAIL A  
SCALE : 2X  
PACKAGE  
EDGE  
LEAD  
LEAD  
OPTION 2  
SCALE : 2X  
OPTION 1  
SCALE : 2X  
Figure 27. 10-Lead Quad, Ultrathin MLP, 1.4 x 1.8mm  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  
specifically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
16  
© 2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA221 Rev. 1.1.0  
17  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
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