FSA2259UMX [ONSEMI]
低电压，0.8Ω，双 SPDT 模拟开关;
| 型号： | FSA2259UMX |
| 厂家： | 
ONSEMI |
| 描述： | 低电压，0.8Ω，双 SPDT 模拟开关 开关 光电二极管 输出元件 |
| 文件： | 总12页 (文件大小：375K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Is Now
To learn more about onsemi™, please visit our website at
www.onsemi.com
onsemi andꢀꢀꢀꢀꢀꢀꢀand other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi
product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without
notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality,
or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and holdonsemi and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
FSA2259 Low-Voltage, Dual-SPDT (0.8Ω) Analog
Switch with 16kV ESD
Features
.
.
.
.
.
.
.
.
0.8Ω Typical On Resistance (RON) for +3.0V Supply
0.40Ω Maximum RON Flatness for +3.0V Supply
-3db Bandw idth: > 50MHz
Low ICCT Current Over an Expanded Control Input Range
Packaged in 10-Lead UMLP (1.4 x 1.8mm)
Pow er-Off Protection on Common Ports
Broad VCC Operating Range: 1.65 to 4.4V
ESD HBM JEDEC: JESD22-A114
-
-
I/O to GND: 8.5kV
Pow er to GND: 16.0kV
Applications
.
.
Cell Phone, PDA, Digital Camera, and Notebook
LCD Monitor, TV, and Set-Top Box
© 2008 Semiconductor Components Industries, LLC.
October-2017, Rev. 2
Publication Order Number:
FSA2259UMX/D
Description
The FSA2259 is a high-performance, dual, Single Pole Double Throw (SPDT) analog sw itch that features low RON of
0.8Ω (typical) at 3.0V VCC. The FSA2259 operates over a w ide VCC range of 1.65V to 4.4V and is designed for break-
before-make operation. The select input is TTL-level compatible.
The FSA2259 features very low quiescent current even w hen the control voltage is low er than the VCC supply. This
feature suits mobile handset applications by allow ing direct interface w ith baseband processor general-purpose I/Os
w ith minimal battery consumption.
rdering Information
Part Number Top Mark Operating Temperature Range
Package
10-Lead, Quad, Ultrathin Molded Leadless
Package (UMLP), 1.4 x 1.8mm
FSA2259UMX
JT
-40 to +85°C
Analog Symbol
1B0
1B1
1A
S1
2B0
2B1
2A
S2
Figure 1.
FSA2259
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2
Pin Configuration
V
1B1
2
cc
1
10 2B1
1A
S1
3
4
9
8
2A
S2
1B0
5
6
7
GND
2B0
Figure 2.
10-Pin UMLP (Top Through View)
Pin Description
Pin#
Name
Description
1
2
VCC
1B1
1A
Supply Voltage
Data Ports
Data Ports
3
4
S1
Sw itch Select Pins
Data Ports
5
1B0
GND
2B0
S2
6
Ground
7
Data Ports
8
Sw itch Select Pins
Data Ports
9
2A
10
2B1
Data Ports
Truth Table
Control Input, Sn
Function
LOW Logic Level
HIGH Logic Level
nB0 Connected to nA
nB1 Connected to nA
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3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
Units
VCC
Supply Voltage
-0.5
5.5
V
1B0, 1B1, 2B0, 2B1,
1A, 2A Pins
VSW
VIN
Sw itch I/O Voltage(1)
-0.5
-0.5
VCC + 0.3
V
Control Input Voltage(1)
S1, S2
5.5
-50
V
I
IK
Input Clamp Diode Current
mA
mA
mA
°C
ISW
ISWPEAK
TSTG
TJ
Sw itch I/O Current (Continuous)
350
500
+150
+150
+260
8.5
Peak Sw itch Current (Pulsed at 1ms Duration, <10% Duty Cycle)
Storage Temperature Range
-65
Maximum Junction Temperature
°C
TL
Lead Temperature (Soldering, 10 seconds)
I/O to GND
°C
Human Body Model, JEDEC:
JESD22-A114
Pow er to GND
16.0
8.0
kV
kV
ESD
All Other Pins
Charged Device Model, JEDEC: JESD22-C101
2.0
Note:
1. Input and output negative ratings may be exceeded if input and output diode current ratings are observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor
does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
Max.
Units
VCC
VIN
VSW
TA
Supply Voltage
1.65
0
4.40
VCC
VCC
+85
V
V
Control Input Voltage
Sw itch I/O Voltage
Operating Temperature
0
V
-40
°C
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4
DC Electrical Characteristics
All typical values are at 25ºC unless otherw ise specified.
TA=-40 to
+85ºC
TA=+25ºC
Symbol
Parameter
Conditions
V
CC (V)
Unit
Min. Typ. Max. Min. Max.
3.60 to 4.30
2.70 to 3.60
2.30 to 2.70
1.65 to 1.95
3.60 to 4.30
2.70 to 3.60
2.30 to 2.70
1.65 to 1.95
1.7
1.5
1.4
0.9
0.7
0.5
0.4
0.4
VIH
Control Input Voltage High
V
VIL
Control Input Voltage Low
V
Control Input Leakage
(S1,S2)
µA
nA
IIN
VIN=0 to VCC
1.65 to 4.30
-0.5
0.5
nA=0.3V, VCC–0.3V
nB0 or nB1=VCC-0.3V,
0.3V, or Floating
Figure 4
INO(0FF),
INC(OFF)
Off Leakage Current of
Port nB0 and nB1
1.95 to 4.30
-10
-20
10
20
-50
50
nA=0.3V, VCC–0.3V
nB0 or nB1=VCC-0.3V,
0.3V, or Floating
Figure 5
On Leakage Current of
Port nA
IA(ON)
1.95 to 4.30
-100
100
±1
nA
µA
Common Port (1A,
2A), VIN=0V to 4.3V,
VCC=0V nB0,
Power-Off Leakage
Current (Common Port
Only 1A, 2A)
IOFF
0V
nB1=Floating
ION=100mA, nB0 or
nB1=0.7V, 3.6V
Figure 3
4.30
3.00
0.50
0.80
1.00
1.20
ION=100mA, nB0 or
nB1=0.7V, 2.3V
Figure 3
RON
Switch On Resistance(2,5)
Ω
ION=100mA, nB0 or
nB1=0V, 0.7V, 1.6V,
2.3V
2.30
1.65
1.10
1.50
Figure 3
ION=100mA, nB0 or
nB1=0V, 0.7V, 1.65V
Figure 3
4.30
3.00
2.30
1.65
4.30
3.00
2.30
1.65
4.30
0.08
0.20
0.40
0.50
0.25
0.25
On Resistance Matching
(3,5)
ION=100mA, nB0 or
nB1=0.7V
∆RON
Ω
Ω
Between Channels
0.4
0.4
IOUT=100mA, nB0 or
nB1=0V to VCC
(4,5)
RFLAT(ON)
On Resistance Flatness
0.9
1.2
nA
µA
ICC
Quiescent Supply Current VIN=0 or VCC, IOUT=0
-100
100
-500
500
7
Input at 2.6V
Increase in ICC per Input
Input at 1.8V
3
7
ICCT
4.30
15
Notes:
2. On resistance is determined by the voltage drop betw een A and B pins at the indicated current through the sw itch.
3. ∆RON=RON max – RON min measured at identical VCC, temperature, and voltage.
4. Flatness is defined as the difference betw een the maximum and minimum value of on resistance (RON) over the
specified range of conditions.
5. Guaranteed by characterization, not production tested for VCC=1.65 – 3.0V.
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5
AC Electrical Characteristics
All typical value are for VCC=3.3V at 25ºC unless otherw ise specified.
TA=-40 to
+85°C
TA=+25ºC
Symbol Parameter Conditions
VCC (V)
Unit
ns
Figure
Min. Typ. Max. Min. Max.
3.60 to 4.30
2.70 to 3.60
2.30 to 2.70
1.65 to 1.95
3.60 to 4.30
2.70 to 3.60
2.30 to 2.70
1.65 to 1.95
3.60 to 4.30
2.70 to 3.60
2.30 to 2.70
1.65 to 1.95
55
60
65
60
65
70
nB0 or
nB1=1.5V,
RL=50Ω,
CL=35pF
Turn-On
Time
tON
tOFF
tBBM
70
Figure 6
Figure 7
30
35
40
5
5
5
35
40
45
nB0 or
Turn-Off
Time
nB1=1.5V,
RL=50Ω,
CL=35pF
ns
40
15
15
15
16
2
2
2
2
nB0 or
Break-
nB1=1.5V,
RL=50Ω,
CL=35pF
Before-Make
ns
Figure 8
Time(6)
Charge
CL=1.0nF,
VS=0V, RS=0Ω
Q
1.65 to 4.30
1.65 to 4.30
1.65 to 4.30
1.65 to 4.30
25
-80
pC
dB
Figure 12
Figure 10
Figure 11
Figure 9
Injection(6)
Off Isolation(6)
f=100kHz,
RL=50Ω, CL=0pF
OIRR
Xtalk
BW
f=100kHz,
RL=50Ω, CL=0pF
Crosstalk(6)
-100
>50
dB
-3db
RL=50Ω, CL=0pF
Bandw idth(6)
MHz
Total
f=20Hz to 20kHz,
RL=32Ω,
VIN=2Vpp
Harmonic
Distortion +
Noise(6)
THD+N
1.65 to 4.30
.06
%
Figure 15
Notes:
6. Guaranteed by characterization, not production tested
Capacitance
All capacitance specifications are guaranteed by characterization and are not production tested.
TA=+25ºC
Symbol
Parameter
Conditions VCC (V)
Unit
Figure
Min. Typ. Max.
Control Pin Input Capacitance
B Port Off Capacitance
C
f=1MHz
f=1MHz
f=1MHz
0
1.5
30
50
pF
pF
pF
Figure 13
Figure 13
Figure 14
IN
COFF
CON
3.3
3.3
A Port On Capacitance
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6
Test Diagrams
VON
IA(OFF)
NC
A
nB
n
nA
V
IN
V
IN
Select
GND
ION
GND
Select
V
= 0 orV
cc
Sel
GND
**Each switch port is tested separately.
V
= 0 or V
cc
Sel
R
ON = VON / ION
Figure 3.
On Resistance
Figure 4.
Off Leakage (Ports Tested Separately)
nB
n
nA
IA(ON)
V
IN
NC
VOUT
A
C
R
L
R
GND
L
S
V
IN
GND
Select
GND
V
Sel
V
V
cc
Sel= 0 or
GND
Figure 5.
On Leakage
Figure 6.
Test Circuit Load
tRISE= 2.5ns
tFALL = 2.5ns
V
CC
90%
CC /2
90%
CC /2
Input- VSel
10%
V
V
10%
90%
GND
VOH
90%
Output-VOUT
VOL
tON
tOFF
Figure 7.
Turn-On / Turn-Off Waveforms
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7
Test Diagrams (Continued)
tRISE= 2.5ns
nB
n
nA
C
V
cc
V
IN
90%
VOUT
Input- VSel
V
/2
cc
GND
V
L
R
IN
L
10%
0V
GND
GND
VOUT
R
S
0.9*V
out
0.9*V
out
tBBM
V
Sel
RL and C are functions of the application
L
GND
environment (50, 75, or 100 ).
CL includes test fixture and stray capacitance.
Figure 8.
Break -Before -Make Interval Timing
Network Analyzer
R
S
V
IN
V
GND
S
GND
V
Sel
V
OUT
GND
GND
R
T
RL and CL are functions of the application
environment (50, 75, or 100 ).
GND
L
CL includes test fixture and stray capacitance.
Figure 9.
Bandwidth
Network Analyzer
R
S
V
S
GND
R
T
GND
V
GND
Sel
V
OUT
GND
GND
R
T
RS and RT are functions of the application
environment (50, 75, or 100 ).
GND
Off-Isolation = 20 Log (VOUT / VIN
Figure 10. Channel Off Isolation
)
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8
Test Diagrams (Continued)
Network Analyzer
R
S
V
IN
V
GND
S
GND
V
Sel
V
GND
OUT
GND
R
T
R
T
GND
GND
RS and RT are functions of the application
environment (50, 75, or 100 ).
CROSSTALK = 20 Log (VOUT/ VIN
)
Figure 11. Adjacent Channel Crosstalk
Generator
RS
VCC
B
Input – VSEL
VIN
Off
On
Off
mA
VS
0V
VOUT
CL
GND
GND
∆VOUT
nSn
VOUT
V
SEL
CL includes test fixture and stray capacitance
Q = ∆VOUT / C
L
GND
Figure 12. Charge Injection Test
nB
nB
Capacitance
n
n
Meter
nS
n
nS
n
Capacitance
V
Sel= 0 orVcc
f = 1MHz
VSel = 0 or Vcc
Meter
nB
n
f = 1MHz
nB
n
Figure 13. Channel Off Capacitance
Figure 14. Channel On Capacitance
Audio Analyzer
R
S
V
IN
V
S
GND
GND
VCNTRL
V
OUT
GND
GND
R
T
VSel = 0 or Vcc
GND
RS and RT are functions of the application
environment (see AC Tables for specific values).
Figure 15. Total Harmonic Distortion
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9
Physical Dimensions
0.15
C
1.40
A
2X
1.700
9X
0.563
B
0.663
1
1.80
2.100
PIN #1 QUADRANT
0.400
0.15
C
2X
10X
0.225
TOP VIEW
RECOMMENDED LAND PATTERN
0.55 MAX.
1.450
9X
0.10
0.08
C
0.550
0.400
0.450
0.152
SEATING
PLANE
C
0.050
C
1.850
SIDE VIEW
10X
0.225
3
OPTIONAL MINIMIAL TOE LAND PATTERN
0.40
10X
6
0.35
0.45
9X
1
10
0.45
0.55
0.500
0.100
0.15
0.25
0.10
0.05
C
C
A B
0.100
0.100
BOTTOM VIEW
DETAIL A
PIN #1 TERMINAL
SCALE: 2X
A. DIMENSIONS ARE IN MILLIMETERS.
B. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994
C. DRAWING FILENAME: UMLP10Arev2
Figure 16. 10-Lead Quad Ultrathin Molded Leadless Package (UMLP)
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10
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the
United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A
listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make
changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor
products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by
ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do var y in different applications and
actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for
use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or
any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs,
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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