FSA8008AUMX [ONSEMI]
音频插孔检测和配置开关;
| 型号： | FSA8008AUMX |
| 厂家： | 
ONSEMI |
| 描述： | 音频插孔检测和配置开关 开关 |
| 文件： | 总8页 (文件大小：184K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FSA8008A
Audio Jack Detection and
Configuration Switch
The FSA8008A is an audio jack detector and switch for 3− or 4−pole
accessories. In addition to detection, the FSA8008A features an
integrated MIC switch that allows the processor to configure the audio
jack. The architecture is designed to allow common third−party
headphones to be used for listening to music from mobile handsets,
personal media players, and portable peripheral devices.
www.onsemi.com
Features
1
• Determines 3− or 4−Pole Audio Jacks
UQFN10
CASE 523BC
• Removes Audio Jack Pop−n−Click Caused by MIC Bias
• Detects Audio Jack Accessories:
♦ Standard Headphones
♦ Headsets with MIC
♦ Send / End Button Presses
• Integrates a MIC Switch for 4−Pole Configuration
Detection
Accessory Plug−In 3− or
4−Pole Audio Jack Send/End
Key Pressed
Functionality
Switch Type
Decreased Timing for Sensitive
Send/End Keys
Applications
MIC
• 3.5 mm and 2.5 mm Audio Jacks
• Cellular Phones, Smartphones
• MP3 and PMP
V
DD
V
IO
2.5 to 4.4 V
1.6 to V
DD
THD (MIC)
0.01% Typical
15 kV
Related Resources
ESD (Air Gap)
• FSA8008A Demonstration Board
Operating
Temperature
−40°C to 85°C
Package
10−Lead UMLP
1.4 x 1.8 x 0.5 mm,
0.4 mm Pitch
Top Mark
KD
2.5 to 4.4V 1.6 to VDD
Ordering
FSA8008AUMX
Information
Baseband
Processor
VIO
VDD
mA
Normally Open
(NO) Switch
0.5
EN
J POLE
S/E
GPIO 1
GPIO 2
J_MIC
L
R GND MIC
GPIO 3
GPIO 4
Oscillator
and Logic
1
2 3 4
Audio
RMIC
MIC Bias
S
MIC
L SPKR
R SPKR
COMP
CMIC
HIGH=>J_MIC=0V
LOW=>J_MIC>0.2V
GND
−
Figure 1. Mobile Phone Example
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
FSA8008A/D
December, 2017 − Rev. 2
FSA8008A
Pin Configuration
DET
VIO
2
1
EN
JPOLE
VDD
J_DET
GND
3
4
5
10
9
J_MIC
8
6
7
S/E MIC
Figure 2. 10−Lead UMLP Pin Assignment (Through View)
Table 1. PIN DESCRIPTIONS
Name
Pin #
Type
Description
Function
Plugged
DET
2
Output
Indicates if an accessory is plugged into the audio jack, as detected
on the J_DET pin
0
1
0
1
0
1
0
1
0
1
Unplugged
JPOLE
S/E
4
6
Output
Output
Input
Indicates if an accessory plugged into the audio jack is 3 pole or 4
pole
4−pole jack
3−pole jack
Indicates state of SEND/END for a 4−pole accessory when a key
has been pressed
No key press
Key press
EN
3
Controls internal microphone switch between the J_MIC and MIC
pins
MIC / J_MIC switch open
MIC / J_MIC switch closed
Plugged
J_DET
10
Input
Input from a pin of the audio jack socket tied to a mechanical switch
that typically closes whenever an audio jack is inserted into that
socket
Unplugged
MIC
7
8
Switch
Switch
Microphone switch path that goes to the microphone preamplifier
See EN pin
J_MIC
Microphone switch path that connects to the microphone and SEND/
END key audio jack pole
VDD
VIO
5
1
9
Power
Power
Ground
Core supply voltage
Baseband I/O supply voltage
GND
Ground for both the audio jack and the PCB
1. 0 = V or V ; 1 = V or V
IH
OL
IL
OH
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2
FSA8008A
Power Up
(POR GOOD)
Is there an
accessory
plugged into
the audio
jack?
NO
YES
4-
Pole Configuration
3-Pole Configuration
• DET = 0
3-
4-Pole
Pole
Is the
accessory a
3 or 4 pole?
•
•
DET = 0
JPOLE = 0
• S/E = 0
•
•
JPOLE = 1
S/E = 0
Configure MIC Switch
Is the
accessory 3
or 4 pole?
NO
•
EN = Set by processor
Stuck
Send/End
Key Check
YES
(Note 2)
NO
Is Send/END
key pressed?
Is there an
accessory
plugged into
the audio
jack?
YES
NO
Key Press
No Key Press
•
S/E = 0
•
S/E = 1
YES
Is there an
accessory
plugged into
the audio
jack?
NO
Detached Accessory
Set to Default States
•
•
•
DET = 1
JPOLE = 1
S/E =0
YES
Figure 3. Functional Flow Diagram
2. Stuck Send/End key function is only available if EN=H.
Table 2. STUCK SEND/END KEY
EN
H
FSA8008A
Stuck Send / End Key Active
Stuck Send / End Key Disabled
L
Table 3. STATES DURING POWER GOOD AND OFF
State Description
Active
VDD
VIO
1
DET
EN
JPOLE
S/E
Active
J−DET
MIC Switch
1
0
1
0
OFF
0
1
3−State
1
0
H
Open
(unplugged)
(3 Pole)
(No Press)
(unplugged)
0
1
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3
FSA8008A
Table 4. I/O STATES DURING DETECTION (Note 3)
S/E
JPOLE
3 Pole
4 Pole
3 Pole
4 Pole
J_DET
J_MIC
EN
1
DET
0
0
0
0
1
1
0
1
0
X
0 (no press)
0 (no press)
0 (no press)
0 (no press)
0 (no press)
0 (no press)
1 (press)
0 (4 Pole)
1 (3 Pole)
1 (3 Pole)
1 (3 Pole)
1 (3 Pole)
0 (4 Pole)
0 (4 Pole)
0 (4 Pole)
0 (4 Pole)
1 (3 Pole)
0
0
0
0
1
0
0
0 (no press)
1 (press)
1
X
0 (no press)
3. State detected after initial plug−in.
Table 5. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
Max
Units
V
& V
Supply Voltage from Battery
−0.5
−0.5
−1.5
−50
6.0
V
V
DD
IO
V
Switch I/O Voltage for “S” Switch and All Input Voltages Except J_DET
Input Voltage for J_DET Input
V
V
+0.5
SW
DD
DD
V
+0.5
V
JD
IK
I
Input Clamp Diode Current
mA
mA
_C
_C
_C
kV
I
Switch I/O Current (Continuous)
50
SW
T
Storage Temperature Range
−65
+150
+150
+260
STG
T
J
Maximum Junction Temperature
T
L
Lead Temperature (Soldering, 10 Seconds)
ESD
IEC 61000−4−2 System ESD
Air Gap
Contact
All Pins
15.0
8.0
JEDEC JESD22−A114, Human Body Model
7.5
J_DET, J_MIC, V , V
12.0
2.0
DD
IO
JEDEC JESD22−C101, Charged Device Model
All Pins
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
4. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.
Table 6. RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.5
Max
Units
V
V
DD
Battery Supply Voltage
Parallel I/O Supply Voltage
Operating Temperature
4.4
V
IO
1.6
V
DD
V
T
A
−40
+85
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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4
FSA8008A
Table 7. DC ELECTRICAL CHARACTERISTICS All typical values are at T = 25°C unless otherwise specified.
A
T = −40 to +855C
A
Min
Typ
Max
Symbol
Parameter
V
DD
(V)
Conditions
Units
MIC SWITCH
R
Mic Switch On Resistance
2.5
I
V
= 30 mA,
= 2.0 V
0.9
0.8
2.9
2.5
2.0
W
ON
OUT
IN
2.8
3.8
2.5
0.6
R
On Resistance Flatness
I
= 30 mA,
1.50
FLAT(ON)
OUT
V
IN
= 1.6, 2.0, 2.5
2.8
3.8
I
V
= 30 mA,
= 1.6, 2.0, 2.8
0.70
0.25
OUT
IN
V
Switch Input Voltage Range
2.5 to 4.4
3.8
0
V
DD
V
IN
C
MIC and J_MIC Switch ON Capaci-
tance
f = 1 MHz
f = 1 MHz
76
24
pF
ON
C
MIC and J_MIC Switch OFF Capaci-
tance
3.8
pF
OFF
J_DET
J_DET
J_DET
J_DET
Audio Voltage Range on J_DET Pin
Audio Frequency on J_DET Pin
Detection Resistance to Ground
Hysteresis of J_DET
2.5 to 4.4
2.5 to 4.4
2.5 to 4.4
DET = L
−1
20
0
1
V
AudioV
Audiof
RGND
DET = L
20000
500
Hz
Audio Jack Inserted
KW
mV
J_DET
100
HYS
PARALLEL I/O
V
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
0.7 x V
0.8 x V
V
IO
V
V
V
V
IH
IO
V
0.3 x V
IL
IO
IO
V
OH
I
= −100 mA
= +100 mA
OH
IO
V
OL
I
OL
0.2 x V
COMPARATOR
V
Comparator Threshold for SEND/
END Sensing
2.5−3.8
J_DET, EN = L
MIC and J_MIC
200
mV
COMP
CURRENT
I
Power Off Leakage Current Through
Switch
0
1.5
mA
OFF
Ports V = 4.4 V
IN
I
Input Leakage Current
0 to 4.4
Inputs 0 = 4.4 V
1
3
mA
mA
IN
I
Battery Supply Sleep Mode Current
No Accessory Attached
2.5 to 4.4
Static Current During
Sleep Mode (EN = L)
1
CC−SLNA
I
Battery Supply Sleep Mode Current
with Accessory Attached
2.5 to 4.4
Active Current (EN =
L and/or DET = H)
15
25
mA
CC−SLWA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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5
FSA8008A
Table 8. AC ELECTRICAL CHARACTERISTICS All typical values are for V = 3.3 V at T = 25°C unless otherwise specified.
CC
A
T = −40 to +855C
A
Min
Typ
Max
Symbol
MIC SWITCH
THD
Parameter
V
DD
(V)
Conditions
Unit
Total Harmonic Distortion
Off Isolation
3.8
R = 600 W, V
= 0.5 V ,
PP
0.01
−90
%
T
SW
f = 20 Hz to 20 kHz, V = 2.0 V
IN
O
3.8
f = 20 kHz, R = 32 W,
dB
IRR
S
C = 0 pF, R = 32 W
L
T
PARALLEL I/O
t , t
Output Edge Rates
(DET, S/E, JPOLE)
2.5
3.8
C = 5 pF, 20% to 80%
L
19
15
1
ns
R
F
t
On Time of MIC Switch for
Sensing SEND/END Button Press
Oscillator Stable Time
2.5 to 4.4
ms
POLL
t
Period of MIC Switching Time for
Sensing SEND/END Button Press
2.5 to 4.4
2.5 to 4.4
2.5 to 4.4
2.5 to 4.4
10
422
30
PER
t
Debounce Time after J−DET
Changes State from High to Low
ms
ms
DET−IN
t
Debounce Time after J_DET
Changes State from Low to High
DET_REM
t
Detection Timeout for Sensing
3−Pole or 4−Pole Audio Jack
Plugged In
4.5
ms
DET
KBK
t
Debounce Time for Sensing
SEND/END Key Press / Release
2.5 to 4.4
3.8
27
ms
dB
POWER
PSRR
Power Supply Rejection Ratio
Power Supply Noise 300 mV
,
PP
−90
Measured 10/90%, f = 217 Hz
ORDERING INFORMATION
Part Number
Operating Temperature Range
−40 to +85°C
Top Mark
Package
FSA8008AUMX
KD
10−Lead, 1.4 x 1.8 x 0.55 mm, 0.4 mm Pitch,
Ultrathin Molded Leadless Package (UMLP)
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UQFN10 1.4x1.8, 0.4P
CASE 523BC
ISSUE B
DATE 13 MAY 2022
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13705G
UQFN10 1.4x1.8, 0.4P
PAGE 1 OF 1
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are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
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, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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