FSAL200QSCX [ONSEMI]

宽带宽四路 2:1 模拟多路复用器/信号分离器开关;
FSAL200QSCX
型号: FSAL200QSCX
厂家: ONSEMI    ONSEMI
描述:

宽带宽四路 2:1 模拟多路复用器/信号分离器开关

开关 光电二极管 逻辑集成电路 复用器
文件: 总13页 (文件大小:370K)
中文:  中文翻译
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
October 2007  
FSAL200 — Wide Bandwidth Quad 2:1 Analog  
Multiplexer / De-multiplexer Switch  
Features  
Description  
The Fairchild Switch FSAL200 is a rail-to-rail quad 2:1  
high-speed CMOS TTL-compatible analog multiplexer /  
de-multiplexer switch. The low on resistance of the  
switch allows inputs to be connected to outputs without  
adding propagation delay or generating additional  
ground bounce noise.  
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
Typical 6Ω Switch Connection Between Two Ports  
Minimal Propagation Delay Through the Switch  
Low ICC  
Zero Bounce in Flow-Through Mode  
Control Inputs Compatible with TTL Level  
Rail-to-Rail Signal Handling  
When OE is low, the select pin connects the A Port to  
the selected B Port output. When OE is high, the switch  
is open and a high-impedance state exists between the  
two ports.  
Route Communications Signals Include:  
-
-
-
-
-
-
-
10/100 Ethernet  
100VG—AnyLAN  
ATM25  
SONET OCI 51.8Mbps  
USB1.1  
T1/E1  
Token Ring 4/16Mbps  
Ordering Information  
Packing  
Method  
Part Number  
Package Description  
16-Lead Thin Shrink Small Outline Package(TSSOP), JEDEC MO-153, 4.4mm Wide  
FSAL200MTC  
Rails  
Tape and  
Reel  
FSAL200MTCX 16-Lead Thin Shrink Small Outline Package(TSSOP), JEDEC MO-153, 4.4mm Wide  
FSAL200QSC  
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide  
Rails  
Tape and  
Reel  
FSAL200QSCX 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide  
All packages are Pb-free per JEDEC standard J-SDD-020B.  
© 2002 Fairchild Semiconductor Corporation  
FSAL200 Rev. 1.7.1  
www.fairchildsemi.com  
Pin Configurations  
Figure 1. Analog Symbol  
Figure 2. Connection Diagram  
Control Input(s)  
OE  
High  
Low  
Low  
Function  
Disconnected  
A=B1  
X
Low  
High  
A=B2  
Pin Descriptions  
Pin Names  
Function  
Switch Enable  
Select Input  
Data Ports  
OE  
S
A, B1, B2  
© 2002 Fairchild Semiconductor Corporation  
FSAL200 Rev. 1.7.1  
www.fairchildsemi.com  
2
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device  
reliability. The absolute maximum ratings are stress ratings only.  
Min.  
-0.5  
-0.5  
-0.5  
Max.  
7.0  
Unit  
V
Symbol  
VCC  
Parameter  
Supply Voltage  
VSW  
VIN  
DC Switch Voltage(1)  
DC Input Voltage(1)  
0.5  
V
7.0  
V
IIK  
DC Input Diode Current at (IIK) VIN < 0V  
DC Output Current  
-50  
mA  
mA  
mA  
W
IOUT  
120  
±100  
0.5  
ICC/IGND  
PD  
DC VCC or Ground Current  
Power Dissipation at 85°C  
TSTG  
TA  
Storage Temperature Range  
Ambient Temperature with Power Applied  
-65  
-40  
+150  
+85  
°C  
°C  
Note:  
1. Input and output negative ratings may be exceeded if input and output diode current ratings are observed.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
VCC  
Parameter  
Min.  
3.0  
0
Max.  
5.5  
VCC  
VCC  
VCC  
+85  
10  
Unit  
V
Supply Voltage  
VIN  
Control Input Voltage(2)  
Switch Input Voltage  
Output Voltage  
V
VSW  
V
VOUT  
TA  
V
Operating Temperature  
-40  
0
°C  
Control Input VCC=2.3V -3.6V  
Control Input VCC=4.5V -5.5V  
tr,tf  
Input Rise and Fall Time  
ns/V  
0
5
Thermal Resistance in Still Sir  
°C/W  
θJA  
Note:  
2. Control input must be held HIGH or LOW and it must not float.  
© 2002 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSAL200 Rev. 1.7.1  
3
DC Electrical Characteristics  
Typical values are at 25°C unless otherwise specified.  
TA=-40°C to +85°C  
Symbol  
Parameter  
Conditions  
VCC(V)  
Units  
Min.  
2.0  
Typ. Max.  
4.5 to 5.5  
3.0 to 3.6  
4.5 to 5.5  
3.0 to 3.6  
0 to 5.5  
4.5 to 5.5  
3.0 to 3.6  
5.5  
VIH  
Input Voltage High  
V
2.0  
-0.5  
-0.5  
0.8  
0.8  
100  
VIL  
IOZ  
Input Voltage Low  
V
µA  
Ω
Off State Leakage Current  
Switch On Resistance(3)  
0 VIN 5.5V  
ION=10 -30mA  
ON=10 -30mA  
6
12  
22  
±1  
±1  
RON  
I
15  
VIN=VCC or GND  
VIN=VCC or GND  
IIN  
Control Input Leakage  
µA  
µA  
V
3.6  
Quiescent Supply Current,  
All Channels Off  
ICC  
VIN=VCC or GND, IOUT=0  
5.5  
1
Analog Signal Range  
VCC  
0
VCC  
IA=-30 mA, VBN=3.15  
IA=-10 mA, VBN=2.1  
4.5 to 5.5  
3.0 to 3.6  
0.4  
1.0  
2.0  
3.0  
On Resistance Matching  
Between Channels(3)(4)  
ΔRON  
Ω
4.5 to 5.5  
3.0 to 3.6  
4.5 to 5.5  
3.0 to 3.6  
100  
80  
IO  
Output Current  
Bn, Bn, S-0V to 5V  
mΑ  
A1, B1, B2=0V to 5V  
A1, B1, B2=0V to 5V  
3
7
RFLAT(ON) On Resistance Flatness(3)(5)  
Ω
Notes:  
3. Measured by the voltage drop between the A and B pins at the indicated current through the switch. On  
resistance is determined by the lower of the voltages on the two (A or B ports).  
4. ΔRON = RON maximum – RON minimum measured at identical VCC, temperature, and voltage levels.  
5. Flatness is defined as the difference between the maximum and minimum value of on resistance over the  
specified range of conditions.  
© 2002 Fairchild Semiconductor Corporation  
FSAL200 Rev. 1.7.1  
www.fairchildsemi.com  
4
AC Electrical Characteristics  
Typical values are at 25°C unless otherwise specified.  
Symbol  
Parameter  
Conditions  
VBn=3V  
VCC(V)  
4.5 to 5.5  
3.0 to 3.6  
4.5 to 5.5  
3.0 to 3.6  
5.0  
Min.  
Typ.  
10  
28  
5
Max.  
20  
Units  
Figure  
Figure 3  
Figure 4  
Figure 3  
Figure 4  
tON  
Turn-On Time  
ns  
VBn=1.5V  
VBn-3V  
40  
10  
tOFF  
Turn-Off Time  
ns  
pC  
dB  
VBn=1.5V  
4
20  
7
CL=0.1nF,VGEN=0  
Charge  
Injection  
Q
Figure 5  
Figure 6  
Figure 7  
Figure 9  
Figure 9  
RGEN=0Ω  
3.3  
3
4.5 to 5.5  
3.0 to 3.6  
4.5 to 5.5  
3.0 to 3.6  
4.5 to 5.5  
3.0 to 3.6  
4.5 to 5.5  
3.0 to 3.6  
-55  
-75  
-70  
-75  
137  
110  
2
RL=100Ω ,f=30MHz  
RL=50Ω, f=1MHz  
RL=100Ω ,f=30MHz  
RL=50Ω, f=1MHz  
RL=100Ω  
OIRR  
Off Isolation  
Crosstalk  
Xtalk  
BW  
dB  
MHz  
%
-3db  
Bandwidth  
RL=50Ω  
D
ΔRON/RL  
RL=100Ω  
3
Notes:  
6. Guaranteed by design.  
7. Off Isolation =20 log10 [VA / VBn].  
Capacitance  
TA=+25°C, f=1MHz. Capacitance is characterized, but not tested in production.  
Symbol  
Parameter  
Conditions  
VCC=0V  
VCC=5.0V and 3.0V  
CC=5.0V and 3.0V  
Typ.  
2.3  
8
Units  
Figure  
CIN  
Control Pin Input Capacitance  
B Port Off Capacitance  
A Port Off Capacitance  
Channel On Capacitance  
pF  
pF  
pF  
Figure 10  
Figure 10  
Figure 7  
CIO-B  
CON  
V
13  
VCC=5.0V and 3.0V  
15  
© 2002 Fairchild Semiconductor Corporation  
FSAL200 Rev. 1.7.1  
www.fairchildsemi.com  
5
AC Loadings and Waveforms  
Figure 3. AC Waveforms  
Figure 4. ton, toff Loading  
© 2002 Fairchild Semiconductor Corporation  
FSAL200 Rev. 1.7.1  
www.fairchildsemi.com  
6
AC Loadings and Waveforms (Continued)  
Figure 5.  
Charge Injection Test  
Figure 6. Off Isolation  
Figure 7. Channel On Capacitance  
Figure 8. Crosstalk  
Figure 9. Bandwidth  
Figure 10. Channel Off Capacitance  
© 2002 Fairchild Semiconductor Corporation  
FSAL200 Rev. 1.7.1  
www.fairchildsemi.com  
7
Physical Dimensions  
LAND PATTERN  
TOP VIEW  
RECOMMENDATION  
END VIEW  
SIDE VIEW  
DETAIL A  
Figure 11. 16-lead, Quarter Size Outline Package (QSOP), JEDEC MO-137. 0.150” wide  
Click here for tape and reel specifications, available at:  
http://www.fairchildsemi.com/products/analog/pdf/qsop16_tr.pdf  
© 2002 Fairchild Semiconductor Corporation  
FSAL200 Rev. 1.7.1  
www.fairchildsemi.com  
8
Physical Dimensions (Continued)  
5.00±0.10  
4.55  
5.90  
4.45 7.35  
0.65  
4.4±0.1  
1.45  
5.00  
0.11  
12°  
MTC16rev4  
Figure 12. 16-lead, Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm wide  
Click here for tape and reel specifications, available at:  
http://www.fairchildsemi.com/products/analog/pdf/tssop16_tr.pdf  
© 2002 Fairchild Semiconductor Corporation  
FSAL200 Rev. 1.7.1  
www.fairchildsemi.com  
9
TRADEMARKS  
The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and is not  
intended to be an exhaustive list of all such trademarks.  
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Power247®  
Green FPS™  
Green FPSe-Series™  
GTO™  
i-Lo™  
IntelliMAX™  
ISOPLANAR™  
MegaBuck™  
MICROCOUPLER™  
MicroFET™  
SuperSOT-8  
POWEREDGE®  
Power-SPM™  
PowerTrench®  
Programmable Active Droop™  
QFET®  
Build it Now™  
CorePLUS™  
CROSSVOLT™  
CTL™  
SyncFET™  
The Power Franchise®  
TinyBoost™  
TinyBuck™  
TinyLogic®  
TINYOPTO™  
TinyPower™  
TinyPWM™  
TinyWire™  
μSerDes™  
UHC®  
Current Transfer Logic™  
EcoSPARK®  
QS™  
®
QT Optoelectronics™  
Quiet Series™  
RapidConfigure™  
SMART START™  
SPM®  
STEALTH™  
SuperFET™  
Fairchild®  
Fairchild Semiconductor®  
FACT Quiet Series™  
FACT®  
MicroPak™  
MillerDrive™  
Motion-SPM™  
OPTOLOGIC®  
FAST®  
OPTOPLANAR®  
FastvCore™  
®
SuperSOT-3  
SuperSOT-6  
UniFET™  
VCX™  
FPS™  
FRFET®  
PDP-SPM™  
Power220®  
Global Power ResourceSM  
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HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE  
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS  
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S  
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR  
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,  
which, (a) are intended for surgical implant into the body or  
(b) support or sustain life, and (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
result in a significant injury of the user.  
device, or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or In Design  
This datasheet contains the design specifications for product  
development. Specifications may change in any manner without notice.  
Preliminary  
First Production  
Full Production  
Not In Production  
This datasheet contains preliminary data; supplementary data will be  
published at a later date. Fairchild Semiconductor reserves the right to  
make changes at any time without notice to improve design.  
No Identification Needed  
Obsolete  
This datasheet contains final specifications. Fairchild Semiconductor  
reserves the right to make changes at any time without notice to improve  
design.  
This datasheet contains specifications on a product that has been  
discontinued by Fairchild Semiconductor. The datasheet is printed for  
reference information only.  
Rev. I31  
© 2002 Fairchild Semiconductor Corporation  
FSAL200 Rev. 1.7.1  
www.fairchildsemi.com  
10  
© 2002 Fairchild Semiconductor Corporation  
FSAL200 Rev. 1.7.1  
www.fairchildsemi.com  
11  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
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