FSB50325AT [ONSEMI]
Motion SPM® 5 系列;
| 型号： | FSB50325AT |
| 厂家： | 
ONSEMI |
| 描述： | Motion SPM® 5 系列 电动机控制 光电二极管 |
| 文件： | 总13页 (文件大小：972K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Motion SPM) 5 Series
FSB50325A, FSB50325AT,
FSB50325AS
General Description
The FSB50325A/AT/AS is an advanced Motion SPM 5 module
providing a fully−featured, high−performance inverter output stage
for AC Induction, BLDC and PMSM motors. These modules integrate
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®
optimized gate drive of the built−in MOSFETs (FRFET technology)
to minimize EMI and losses, while also providing multiple on−module
protection features including under−voltage lockouts and thermal
monitoring. The built−in high−speed HVIC requires only a single
supply voltage and translates the incoming logic−level gate inputs to
the high−voltage, high−current drive signals required to properly drive
the module’s internal MOSFETs. Separate open−source MOSFET
terminals are available for each phase to support the widest variety of
control algorithms.
SPM5E*023 / 23LD,
PDD STD, FULL PACK,
DIP TYPE
CASE MODEJ
SPM5G*023 / 23LD,
PDD STD, FULL PACK,
DOUBLE DIP TYPE (BSH)
CASE MODEL
Features
• UL Certified No. E209204 (UL1557)
• 250 V R
= 1.7 ꢀ (Max) FRFET MOSFET 3−Phase Inverter
with Gate Drivers and Protection
DS(on)
• Built−in Bootstrap Diodes Simplify PCB Layout
• Separate Open−Source Pins from Low−Side MOSFETs for
Three−Phase Current−Sensing
• Active−HIGH Interface, Works with 3.3 / 5 V Logic, Schmitt−trigger
Input
SPM5H*023 / 23LD,
PDD STD, SPM23*BD
(Ver1.5) SMD TYPE
CASE MODEM
• Optimized for Low Electromagnetic Interference
• HVIC Temperature−Sensing Built−in for Temperature Monitoring
• HVIC for Gate Driving and Under−Voltage Protection
• Isolation Rating: 1500 Vrms / 1 min.
• Moisture Sensitive Level (MSL) 3 − FSB50325AS
• These Devices are Pb−Free and are RoHS Compliant
MARKING DIAGRAM
$Y
FSB50325x
&Z&K&E&E&E&3
Applications
$Y
= ON Semiconductor Logo
• 3−Phase Inverter Driver for Small Power AC Motor Drives
FSB50325x = Specific Device Code
(x = A, AT, AS)
&Z
&K
&E
&3
Related Source
= Assembly Plant Code
= 2−Digits Lot Run Traceability Code
= Designate Space
• RD−FSB50450A − Reference Design for Motion SPM 5 Series Ver.2
• AN−9082 − Motion SPM5 Series Thermal Performance by Contact
Pressure
= 3−Digits Data Code Format
• AN−9080 − User’s Guide for Motion SPM 5 Series V2
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
October, 2019 − Rev. 3
FSB50325A/D
FSB50325A, FSB50325AT, FSB50325AS
ORDERING INFORMATION
Device
†
Device Marking
Package
Shipping
FSB50325A
FSB50325A
SPM5E−023
(Pb−Free)
270 / Tube
180 / Tube
FSB50325AT
FSB50325AS
FSB50325AT
FSB50325AS
SPM5G−023
(Pb−Free)
SPM5H−023
(Pb−Free)
450 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Rating
Unit
INVERTER PART (each MOSFET unless otherwise specified.)
V
*I
Drain−Source Voltage of Each MOSFET
250
1.7
V
A
DSS
Each MOSFET Drain Current, Continuous
T
T
= 25°C
= 80°C
D 25
C
*I
D 80
Each MOSFET Drain Current, Continuous
1.3
A
A
C
T
C
T
C
T
C
= 25°C, PW < 100 ms
*I
Each MOSFET Drain Current, Peak
Each MOSFET Drain Current, Rms
Maximum Power Dissipation
4.4
0.9
DP
*I
DRMS
= 80°C, F
< 20 kHz
A
rms
PWM
*P
= 25°C, For Each MOSFET
12.3
W
D
CONTROL PART (each HVIC unless otherwise specified.)
V
Control Supply Voltage
High−side Bias Voltage
Input Signal Voltage
Applied Between V and COM
20
20
V
V
V
CC
CC
V
Applied Between V and V
B S
BS
V
Applied Between IN and COM
−0.3~V + 0.3
IN
CC
BOOTSTRAP DIODE PART (each bootstrap diode unless otherwise specified.)
V
Maximum Repetitive Reverse Voltage
Forward Current
250
0.5
1.5
V
A
A
RRMB
* I
T
T
= 25°C
FB
C
* I
Forward Current (Peak)
= 25°C, Under 1 ms Pulse Width
FPB
C
THERMAL RESISTANCE
Junction to Case Thermal Resistance
R
Each MOSFET under Inverter Operating
Condition (Note 1)
10.2
°C/W
ꢁ
JC
TOTAL SYSTEM
T
Operating Junction Temperature
Storage Temperature
−40~150
−40~125
1500
°C
°C
J
T
STG
V
ISO
Isolation Voltage
60 Hz, Sinusoidal, 1 Minute, Connect Pins to
Heat Sink Plate
V
rms
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. For the measurement point of case temperature T , please refer to Figure 4.
C
2. Marking “ * ” is calculation value or design factor.
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2
FSB50325A, FSB50325AT, FSB50325AS
PIN DESCRIPTION
Pin No.
1
Pin Name
COM
Description
IC Common Supply Ground
2
V
Bias Voltage for U−Phase High−Side MOSFET Driving
Bias Voltage for U−Phase IC and Low−Side MOSFET Driving
Signal Input for U−Phase High−Side
B(U)
3
V
CC(U)
4
IN
(UH)
5
IN
(UL)
Signal Input for U−Phase Low−Side
6
N.C
No Connection
7
V
Bias Voltage for V−Phase High Side MOSFET Driving
Bias Voltage for V−Phase IC and Low Side MOSFET Driving
Signal Input for V−Phase High−Side
B(V)
8
V
CC(V)
9
IN
(VH)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
IN
Signal Input for V−Phase Low−Side
(VL)
V
Output for HVIC Temperature Sensing
TS
V
B(W)
Bias Voltage for W−Phase High−Side MOSFET Driving
Bias Voltage for W−Phase IC and Low−Side MOSFET Driving
Signal Input for W−Phase High−Side
V
CC(W)
IN
(WH)
IN
(WL)
Signal Input for W−Phase Low−Side
N.C
No Connection
P
Positive DC−Link Input
U, V
Output for U−Phase & Bias Voltage Ground for High−Side MOSFET Driving
Negative DC−Link Input for U−Phase
S(U)
U
N
N
Negative DC−Link Input for V−Phase
V
V, V
Output for V−Phase & Bias Voltage Ground for High−Side MOSFET Driving
Negative DC−Link Input for W−Phase
S(V)
W
N
W, V
Output for W Phase & Bias Voltage Ground for High−Side MOSFET Driving
S(W)
(1) COM
(2) VB(U)
(3) VCC(U)
(4) IN(UH)
(5) IN(UL)
(17) P
VCC
HIN
VB
HO
VS
LO
(18) U, VS(U)
LIN
COM
(6) N.C
(19) N U
(20) N V
(7) VB(V)
(8) VCC(V)
(9) IN(VH)
(10) IN(VL)
VCC
HIN
VB
HO
VS
LO
(21) V, VS(V)
LIN
COM
(11) VTS
V
TS
(12) VB(W)
(13) VCC(W)
(14) IN(WH)
(15) IN(WL)
VCC
HIN
VB
HO
VS
LO
(22) N W
(23) W, VS(W)
LIN
COM
(16) N.C
Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)
NOTE:
3. Source terminal of each low−side MOSFET is not connected to supply ground or bias voltage ground inside Motion SPM 5 product. External
connections should be made as indicated in Figure 3.
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3
FSB50325A, FSB50325AT, FSB50325AS
ELECTRICAL CHARACTERISTICS (T = 25°C, V = VBS = 15 V unless otherwise noted)
J
CC
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
INVERTER PART (each MOSFET unless otherwise specified.)
BV
Drain − Source Breakdown Voltage
V
V
V
= 0 V, I = 1 mA (Note 4)
250
−
−
−
−
1
V
mA
ꢀ
DSS
IN
D
I
Zero Gate Voltage Drain Current
= 0 V, V = 250 V
DS
DSS
IN
R
Static Drain − Source Turn−On
Resistance
= V = 15 V, V = 5 V, I = 1.0 A
−
1.1
1.7
DS(on)
CC
BS
IN
D
V
Drain − Source Diode Forward Voltage
V
= V = 15V, V = 0 V, I = −1.0 A
−
−
−
−
−
−
−
1.2
−
V
SD
CC
BS
IN
D
t
Switching Times
V
V
= 150 V, V = V = 15 V, I = 1.0 A
810
600
140
40
ns
ns
ns
mJ
mJ
ON
PN
IN
CC
BS
D
= 0 V e 5 V, Inductive Load L = 3 mH
t
−
OFF
High− and Low−Side MOSFET Switching
(Note 5)
t
−
rr
E
ON
−
E
OFF
10
−
RBSOA Reverse Bias Safe Operating Area
V
V
= 200 V, V = V = 15 V, I = I ,
DP
Full Square
PN
DS
CC
BS
D
= BV
, T = 150°C
DSS
J
High− and Low−Side MOSFET Switching
(Note 6)
CONTROL PART (each HVIC unless otherwise specified.)
I
Quiescent V Current
V
= 15 V, V = 0 V
Applied Between
and COM
−
−
−
−
200
100
A
QCC
CC
CC
IN
V
CC
I
Quiescent V Current
V
BS
= 15 V, V = 0V
Applied Between
ꢂ
A
QBS
BS
IN
V
V
− U, V
− V,
B(U)
B(W)
B(V)
− W
U
U
Low−Side Under−Voltage Protection
V
CC
V
CC
V
BS
V
BS
V
CC
Under−Voltage Protection Detection Level
Under−Voltage Protection Reset Level
Under−Voltage Protection Detection Level
Under−Voltage Protection Reset Level
7.4
8.0
7.4
8.0
600
8.0
8.9
8.0
8.9
790
9.4
9.8
9.4
9.8
980
V
V
VCCD
VCCR
(Figure 8)
U
U
High−Side Under−Voltage Protection
(Figure 9)
V
VBSD
VBSR
V
V
HVIC Temperature Sensing Voltage
Output
= 15 V, T
= 25°C (Note 7)
mV
TS
HVIC
V
ON Threshold Voltage
OFF Threshold Voltage
Logic HIGH Level
Logic LOW Level
Applied between IN
and COM
−
−
−
2.9
V
V
IH
V
0.8
−
IL
BOOTSTRAP DIODE PART (each bootstrap diode unless otherwise specified.)
V
Forward Voltage
I = 0.1 A, T = 25°C (Note 8)
−
−
2.5
80
−
−
V
FB
F
C
trrB
Reverse Recovery Time
I = 0.1 A, T = 25°C
ns
F
C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. BV
is the absolute maximum voltage rating between drain and source terminal of each MOSFET inside Motion SPM 5 product. V should
DSS
PN
be sufficiently less than this value considering the effect of the stray inductance so that V should not exceed BV
in any case.
PN
DSS
5. t and t
include the propagation delay of the internal drive IC. Listed values are measured at the laboratory test condition, and they can
ON
OFF
be different according to the field applications due to the effect of different printed circuit boards and wirings. Please see Figure 6 for the
switching time definition with the switching test circuit of Figure 7.
6. The peak current and voltage of each MOSFET during the switching operation should be included in the Safe Operating Area (SOA). Please
see Figure 7 for the RBSOA test circuit that is same as the switching test circuit.
7. V is only for sensing−temperature of module and cannot shutdown MOSFETs automatically.
ts
8. Built−in bootstrap diode includes around 15 ꢀ resistance characteristic. Please refer to Figure 2.
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4
FSB50325A, FSB50325AT, FSB50325AS
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Supply Voltage
Conditions
Min
Typ
150
Max
200
Unit
V
V
Applied Between P and N
PN
CC
V
Control Supply Voltage
Applied Between V and COM
13.5
13.5
3.0
0
15.0
15.0
16.5
16.5
V
CC
V
BS
High−Side Bias Voltage
Applied Between V and V
S
V
B
V
IN(ON)
Input ON Threshold Voltage
Input OFF Threshold Voltage
Blanking Time for Preventing Arm−Short
PWM Switching Frequency
Applied Between IN and COM
V
CC
V
V
0.6
V
IN(OFF)
t
V
= V = 13.5~16.5 V, T ≤ 150°C
1.0
ꢂ s
kHz
dead
CC
BS
J
f
T ≤ 150°C
J
15
PWM
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Built−in Bootstrap Diode V − I Characteristic
F
F
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V [V]
F
Tc = 25°C
Figure 2. Built−in Bootstrap Diode Characteristics (Typical)
These values depend on PWM control algorithm
* Example Circuit : V phase
C1
+15 V
VDC
HIN
0
LIN
0
Output
Note
P
V
VCC
HIN
VB
HO
VS
LO
Z
Both FRFET Off
Low side FRFET On
High side FRFET On
Shoot through
Inverter
Output
R5
0
1
0
VDC
LIN
1
0
C3
1
1
Forbidden
Z
C5
COM
VTS
R3
Open Open
Same as (0, 0)
N
C4
One Leg Diagram of Motion SPM 5 Product
* Example of Bootstrap Parameters
C2
10 μF
C
1
= C = 1 ꢂF Ceramic Capacitor
2
Figure 3. Recommended MCU Interface and Bootstrap Circuit with Parameters
NOTES:
9. Parameters for bootstrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of
parameters is shown above.
10.RC−coupling (R and C ) and C at each input of Motion SPM 5 product and MCU (Indicated as Dotted Lines) may be used to prevent
5
5
4
improper signal due to surge−noise.
11. Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge−voltage.
Bypass capacitors such as C , C and C should have good high−frequency characteristics to absorb high−frequency ripple−current.
1
2
3
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5
FSB50325A, FSB50325AT, FSB50325AS
FSB50325AT
FSB50325A
Figure 4. Case Temperature Measurement
NOTE:
12.Attach the thermocouple on top of the heat−sink of SPM 5 package (between SPM 5 package and heatsink if applied) to get the correct
temperature measurement.
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1
2
3
T
4
5
6
7
[°C]
HVIC
Figure 5. Temperature Profile of VTS (Typical)
VIN
VIN
Irr
120% of ID
100% of ID
VDS
ID
10% of ID
ID
VDS
tON
trr
tOFF
(a) Turn−on
(b) Turn−on
Figure 6. Switching Time Definitions
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6
FSB50325A, FSB50325AT, FSB50325AS
CBS
VCC
ID
VCC
HIN
LIN
VB
HO
VS
LO
L
VDC
+
VDS
−
COM
VTS
One Leg Diagram of Motion SPM 5 Product
Figure 7. Switching and RBSOA (Single−pulse) Test Circuit (Low−side)
Input Signal
UV Protection
RESET
DETECTION
RESET
Status
UVCCR
Low−side Supply, V
CC
UVCCD
MOSFET Current
Figure 8. Under−Voltage Protection (Low−Side)
Input Signal
UV Protection
Status
RESET
DETECTION
RESET
UVBSR
High−side Supply, VBS
UVBSD
MOSFET Current
Figure 9. Under−Voltage Protection (High−Side)
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FSB50325A, FSB50325AT, FSB50325AS
C
1
(1) COM
(2) V B(U)
(17) P
(3) VCC(U)
(4) IN(UH)
(5) IN(UL)
VCC
HIN
VB
R5
HO
VS
(18) U, VS(U)
VDC
C3
LIN
C5
C2
COM
LO
VB
(6) N.C
(19) NU
(20) NV
(7) V B(V)
(8) VCC(V)
(9) IN(VH)
(10) IN(VL)
VCC
HIN
LIN
HO
VS
(21) V, VS(V)
M
LO
VB
COM
VTS
(11) VTS
(12) VB(W)
(13) VCC(W)
(14) IN(WH)
(15) IN(WL)
(22) NW
VCC
HIN
HO
VS
(23) W, VS(W)
LIN
COM
LO
(16) N.C
C4
R4
For current−sensing and protection
15 V
Supply
C6
R3
Figure 10. Example of Application Circuit
NOTES:
13.About pin position, refer to Figure 1.
14.RC−coupling (R and C , R and C ) and C at each input of Motion SPM 5 product and MCU are useful to prevent improper input signal
5
5
4
6
4
caused by surge−noise.
15.The voltage−drop across R affects the low−side switching performance and the bootstrap characteristics since it is placed between COM
3
and the source terminal of the low−side MOSFET. For this reason, the voltage−drop across R should be less than 1 V in the steady−state.
3
16.Ground−wires and output terminals, should be thick and short in order to avoid surge−voltage and malfunction of HVIC.
17.All the filter capacitors should be connected close to Motion SPM 5 product, and they should have good characteristics for rejecting
high−frequency ripple current.
SPM and FRFET are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SPM5E−023 / 23LD, PDD STD, FULL PACK, DIP TYPE
CASE MODEJ
ISSUE O
DATE 31 JAN 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13543G
SPM5E−023 / 23LD, PDD STD, FULL PACK, DIP TYPE
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SPM5G−023 / 23LD, PDD STD, FULL PACK, DOUBLE DIP TYPE (BSH)
CASE MODEL
ISSUE O
DATE 31 JAN 2017
98AON13545G
ON SEMICONDUCTOR STANDARD
DOCUMENT NUMBER:
STATUS:
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
NEW STANDARD:
DESCRIPTION: SPM5G−023 / 23LD, PDD STD, FULL PACK, DOUBLE DIP TYPE (BSH)
PAGE 1 OF2
DOCUMENT NUMBER:
98AON13545G
PAGE 2 OF 2
ISSUE
REVISION
DATE
O
RELEASED FOR PRODUCTION FROM FAIRCHILD MOD23DF TO ON SEMICON-
DUCTOR. REQ. BY D. GASTELUM.
31 JAN 2017
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
© Semiconductor Components Industries, LLC, 2017
Case Outline Number:
January, 2017 − Rev. O
MODEL
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SPM5H−023 / 23LD, PDD STD, SPM23−BD (Ver1.5) SMD TYPE
CASE MODEM
ISSUE O
DATE 31 JAN 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13546G
SPM5H−023 / 23LD, PDD STD, SPM23−BD (Ver1.5) SMD TYPE
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
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ADDITIONAL INFORMATION
TECHNICAL PUBLICATIONS:
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For additional information, please contact your local Sales Representative at
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