FSB50760BSFS [ONSEMI]
Intelligent Power Module, 600V, 3.6A, SMD;型号: | FSB50760BSFS |
厂家: | ONSEMI |
描述: | Intelligent Power Module, 600V, 3.6A, SMD |
文件: | 总13页 (文件大小:612K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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onsemi andꢀꢀꢀꢀꢀꢀꢀand other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
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regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
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FSB50760BSF /
FSB50760BSFS
Motion SPM) 5 SUPERFET)
Series
General Description
The FSB50760BSF / FSB50760BSFS is an advanced Motion
SPM 5 module providing a fully−featured, high−performance inverter
output stage for AC Induction, BLDC and PMSM motors such as
refrigerators, fans and pumps. These modules integrate optimized gate
drive of the built−in MOSFETs (SuperFET technology) to minimize
EMI and losses, while also providing multiple on−module protection
features including under−voltage lockouts and thermal monitoring.
The built−in high−speed HVIC requires only a single supply voltage
and translates the incoming logic−level gate inputs to the
high−voltage, high−current drive signals required to properly drive the
module’s internal MOSFETs. Separate open−source MOSFET
terminals are available for each phase to support the widest variety of
control algorithms.
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SPM5E−023 / 23LD, PDD STD
CASE MODEJ
Features
• UL Certified No. E209204 (UL1557)
• 600 V R
= 830 mW (Max) SuperFET MOSFET 3−Phase
SPM5H−023 / 23LD, PDD STD,
SPM23−BD
DS(ON)
Inverter with Gate Drivers and Protection
CASE MODEM
• Built−In Bootstrap Diodes Simplify PCB Layout
• Separate Open−Source Pins from Low−Side MOSFETs for
MARKING DIAGRAM
Three−Phase Current−Sensing
• Active−HIGH Interface, Works with 3.3 / 5 V Logic, Schmitt−trigger
Input
$Y
FSB50760BX
&Z&K&E&E&E&3
• Optimized for Low Electromagnetic Interference
• HVIC Temperature−Sensing Built−In for Temperature Monitoring
• HVIC for Gate Driving and Under−Voltage Protection
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
• Isolation Rating: 1500 V / min.
rms
• Moisture Senstive Level (MSL) 3
• These Devices are Pb−Free and are RoHS Compliant
FSB50760X
= Specific Device Code
⇒ X = SF or SFS
Applications
• 3−Phase Inverter Driver for Small Power AC Motor Drives
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
Related Source
• RD−402: Reference Design for Motion SPM 5 Super− FET Series
• AN−9082 − Motion SPM5 Series Thermal Performance by Contact
Pressure
• AN−9082: User’s Guide for Motion SPM 5 Series V2
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
April, 2019 − Rev. 2
FSB50760BSF/D
FSB50760BSF / FSB50760BSFS
PACKAGE MARKING AND ORDERING INFORMATION
Device Marking
50760BSF
Device
Package
Reel Size
Rail
Packing Type
NA
Quantity
15
FSB50760BSF
FSB50760BSFS
SPM5P−023
SPM5Q−023
50760BSFS
Tape & Reel
330 mm
450
ABSOLUTE MAXIMUM RATINGS (T = 25°C, Unless otherwise noted)
C
Conditions
Symbol
INVERTER PART (Each MOSFET Unless Otherwise Specified)
Parameter
Rating
Unit
V
PN
DC Link Input Voltage,
Drain−Source Voltage of Each MOSFET
600
V
BV
Drain−Source Voltage
V
= 0V, I = 250 mA
600
40
V
DSS
IN
D
I
Zero−Bias Static Leakage Current
V
V
= 400 V, V = 0 V,
mA
PN
PN
DD
IN
= V = 0 V,
BS
T
= T = 25°C for all phase
C
J
*I
*I
Each MOSFET Drain Current, Continuous
Each MOSFET Drain Current, Continuous
T
T
= 25°C
3.6
2.7
A
A
A
D 25
C
= 80°C
D 80
C
T
C
T
C
T
C
= 25°C, PW < 100 ms
*I
Each MOSFET Drain Current, Peak
Each FRFET Drain Current, Rms
Maximum Power Dissipation
9.4
1.9
DP
*I
DRMS
= 80°C, F
< 20 kHz
A
rms
PWM
*P
= 25°C, For Each MOSFET
14.5
W
D
CONTROL PART (Each HVIC Unless Otherwise Specified)
V
Control Supply Voltage
High−side Bias Voltage
Input Signal Voltage
Applied Between V and COM
20
20
V
V
V
DD
DD
V
Applied Between V and V
B S
BS
V
Applied Between IN and COM
−0.3 ~ V +0.3
IN
DD
BOOTSTRAP DIODE PART (Each Bootstrap Diode Unless Otherwise Specified.)
V
Maximum Repetitive Reverse Voltage
Forward Current
600
0.5
1.5
V
A
A
RRMB
* I
T = 25°C
C
FB
* I
Forward Current (Peak)
T = 25°C, Under 1ms Pulse Width
C
FPB
THERMAL RESISTANCE
R
Junction to Case Thermal Resistance
(Note 1)
Inverter MOSFET part, (Per Module)
2.15
°C/W
th(j−c)Q
TOTAL SYSTEM
T
Operating Junction Temperature
−40 ~ 150
°C
°C
J
T
Storage Temperature
Isolation Voltage
−40 ~ 125
STG
V
ISO
60 Hz, Sinusoidal, 1 minute,
Connection Pins to Heatsink
1500
V
rms
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. For the Measurement Point of Case Temperature T , Please refer to Figure 4.
C
2. Marking “ * ” Is Calculation Value or Design Factor.
3. Using contiunously under heavy loads or excessive assembly conditions (e.g. the application of high temperature/ current/ voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions
(i.e. operating temperature/ current/ voltage, etc.) are within the absolute maximum ratings and the operating ranges.
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2
FSB50760BSF / FSB50760BSFS
PIN DESCRIPTIONS
Pin No.
Pin Name
COM
Pin Description
1
IC Common Supply Ground
2
V
B(U)
Bias Voltage for U Phase High Side FRFET Driving
3
4
V
Bias Voltage for U Phase IC and Low Side FRFET Driving
DD(U)
IN
Signal Input for U Phase High−side
(UH)
5
6
7
IN
Signal Input for U Phase Low−side
(UL)
N.C
N.C
V
B(V)
Bias Voltage for V Phase High Side FRFET Driving
8
V
DD(V)
Bias Voltage for V Phase IC and Low Side FRFET Driving
9
IN
Signal Input for V Phase High−side
Signal Input for V Phase Low−side
(VH)
10
IN
(VL)
11
V
TS
Output for HVIC Temperature Sensing
12
13
14
V
Bias Voltage for W Phase High Side FRFET Driving
Bias Voltage for W Phase IC and Low Side FRFET Driving
Signal Input for W Phase High−side
B(W)
V
DD(W)
IN
(WH)
15
16
17
IN
Signal Input for W Phase Low−side
N.C
(WL)
N.C
P
Positive DC–Link Input
18
19
20
U, V
Output for U Phase & Bias Voltage Ground for High Side FRFET Driving
Negative DC–Link Input for U Phase
S(U)
N
N
U
Negative DC–Link Input for V Phase
V
21
22
23
V, V
Output for V Phase & Bias Voltage Ground for High Side FRFET Driving
Negative DC–Link Input for W Phase
S(V)
N
W
W, V
Output for W Phase & Bias Voltage Ground for High Side FRFET Driving
S(W)
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3
FSB50760BSF / FSB50760BSFS
(1) COM
(17) P
(2) V
B(U)
(3) V
VCC
HIN
VB
HO
VS
LO
CC(U)
(4) IN
(UH)
(18) U, V
S(U)
LIN
(5) IN
(UL)
COM
(6) N.C
(19) N
(20) N
U
(7) V
(8) V
B(V)
VCC
HIN
VB
CC(V)
V
(9) IN
HO
VS
LO
(VH)
(21) V, V
S(V)
(10) IN
LIN
COM
VTS
(VL)
(11) V
TS
(12) V
B(W)
(13) V
VCC
HIN
VB
HO
VS
LO
(22) N
W
CC(W)
(14) IN
(WH)
(23) W, V
S(W)
LIN
(15) IN
(WL)
COM
(16) N.C
4. Source Terminal of Each Low−Side MOSFET is Not Connected to Supply Ground or Bias Voltage Ground Inside Motion
SPM 5 product. External Connections Should be Made as Indicated in Figure 3.
Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)
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4
FSB50760BSF / FSB50760BSFS
ELECTRICAL CHARACTERISTICS (T = 25°C, V = V = 15 V Unless Otherwise Specified)
J
DD
BS
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
INVERTER PART (Each MOSFET Unless Otherwise Specified)
BV
Drain−Source Breakdown Voltage
Zero Gate Voltage Drain Current
Static Drain−Source On−Resistance
Drain−Source Diode Forward Voltage
Switching Times
V
V
V
V
V
= 0 V, I = 1 mA ( Note 5)
600
−
−
−
−
1
V
mA
W
DSS
IN
D
I
= 0 V, V = 600 V
DS
DSS
IN
R
= V = 15 V, V = 5 V, I = 2 A
−
0.59
−
0.83
1.2
DS(on)
DD
DD
BS
IN
D
V
t
= V = 15 V, V = 0 V, I = −2 A
−
V
SD
BS
IN
D
= 300 V, V = V = 15 V, I = 2 A
−
−
980
−
−
ns
ns
PN
DD
BS
D
ON
ON / OFF R = 1.5 KW / 200 W
G
t
1280
OFF
V
IN
= 0 V ↔ 5 V, Inductive Load L= 3 mH
High− and Low−Side MOSFET Switching
t
−
−
−
200
110
13
−
−
−
ns
mJ
mJ
rr
(Note 6)
E
ON
E
OFF
RBSOA
Reverse−Bias Safe Operating Area
V
V
= 400 V, V = V = 15 V, I = I ,
DP
Full Square
PN
DS
DD
BS
D
= BV
, T = 150°C
DSS
J
High− and Low−Side MOSFET Switching (Note 7)
CONTROL PART (Each HVIC Unless Otherwise Specified)
I
Quiescent V Current
V
= 15 V, V = 0 V
Applied Between V
and COM
−
−
−
−
200
100
mA
mA
QDD
DD
DD
IN
DD
I
Quiescent V Current
V
BS
= 15 V, V = 0 V
Applied Between
QBS
PDD
BS
IN
V
V
−U, V
B(W)
−V,
B(V)
B(U)
−W
I
Operating V Supply
V
V
− COM
V
PWM
= 15 V,
−
−
−
−
900
800
mA
mA
DD
DD
DD
f
= 20 kHz,
Duty = 50%, Applied to
One PWM Signal Input
for Low−Side
I
Operating V Supply Current
V
, V
V
PWM
= V = 15 V,
PBS
BS
B(U)− S(U) B(V)
− V
DD BS
, V
− V
f
= 20 kHz,
S(V) B(W)
S(W)
Duty = 50%, Applied to
One PWM Signal Input
for High−Side
UV
UV
UV
UV
V
Low−Side Undervoltage Protection
V
DD
V
DD
V
BS
V
BS
V
DD
Undervoltage Protection Detection Level
Undervoltage Protection Reset Level
Undervoltage Protection Detection Level
Undervoltage Protection Reset Level
7.4
8.0
7.4
8.0
600
8.0
8.9
8.0
8.9
790
9.4
9.8
9.4
9.8
980
V
V
DDD
DDR
BSD
BSR
TS
(Figure 8)
High−Side Undervoltage Protection
(Figure 9)
V
V
HVIC Temperature sensing voltage
output
= 15 V, T
= 25°C (Note 8)
mV
HVIC
V
ON Threshold Voltage
OFF Threshold Voltage
Logic High Level
Logic Low Level
Applied between IN and
COM
−
−
−
2.9
V
V
IH
V
0.8
−
IL
BOOTSTRAP DIODE PART (Each Bootstrap Diode Unless Otherwise Specified)
V
Forward Voltage
I = 0.1 A, T = 25°C (Note 9)
−
−
2.5
80
−
−
V
FB
F
C
t
rrB
Reverse Recovery Time
ns
I = 0.1 A, T = 25°C
F
C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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5
FSB50760BSF / FSB50760BSFS
RECOMMENDED OPERATING CONDITION
Value
Typ.
300
15.0
15.0
−
Min.
−
Max.
400
Symbol
Parameter
Supply Voltage
Conditions
Unit
V
V
Applied between P and N
PN
DD
V
Control Supply Voltage
Applied between V and COM
13.5
13.5
3.0
0
16.5
16.5
V
DD
V
BS
High−Side Bias Voltage
Applied between V and V
S
V
B
V
IN(ON)
Input ON Threshold Voltage
Input OFF Threshold Voltage
Blanking Time for Preventing Arm−Short
PWM Switching Frequency
Applied between V and COM
V
DD
V
IN
V
−
0.6
−
V
IN(OFF)
t
V
= V = 13.5 ~ 16.5 V, T ≤ 150°C
1.0
−
−
ms
kHz
dead
DD
BS
J
f
T ≤ 150°C
J
20
−
PWM
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Built in Bootstrap Diode V −I Characteristic
F
F
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V [V]
F
T
C
= 255C
Figure 2. Built in Bootstrap Diode Characteristics (Typical)
NOTES:
5. BV
is the Absolute Maximum Voltage Rating Between Drain and Source Terminal of Each MOSFET Inside Motion SPM 5 product. V
DSS
PN
in Any
Should be Sufficiently Less Than This Value Considering the Effect of the Stray Inductance so that V Should Not Exceed BV
DS
DSS
Case.
6. t and t
Include the Propagation Delay Time of the Internal Drive IC. Listed Values are Measured at the Laboratory Test Condition, and
ON
OFF
They Can be Different According to the Field Applications Due to the Effect of Different Printed Circuit Boards and Wirings. Please see
Figure 6 for the Switching Time Definition with the Switching Test Circuit of Figure 7.
7. The peak current and voltage of each MOSFET during the switching operation should be included in the Safe Operating Area (SOA). Please
see Figure 6 for the RBSOA test circuit that is same as the switching test circuit.
8. V is only for sensing temperature of module and cannot shutdown MOSFETs automatically.
TS
9. Built in bootstrap diode includes around 15 W resistance characteristic. Please refer to Figure 2.
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6
FSB50760BSF / FSB50760BSFS
These values depend on PWM control algorithm
+15 V
Line
* Example Circuit : W phase
C
1
V
DC
P
V
HIN
0
LIN
0
Output
Note
VDD
HIN
LIN
VB
HO
VS
LO
Inverter
Output
Z
0
Both FRFET Off
Low side FRFET On
High side FRFET On
Shoot through
R
5
0
1
1
0
V
DC
C
3
COM
VTS
1
1
Forbidden
Z
C
5
R
3
N
Open Open
Same as (0,0)
C
4
One Leg Diagram of SPM
C
2
10 mF
*Example of Bootstrap Paramt:ers
C
1
= C = 1 mF Ceramic Capacitor
2
10.Parameters for bootstrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of
parameters is shown above.
11. RC coupling (R and C ) and C at each input of Motion SPM and Micom (Indicated as Dotted Lines) may be used to prevent improper
5
5
4
signal due to surge noise.
12.Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge voltage.
Bypass capacitors such as C , C and C should have good high frequency characteristics to absorb high−frequency ripple current.
1
2
3
Figure 3. Recommended MCU Interface and Bootstrap Circuit with Parameters
13.Attach the thermocouple on top of the heatsink−side of SPM (between SPM 5 package and heatsink if applied) to get the correct
temperature measurement.
Figure 4. Case Temperature Measurement
3.5
3.0
2.5
2.0
1.5
1.0
0.5
20
40
60
80
100
120
140
160
T
HVIC
[°C]
Figure 5. Temperature Profile of VTS (Typical)
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7
FSB50760BSF / FSB50760BSFS
V
V
V
IN
IN
I
rr
120% of I
100% of I
D
D
I
D
DS
10% of I
D
V
DS
I
D
t
t
rr
t
OFF
ON
(a) Turn−on
(b) Turn−off
Figure 6. Switching Time Definitions
C
BS
V
CC
I
D
VCC
HIN
VB
HO
VS
LO
L
V
DC
LIN
+
COM
V
DS
−
V
TS
One Leg Diagram of SPM
Figure 7. Switching and RBSOA (Single−Pulse) Test Circuit (Low−side)
Input Signal
UV Protection
RESET
DETECTION
RESET
Status
UV
CCR
Low−side Supply, V
CC
UV
CCD
MOSFET Current
Figure 8. Under−Voltage Protection (Low−Side)
Input Signal
UV Protection
Status
RESET
DETECTION
RESET
UV
BSR
High−side Supply, V
BS
UV
BSD
MOSFET Current
Figure 9. Under−Voltage Protection (High−Side)
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8
FSB50760BSF / FSB50760BSFS
C
1
(1) COM
(2) V
(17) P
B(U)
(3) V
DD(U)
VDD
HIN
VB
HO
VS
LO
R
(4) IN
5
(UH)
(UL)
(18) U, V
S(U)
(5) IN
LIN
C
V
DC
3
COM
C
C
2
5
(6) N.C
(19) N
U
(7) V
(8) V
B(V)
(20) N
(21) V, V
DD(V)
V
VDD
HIN
VB
HO
VS
LO
(9) IN
(VH)
S(V)
(10) IN
(VL)
M
LIN
COM
(11) V
TS
V
TS
(12) V
(13) V
B(W)
(22) N
W
DD(W)
VDD
HIN
VB
HO
VS
LO
(14) IN
(15) IN
(WH)
(WL)
(23) W, V
S(W)
LIN
COM
(16) N.C
C
4
R
For current−sensing and protection
4
15 V
Supply
C
R
3
6
14.About pin position, refer to Figure 1.
15.RC coupling (R and C , R and C ) and C at each input of Motion SPM 5 product and Micom are useful to prevent improper input
5
5
4
6
4
signal caused by surge noise.
16.The voltage drop across R affects the low side switching performance and the bootstrap characteristics since it is placed between
3
COM and the source terminal of the low side MOSFET. For this reason, the voltage drop across R should be less than 1 V in the
3
steady−state.
17.Ground wires and output terminals, should be thick and short in order to avoid surge voltage and malfunction of HVIC.
18.All the filter capacitors should be connected close to Motion SPM 5 product, and they should have good characteristics for rejecting
high−frequency ripple current.
Figure 10. Example of Application Circuit
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9
FSB50760BSF / FSB50760BSFS
PACKAGE DIMENSIONS
SPM5E−023 / 23LD, PDD STD, FULL PACK, DIP TYPE
CASE MODEJ
ISSUE O
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10
FSB50760BSF / FSB50760BSFS
SPM5H−023 / 23LD, PDD STD, SPM23−BD (Ver1.5) SMD TYPE
CASE MODEM
ISSUE O
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11
FSB50760BSF / FSB50760BSFS
SPM and SUPERFET are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United
States and/or other countries.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
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