FSBB30CH60DF [ONSEMI]
Motion SPM® 3 系列;型号: | FSBB30CH60DF |
厂家: | ONSEMI |
描述: | Motion SPM® 3 系列 |
文件: | 总15页 (文件大小:983K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
September 2015
FSBB30CH60DF
®
Motion SPM 3 Series
Features
• UL Certified No. E209204 (UL1557)
General Description
FSBB30CH60DF is an advanced Motion SPM®
3
module providing a fully-featured, high-performance
inverter output stage for AC Induction, BLDC, and
PMSM motors. These modules integrate optimized gate
drive of the built-in IGBTs to minimize EMI and losses,
while also providing multiple on-module protection
features including under-voltage lockouts, over-current
shutdown, thermal monitoring of drive IC, and fault
reporting. The built-in, high-speed HVIC requires only a
single supply voltage and translates the incoming logic-
level gate inputs to the high-voltage, high-current drive
signals required to properly drive the module's internal
IGBTs. Separate negative IGBT terminals are available
for each phase to support the widest variety of control
algorithms.
• 600 V - 30 A 3-Phase IGBT Inverter with Integral Gate
Drivers and Protection
• Low-Loss, Short-Circuit Rated IGBTs
• Very Low Thermal Resistance Using Al2O3 DBC
Substrate
• Built-In Bootstrap Diodes and Dedicated Vs Pins
Simplify PCB Layout
• Separate Open-Emitter Pins from Low-Side IGBTs for
Three-Phase Current Sensing
• Single-Grounded Power Supply
• LVIC Temperature-Sensing Built-In for Temperature
Monitoring
• Isolation Rating: 2500 Vrms / 1 min.
Applications
• Motion Control - Home Appliance / Industrial Motor
Related Resources
• AN-9085 - Motion SPM® 3 Ver.5 Series Users Guide
• AN-9086 - SPM 3 Package Mounting Guide
• AN-9087 - Motion SPM® 3 Ver.5 Series Thermal
Performance Information
Figure 1. 3D Package Drawing
(Click to Activate 3D Content)
Package Marking and Ordering Information
Device
Device Marking
Package
Packing Type
Quantity
FSBB30CH60DF
FSBB30CH60DF
SPMPA-027
Rail
10
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
1
www.fairchildsemi.com
Integrated Power Functions
•
600 V - 30 A IGBT inverter for three-phase DC / AC power conversion (Please refer to Figure 3)
Integrated Drive, Protection and System Control Functions
•
For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting
control circuit Under-Voltage Lock-Out Protection (UVLO)
Note: Available bootstrap circuit example is given in Figures 5 and 15.
•
For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP)
control supply circuit Under-Voltage Lock-Out Protection (UVLO)
•
•
Fault signaling: corresponding to UVLO (low-side supply) and SC faults
Input interface: active-HIGH interface, works with 3.3 / 5 V logic, Schmitt-trigger input
Pin Configuration
Figure 2. Top View
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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Pin Descriptions
Pin Number
Pin Name
Pin Description
Low-Side Common Bias Voltage for IC and IGBTs Driving
Common Supply Ground
1
VCC(L)
COM
IN(UL)
IN(VL)
IN(WL)
VFO
2
3
Signal Input for Low-Side U-Phase
4
Signal Input for Low-Side V-Phase
5
Signal Input for Low-Side W-Phase
6
Fault Output
7
VTS
Output for LVIC Temperature Sensing Voltage Output
Capacitor (Low-Pass Filter) for Short-Circuit Current Detection Input
Signal Input for High-Side U-Phase
8
CSC
9
IN(UH)
VCC(H)
VB(U)
VS(U)
IN(VH)
VCC(H)
VB(V)
VS(V)
IN(WH)
VCC(H)
VB(W)
VS(W)
NU
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
High-Side Common Bias Voltage for IC and IGBTs Driving
High-Side Bias Voltage for U-Phase IGBT Driving
High-Side Bias Voltage Ground for U-Phase IGBT Driving
Signal Input for High-Side V-Phase
High-Side Common Bias Voltage for IC and IGBTs Driving
High-Side Bias Voltage for V-Phase IGBT Driving
High-Side Bias Voltage Ground for V Phase IGBT Driving
Signal Input for High-Side W-Phase
High-Side Common Bias Voltage for IC and IGBTs Driving
High-Side Bias Voltage for W-Phase IGBT Driving
High-Side Bias Voltage Ground for W-Phase IGBT Driving
Negative DC-Link Input for U-Phase
NV
Negative DC-Link Input for V-Phase
NW
Negative DC-Link Input for W-Phase
U
Output for U-Phase
V
Output for V-Phase
W
Output for W-Phase
P
Positive DC-Link Input
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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Internal Equivalent Circuit and Input/Output Pins
P (27)
W (26)
(19) V
B( W )
VB
(18) V
CC (H)
VCC
COM
OUT
(17) IN(WH
)
VS
IN
(20) V
S( W )
(15) V
B( V)
VB
(14) V
CC (H)
VCC
COM
IN
OUT
VS
(13) IN VH)
(
V (25)
(16) VS(V)
(11) V
B( U)
VB
(10) V
CC (H)
VCC
OUT
VS
COM
(9) IN
(UH)
U (24)
IN
(12) V
S ( U)
(8) CSC
OUT
OUT
CSC
VTS
VFO
(7) V
T S
NW (23)
NV (22)
NU (21)
(6) V
F O
(5) IN(WL )
IN
IN
IN
(4) IN(VL)
(3) IN(UL )
(2) COM
COM
VCC
OUT
(1) V
CC( L)
Figure 3. Internal Block Diagram
Notes:
1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection functions.
2. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals.
3. Inverter high-side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT.
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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Absolute Maximum Ratings (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Symbol
VPN
Parameter
Conditions
Applied between P - NU, NV, NW
Applied between P - NU, NV, NW
Rating
450
Unit
Supply Voltage
V
V
V
A
A
VPN(Surge)
VCES
Supply Voltage (Surge)
500
Collector - Emitter Voltage
Each IGBT Collector Current
Each IGBT Collector Current (Peak)
600
± IC
TC = 25°C, TJ 150°C (Note 4)
30
± ICP
TC = 25°C, TJ 150°C, Under 1 ms Pulse
60
Width (Note 4)
PC
TJ
Collector Dissipation
TC = 25°C per One Chip (Note 4)
113
W
Operating Junction Temperature
-40 ~ 150
°C
Control Part
Symbol
VCC
Parameter
Control Supply Voltage
Conditions
Rating
20
Unit
Applied between VCC(H), VCC(L) - COM
V
V
VBS
High-Side Control Bias Voltage
Applied between VB(U) - VS(U), VB(V) - VS(V)
,
,
20
V
B(W) - VS(W)
VIN
Input Signal Voltage
Applied between IN(UH)
,
IN(VH)
,
IN(WH)
-0.3 ~ VCC+0.3
V
IN(UL), IN(VL), IN(WL) - COM
Applied between VFO - COM
Sink Current at VFO pin
VFO
IFO
Fault Output Supply Voltage
Fault Output Current
-0.3 ~ VCC+0.3
2
V
mA
V
VSC
Current Sensing Input Voltage
Applied between CSC - COM
-0.3 ~ VCC+0.3
Bootstrap Diode Part
Symbol
Parameter
Conditions
Rating
600
Unit
VRRM
IF
Maximum Repetitive Reverse Voltage
Forward Current
V
A
A
TC = 25°C, TJ 150°C (Note 4)
0.5
IFP
Forward Current (Peak)
TC = 25°C, TJ 150°C, Under 1 ms Pulse
2.0
Width (Note 4)
TJ
Operating Junction Temperature
-40 ~ 150
°C
Total System
Symbol
Parameter
Conditions
Rating
Unit
VPN(PROT) Self Protection Supply Voltage Limit
(Short Circuit Protection Capability)
VCC = VBS = 13.5 ~ 16.5 V, TJ = 150°C,
Non-repetitive, < 2 s
400
V
TC
Module Case Operation Temperature
Storage Temperature
See Figure 2
-40 ~ 125
-40 ~ 125
2500
°C
°C
TSTG
VISO
Isolation Voltage
60 Hz, Sinusoidal, AC 1 minute, Connection
Pins to Heat Sink Plate
Vrms
Thermal Resistance
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
Rth(j-c)Q
Rth(j-c)F
Junction to Case Thermal Resistance
(Note 5)
Inverter IGBT part (per 1 / 6 module)
Inverter FWD part (per 1 / 6 module)
-
-
-
-
1.10
2.10
°C / W
°C / W
Note:
4. These values had been made an acquisition by the calculation considered to design factor.
5. For the measurement point of case temperature (T ), please refer to Figure 2.
C
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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Electrical Characteristics (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
VCE(SAT)
Collector - Emitter Saturation VCC = VBS = 15 V
IC = 30 A, TJ = 25°C
-
1.50
2.10
V
Voltage
V
IN = 5 V
VF
FWDi Forward Voltage
Switching Times
VIN = 0 V
IF = 30 A, TJ = 25°C
-
1.80
0.90
0.25
0.90
0.10
0.10
0.80
0.25
0.90
0.15
0.10
-
2.40
1.40
0.55
1.40
0.40
-
V
s
s
s
s
s
s
s
s
s
s
mA
HS
tON
tC(ON)
tOFF
tC(OFF)
trr
VPN = 300 V, VCC = 15 V, IC = 30 A
TJ = 25°C
0.50
-
V
IN = 0 V 5 V, Inductive Load
-
See Figure 5
(Note 6)
-
-
LS
tON
VPN = 300 V, VCC = 15 V, IC = 30 A
TJ = 25°C
0.40
1.30
0.55
1.40
0.45
-
tC(ON)
tOFF
tC(OFF)
trr
-
-
-
-
-
V
IN = 0 V 5 V, Inductive Load
See Figure 5
(Note 6)
ICES
Collector - Emitter Leakage VCE = VCES
Current
5
Note:
6.
t
and t
include the propagation delay time of the internal drive IC. t
and t
are the switching time of IGBT itself under the given gate driving condition internally.
C(OFF)
ON
OFF
C(ON)
For the detailed information, please see Figure 4.
100% IC 100% IC
trr
VCE
IC
IC
VCE
VIN
VIN
tON
tOFF
tC(ON)
tC(OFF)
10% IC
VIN(ON)
VIN(OFF)
10% VCE
10% IC
90% IC 10% VCE
(b) turn-off
(a) turn-on
Figure 4. Switching Time Definition
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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One-Leg Diagram of SPM 3
IC
P
CBS
VCC(H)
VB
COM(H) OUT(H)
LSSwitching
IN(H)
IN (L )
VS
VPN
HS Switching
U,V,W
V
Inductor
300V
LS Switching
VCC(L)
VFO
VIN
HS Switching
OUT(L)
5V
0V
TSU
VCC
4.7kΩ
CSC
V
COM(L)
NU,V,W
+15V
V
+5V
Figure 5. Example Circuit for Switching Test
Figure 6. Switching Loss Characteristics
Figure 7. Temperature Profile of V (Typical)
TS
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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Bootstrap Diode Part
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
VF
trr
Forward Voltage
IF = 0.1 A, TJ = 25°C
-
-
2.5
80
-
-
V
Reverse Recovery Time
IF = 0.1 A, dIF / dt = 50 A / s, TJ = 25°C
ns
Control Part
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
IQCCH
Quiescent VCC Supply
Current
VCC(H) = 15 V,
IN(UH,VH,WH) = 0 V
VCC(H) - COM
-
-
-
-
-
-
0.50
6.00
0.50
mA
mA
mA
IQCCL
IPCCH
VCC(L) = 15 V,
IN(UL,VL, WL) = 0 V
VCC(L) - COM
V
CC(H) = 15 V, fPWM = 20 kHz, VCC(H) - COM
duty = 50%, applied to one
PWM signal input for High-
Side
Operating VCC Supply
Current
IPCCL
VCC(L) = 15V, fPWM = 20 kHz,
duty = 50%, applied to one
PWM signal input for Low-
Side
VCC(L) - COM
-
-
10.0
mA
IQBS
Quiescent VBS Supply
Current
VBS = 15 V,
IN(UH, VH, WH) = 0 V
VB(U) - VS(U)
,
-
-
-
-
0.30
4.50
mA
mA
VB(V) - VS(V)
,
VB(W) - VS(W)
IPBS
Operating VBS Supply
Current
VCC = VBS = 15 V,
fPWM = 20 kHz, duty = 50%, VB(V) - VS(V)
VB(U) - VS(U),
,
applied to one PWM signal VB(W) - VS(W)
input for High-Side
VFOH
VFOL
Fault Output Voltage
VCC = 15 V, VSC = 0 V, VFO Circuit: 4.7 k to 5 V
Pull-up
4.5
-
-
-
-
V
V
VCC = 15 V, VSC = 1 V, VFO Circuit: 4.7 k to 5 V
0.5
Pull-up
VSC(ref)
UVCCD
UVCCR
UVBSD
UVBSR
tFOD
Short Circuit Trip Level VCC = 15 V (Note 7)
Supply Circuit Under- Detection Level
CSC - COM(L)
0.45
9.8
0.50
0.55
13.3
13.8
12.5
13.0
-
V
V
-
Voltage Protection
Reset Level
10.3
9.0
-
V
Detection Level
Reset Level
-
V
9.5
-
-
V
Fault-Out Pulse Width
50
s
mV
VTS
LVIC Temperature
VCC(L) = 15 V, TLVIC = 25°C (Note 8)
880
980
1080
Sensing Voltage Output See Figure 7
VIN(ON)
VIN(OFF)
Note:
ON Threshold Voltage
OFF Threshold Voltage
Applied between IN(UH, VH, WH) - COM,
IN(UL, VL, WL) - COM
-
-
-
2.6
-
V
V
0.8
7. Short-circuit current protection is functioning only at the low-sides.
8. T is the temperature of LVIC itself. V is only for sensing temperature of LVIC and can not shutdown IGBTs automatically.
LVIC
TS
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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Recommended Operating Conditions
Value
Symbol
Parameter
Conditions
Unit
Min. Typ. Max.
VPN
VCC
Supply Voltage
Applied between P - NU, NV, NW
-
300
15
400
V
V
Control Supply Voltage
Applied between VCC(UH, VH, WH) - COM, VCC(L)
COM
-
-
14.0
16.5
VBS
High-Side Bias Voltage
Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W)
VS(W)
13.0
- 1
15
-
18.5
V
V / s
s
dVCC / dt, Control Supply
dVBS / dt Variation
1
-
tdead
Blanking Time for
For Each Input Signal
1.0
-
Preventing Arm - Short
fPWM
VSEN
PWM Input Signal
-40C TC 125°C, -40C TJ 150°C
-
-
20
5
kHz
V
Voltage for Current
Sensing
Applied between NU, NV, NW - COM
(Including Surge Voltage)
- 5
PWIN(ON) Minimun Input Pulse
VCC = VBS = 15 V, IC 60 A, Wiring Inductance
between NU, V, W and DC Link N < 10nH (Note 9)
2.0
2.0
-
-
-
-
-
s
C
Width
PWIN(OFF)
TJ
Junction Temperature
- 40
150
Note:
9. This product might not make response if input pulse width is less than the recommanded value.
Figure 8. Allowable Maximum Output Current
Note:
10. This allowable output current value is the reference data for the safe operation of this product. This may be different from the actual application and operating condition.
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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Mechanical Characteristics and Ratings
Limits
Parameter
Conditions
Unit
Min.
0
Typ.
Max.
Device Flatness
See Figure 9
-
0.7
7.1
-
+150
m
N • m
kg • cm
s
Mounting Torque
Mounting Screw: M3
See Figure 10
Load 19.6 N
Recommended 0.7 N • m
Recommended 7.1 kg • cm
0.6
6.2
10
2
0.8
8.1
Terminal Pulling Strength
-
-
-
Terminal Bending Strength Load 9.8 N, 90 deg. bend
Weight
-
times
g
-
15
( + )
( + )
Figure 9. Flatness Measurement Position
Pre - Screwing : 1
Final Screwing : 2
2
1
2
1
Figure 10. Mounting Screws Torque Order
Note:
11. Do not make over torque when mounting screws. Much mounting torque may cause DBC cracks, as well as bolts and Al heat-sink destruction.
12. Avoid one-sided tightening stress. Figure 10 shows the recommended torque order for mounting screws. Uneven mounting can cause the DBC substrate of package to be
damaged. The pre-screwing torque is set to 20 ~ 30% of maximum torque rating.
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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Time Charts of SPMs Protective Function
Input Signal
Protection
RESET
SET
RESET
Circuit State
UVCCR
a1
a6
Control
Supply Voltage
UVCCD
a2
a3
a4
a7
Output Current
a5
Fault Output Signal
Figure 11. Under-Voltage Protection (Low-Side)
a1 : Control supply voltage rises: After the voltage rises UVCCR, the circuits start to operate when next input is applied.
a2 : Normal operation: IGBT ON and carrying current.
a3 : Under voltage detection (UVCCD).
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts with a fixed pulse width.
a6 : Under voltage reset (UVCCR).
a7 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
Input Signal
Protection
RESET
SET
RESET
Circuit State
UVBSR
b5
b1
Control
Supply Voltage
UVBSD
b2
b3
b4
b6
Output Current
High-level (no fault output)
Fault Output Signal
Figure 12. Under-Voltage Protection (High-Side)
b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under voltage detection (UVBSD).
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under voltage reset (UVBSR).
b6 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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Lower arms
control input
c6
c7
Protection
Circuit state
SET
RESET
Internal IGBT
Gate-Emitter Voltage
c4
c3
c2
Internal delay
at protection circuit
SC current trip level
c8
c1
Output Current
SC Reference Voltage
Sensing Voltage
of sense resistor
RC Filter circuit
time constant
delay
Fault Output Signal
c5
Figure 13. Short-Circuit Current Protection (Low-Side Operation only)
(with the external sense resistance and RC filter connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short circuit current detection (SC trigger).
c3 : All low-side IGBT’s gate are hard interrupted.
c4 : All low-side IGBTs turn OFF.
c5 : Fault output operation starts with a fixed pulse width.
c6 : Input HIGH: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.
c7 : Fault output operation finishes, but IGBT doesn’t turn on until triggering next signal from LOW to HIGH.
c8 : Normal operation: IGBT ON and carrying current.
Input/Output Interface Circuit
+5V (MCU or Control power)
4.7 kΩ
SPM
,
,
IN(UH) IN(VH) IN(WH)
,
,
IN(UL) IN(VL) IN(WL)
MCU
VFO
COM
Figure 14. Recommended CPU I/O Interface Circuit
Note:
13. RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s printed circuit board.
The input signal section of the Motion SPM 3 product integrates 5 k(typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the
signal voltage drop at input terminal.
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
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P (27)
R1
(17) IN( WH)
(18) VCC(H)
Gating WH
IN
VCC
COM
OUT
VS
C4
(19) VB( W)
(20) VS( W)
W (26)
C3 C4
VB
D2
D2
D2
R1
(13) IN
( VH)
IN
Gating VH
Gating UH
(14) VCC(H)
VCC
COM
OUT
VS
C4
(15) VB( V)
(16) VS(V)
C3 C4
V (25)
VB
M
R1
(9) IN
( UH)
IN
VCC
M
C
U
(10) VCC(H)
C7
VDC
C4
OUT
VS
C1 C1 C1
COM
VB
(11) VB(U)
(12) VS(U)
C3 C4
U (24)
5V line
R3
VTS
R6
D
C6
C5
(8) CSC
(7) VTS
B
OUT
OUT
OUT
C
CSC
VTS
R4
A
NW (23)
R1
R1
(6) VFO
VFO
Fault
(5) IN(WL )
(4) IN(VL)
(3) IN(UL )
Gating WL
Gating VL
Gating UL
IN
IN
IN
R1
R1
R4
NV (22)
E
Power
(2) COM
(1) VCC(L)
15V line
C2
C1
COM
VCC
C1
C1 C1 C1
GND Line
R4
NU (21)
C4
D2
R5
R5
R5
Control
GND Line
W-Phase Current
V-Phase Current
U-Phase Current
Input Signal for
Short-Circuit Protection
C5
C5
C5
Figure 15. Typical Application Circuit
Note:
14. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2 - 3 cm)
15. V output is open-drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes I up to 2 mA. Please
FO
FO
refer to Figure 14.
16. Input signal is active-HIGH type. There is a 5 k resistor inside the IC to pull-down each input signal line to GND. RC coupling circuits should be adopted for the prevention
of input signal oscillation. R C time constant should be selected in the range 50 ~ 150 ns. (Recommended R = 100 Ω, C = 1 nF)
1
1
1
1
17. Each wiring pattern inductance of A point should be minimized (Recommend less than 10nH). Use the shunt resistor R of surface mounted (SMD) type to reduce wiring
4
inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor R as close as possible.
4
18. To prevent errors of the protection function, the wiring of B, C, and D point should be as short as possible.
19. In the short-circuit protection circuit, please select the R C time constant in the range 1.5 ~ 2 s. Do enough evaluaiton on the real system because short-circuit protection
6
6
time may vary wiring pattern layout and value of the R C time constant.
6
6
®
20. Each capacitor should be mounted as close to the pins of the Motion SPM 3 product as possible.
21. To prevent surge destruction, the wiring between the smoothing capacitor C and the P & GND pins should be as short as possible. The use of a high-frequency non-inductive
7
capacitor of around 0.1 ~ 0.22 F between the P & GND pins is recommended.
22. Relays are used at almost every systems of electrical equipments at industrial application. In these cases, there should be sufficient distance between the CPU and the
relays.
23. The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals
(Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15Ω).
24. C of around 7 times larger than bootstrap capacitor C is recommended.
2
3
25. Please choose the electrolytic capacitor with good temperature characteristic in C . Also, choose 0.1 ~ 0.2 F R-category ceramic capacitors with good temperature and
3
frequency characteristics in C .
4
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
13
www.fairchildsemi.com
Detailed Package Outline Drawings (FSBB30CH60DF)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide therm and conditions,
specifically the the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MO/MOD27BA.pdf
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
14
www.fairchildsemi.com
©2015 Fairchild Semiconductor Corporation
FSBB30CH60DF Rev. 1.0
15
www.fairchildsemi.com
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