FSGM0765RUDTU [ONSEMI]
650V 集成电源开关,带异常 OCP,用于 70W 离线反激转换器;型号: | FSGM0765RUDTU |
厂家: | ONSEMI |
描述: | 650V 集成电源开关,带异常 OCP,用于 70W 离线反激转换器 局域网 开关 电源开关 转换器 |
文件: | 总18页 (文件大小:762K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FSGM0765R
Green-Mode Power Switch
Description
The FSGM0765R is an integrated Pulse Width Modulation (PWM)
®
controller and SENSEFET specifically designed for offline
Switch−Mode Power Supplies (SMPS) with minimal external
components. The PWM controller includes an integrated
fixed−frequency oscillator, Under−Voltage Lockout (UVLO),
Leading−Edge Blanking (LEB), optimized gate driver, internal
soft−start, temperature−compensated precise current sources for loop
compensation, and self−protection circuitry. Compared with a discrete
MOSFET and PWM controller solution, the FSGM series can reduce
total cost, component count, size, and weight; while simultaneously
increasing efficiency, productivity, and system reliability. This device
provides a basic platform suited for cost−effective design of a flyback
converter.
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TO−220−6LD LF
CASE 340BN
Features
• Soft Burst−Mode Operation for Low Standby Power Consumption
and Low Noise
• Precision Fixed Operating Frequency: 66 kHz
• Pulse−by−Pulse Current Limit
TO−220−6LD LF
CASE 340BG
• Various Protection Functions: Overload Protection (OLP),
Over−Voltage Protection (OVP), Abnormal Over−Current Protection
(AOCP), Internal Thermal Shutdown (TSD) with Hysteresis,
Output−Short Protection (OSP), and Under−Voltage Lockout
(UVLO) with Hysteresis
• Auto−Restart Mode
• Internal Startup Circuit
• Internal High−Voltage SENSEFET: 650 V
• Built−in Soft−Start: 15 ms
• These are Pb−Free Devices
TO−220 FULLPAK 6LD LF
CASE 340BP
MARKING DIAGRAM
Applications
• Power Supply for LCD TV and Monitor, STB and DVD
$Y&Z&3&K
GM0765R
$Y&Z&3&K
GM0765R
Combination
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= 3−Digit Date Code Format
= 2−Digit Lot Run Tracebility Code
GM0765R = Specific Device Code Data
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
July, 2019 − Rev. 2
FSGM0765R/D
FSGM0765R
ORDERING INFORMATION
Output Power Table (Note 2)
85 − 265 V
230V ꢀ 15% (Note 3)
AC
AC
Operating
Junction
Temperature
Adapter
(Note 4)
Open Frame
Adapter
Open Frame
Replaces
Device
(Note 5)
(Note 4)
(Note 5)
Current Limit
R
(Max.)
DS(ON)
Part Number
Package
Shipping
TO−220F
6−Lead
−40°C ~
+125°C
2.60 A
2.6 W
80 W
80 W
80 W
90 W
90 W
90 W
48 W
48 W
48 W
70 W
70 W
70 W
FSDM07652RE 400 / Tube
FSDM07652RE 400 / Tube
FSDM07652RE 400 / Tube
FSGM0765RWDTU
(Note 1)
W−Forming
TO−220F
6−Lead
(Note 1)
U−Forming
−40°C ~
+125°C
2.60 A
2.60 A
2.6 W
2.6 W
FSGM0765RUDTU
FSGM0765RLDTU
TO−220F
6−Lead
(Note 1)
L−Forming
−40°C ~
+125°C
1. Pb−free package per JEDEC J−STD−020B.
2. The junction temperature can limit the maximum output power.
3. 230 V or 100 / 115 V with voltage doubler.
AC
AC
4. Typical continuous power in a non−ventilated enclosed adapter measured at 50°C ambient temperature.
5. Maximum practical continuous power in an open−frame design at 50°C ambient temperature.
Application Circuit
VO
AC
IN
VSTR
Drain
PWM
GND
VCC
FB
Figure 1. Typical Application Circuit
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2
FSGM0765R
Internal Block Diagram
N.C.
V
STR
V
CC
Drain
6
3
5
1
ICH
V
ref
V
burst
VCC good
7.5V / 12V
0.5 V / 0.6 V
Soft Burst
Soft Start
V
V
ref
CC
OSC
IDELAY
IFB
S
Q
Q
PWM
Gate
Driver
FB
4
R
3R
LEB (300 ns)
R
t
< t
OSP
(1.2 ms)
ON
LPF
2
GND
V
AOCP
V
OSP
S
R
Q
TSD
V
6SVD
VCC good
Q
V
CC
V
OVP
24.5 V
Figure 2. Internal Block Diagram
Pin Configuration
6. V
STR
5. N.C.
4. FB
3. VCC
2. GND
1. Drain
Figure 3. Pin Configuration (Top View)
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3
FSGM0765R
PIN DEFINITIONS
Pin No.
Name
Drain
GND
Description
1
2
3
SENSEFET Drain. High−voltage power SENSEFET drain connection.
Ground. This pin is the control ground and the SENSEFET source.
V
CC
Power Supply. This pin is the positive supply input, which provides the internal operating current for both startup and
steady−state operation.
4
FB
Feedback. This pin is internally connected to the inverting input of the PWM comparator. The collector of an
opto−coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and
GND. If the voltage of this pin reaches 6 V, the overload protection triggers, which shuts down the power switch.
5
6
N.C.
No Connection.
V
STR
Startup. This pin is connected directly, or through a resistor, to the high−voltage DC link. At startup, the internal
high−voltage current source supplies internal bias and charges the external capacitor connected to the V pin.
CC
Once V reaches 12 V, the internal current source (I ) is disabled.
CC
CH
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
−
Max
650
650
26
Unit
V
V
STR
V
STR
Pin Voltage
V
Drain Pin Voltage
Pin Voltage
−
V
DS
V
CC
V
−
V
CC
V
Feedback Pin Voltage
Drain Current Pulsed
−0.3
−
12.0
12.8
6.4
V
FB
I
A
DM
I
Continuous Switching Drain Current (Note 6)
T
T
= +25°C
−
A
DS
C
= +100°C
−
4.0
A
C
E
Single Pulsed Avalanche Energy (Note 7)
−
390
45
mJ
W
°C
°C
°C
V
AS
P
Total Power Dissipation (T = +25°C) (Note 8)
−
D
C
T
Maximum Junction Temperature
Operating Junction Temperature (Note 9)
Storage Temperature
−
+150
+125
+150
−
J
−40
−55
2.5
2
T
STG
V
ISO
Minimum Isolation Voltage (Note 10)
Electrostatic Discharge Capability
ESD
Human Body Model, JESD22−A114
Charged Device Model, JESD22−C101
−
kV
2
−
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
6. Repetitive peak switching current when the inductive load is assumed: Limited by maximum duty (D
= 0.75) and junction temperature
MAX
(see Figure 4).
7. L = 70 mH, starting T = +25°C.
J
8. Infinite cooling condition (refer to the SEMI G30−88).
9. Although this parameter guarantees IC operation, it does not guarantee all electrical characteristics.
10.The voltage between the package back side and the lead is guaranteed.
IDS
DMAX
fSW
Figure 4. Repetitive Peak Switching Current
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FSGM0765R
THERMAL CHARACTERISTICS
Symbol
Characteristic
Value
62.5
3
Unit
°C/W
°C/W
q
Junction−to−Ambient Thermal Impedance (Note 11)
Junction−to−Case Thermal Impedance (Note 12)
JA
q
JC
11. Infinite cooling condition (refer to the SEMI G30−88).
12.Free standing with no heat−sink under natural convection.
ELECTRICAL CHARACTERISTICS (T = +25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
SENSEFET SECTION
−
−
−
BV
Drain−Source Breakdown Voltage
Zero−Gate−Voltage Drain Current
Drain−Source On−State Resistance
Input Capacitance (Note 13)
Output Capacitance (Note 13)
Rise Time
V
CC
V
DS
V
GS
V
DS
V
DS
V
DS
V
DS
V
DS
V
DS
= 0 V, I = 250 mA
650
V
DSS
D
−
250
mA
= 520 V, T = +125°C
I
A
DSS
−
−
−
−
−
−
−
R
= 10 V, I = 1 A
1.3
674
93
1.6
W
pF
pF
ns
ns
ns
ns
DS(ON)
D
−
C
= 25 V, V = 0 V, f = 1MHz
GS
ISS
−
−
−
−
−
C
= 25 V, V = 0 V, f = 1MHz
GS
OSS
t
= 325 V, I = 4 A, R = 25 W
30
r
D
G
t
Fall Time
= 325 V, I = 4 A, R = 25 W
26
f
D
G
t
t
Turn−On Delay Time
= 325 V, I = 4 A, R = 25 W
16
d(on)
d(off)
D
G
Turn−Off Delay Time
= 325 V, I = 4 A, R = 25 W
39
D
G
CONTROL SECTION
f
Switching Frequency
V
= 14 V, V = 4 V
60
66
5
72
10
75
0
kHz
%
S
CC
FB
−
−25°C < T < +125°C
Df
Switching Frequency Variation (Note 13)
Maximum Duty Ratio
J
S
D
V
CC
V
CC
V
FB
V
FB
= 14 V, V = 4 V
65
70
%
MAX
FB
−
−
D
Minimum Duty Ratio
= 14 V, V = 0 V
%
MIN
FB
FB
I
Feedback Source Current
UVLO Threshold Voltage
= 0
160
11
210
12
260
13
8.0
mA
V
V
= 0 V, V Sweep
CC
START
V
After Turn−on, V = 0 V
7.0
7.5
V
STOP
FB
−
V
OP
V
CC
Operating Range
13
23
V
−
−
t
Internal Soft−Start Time
V
V
= 40 V, V Sweep
15
ms
S/S
STR
CC
BURST−MODE SECTION
Burst−Mode Voltage
V
= 14 V, V Sweep
0.5
0.3
−
0.6
0.4
0.7
0.5
−
V
V
BURH
CC
FB
V
BURL
Hys
PROTECTION SECTION
200
mV
I
Peak Drain Current Limit
di/dt = 300 mA/ms
2.37
5.5
2.5
−
2.60
6.0
2.83
6.5
4.1
−
A
V
LIM
V
Shutdown Feedback Voltage
Shutdown Delay Current
V
CC
V
CC
= 14 V, V Sweep
FB
SD
I
= 14 V, V = 4 V
3.3
mA
ns
V
DELAY
FB
Hys
Leading−Edge Blanking Time (Note 13, 14)
Over−Voltage Protection
300
24.5
V
V
CC
Sweep
23.0
26.0
OVP
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FSGM0765R
ELECTRICAL CHARACTERISTICS (T = +25°C unless otherwise noted) (continued)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
PROTECTION SECTION
t
Output Short
Protection (Note 13)
Threshold Time
OSP Triggered when t < t &
OSP
1.0
1.8
2.0
+130
−
1.2
2.0
1.4
2.2
3.0
+150
−
ms
V
OSP
ON
V
t
> V
(Lasts Longer than
FB
OSP_FB
OSP
)
V
Threshold V
OSP
FB
t
V
FB
Blanking Time
2.5
ms
°C
°C
OSP_FB
T
Thermal Shutdown Temperature (Note 13)
Shutdown Temperature
Hysteresis
+140
+30
SD
Hys
TOTAL DEVICE SECTION
I
Operating Supply Current, (Control Part in
Burst Mode)
V
V
= 14 V, V = 0 V
1.2
2.0
0.5
1.6
2.5
0.6
2.0
3.0
0.7
mA
mA
mA
OP
CC
FB
I
Operating Switching Current, (Control Part
and SENSEFET Part)
= 14 V, V = 4 V
FB
OPS
CC
I
Start Current
V
= 11 V (Before V Reaches
CC CC
START
V
)
START
I
Startup Charging Current
V
V
= V = 0 V, V
= 40 V
Sweep
1.00
1.15
26
1.50
mA
V
CH
CC
FB
STR
−
−
V
STR
Minimum V
Supply Voltage
= V = 0 V, V
FB
STR
CC
STR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
13.Although these parameters are guaranteed, they are not 100% tested in production.
14.t
includes gate turn−on time.
LEB
Table 1. COMPARISON OF FSDM07652RE AND FSGM0765R
Function
Burst Mode
Lightning Surge
Soft−Start
FSDM07652RE
FSGM0765R
Advanced Soft Burst
Strong
Advantages of FSGM0765R
Low noise and low standby power
Advanced Burst
Enhanced SENSEFET and controller against lightning surge
Longer soft−start time
10 ms (Built−in)
15 ms (Built−in)
Protections
OLP
OVP
TSD
OLP
OVP
Enhanced protections and high reliability
OSP
AOCP
TSD with Hysteresis
Power Balance
Long T
Very Short T
The difference of input power between the low and high input
voltage is quite small
CLD
CLD
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FSGM0765R
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
Temperature [°C]
Temperature [°C]
Figure 5. Operating Supply Current (IOP) vs. TA
Figure 6. Operating Switching Current (IOPS) vs. TA
1.40
1.30
1.20
1.10
1.00
0.90
0.80
0.70
0.60
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
Temperature [°C]
Temperature [°C]
Figure 7. Startup Charging Current (ICH) vs. TA
Figure 8. Peak Drain Current Limit (ILIM) vs. TA
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
Temperature [°C]
Temperature [°C]
Figure 9. Feedback Source Current (IFB) vs. TA
Figure 10. Shutdown Delay Current (IDELAY) vs. TA
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FSGM0765R
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
Temperature [°C]
Temperature [°C]
Figure 11. UVLO Threshold Voltage (VSTART) vs. TA
Figure 12. UVLO Threshold Voltage (VSTOP) vs. TA
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
Temperature [°C]
Temperature [°C]
Figure 13. Shutdown Feedback Voltage (VSD) vs. TA
Figure 14. Over−Voltage Protection (VOVP) vs. TA
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
−40°C −25°C
0°C
25°C
50°C
75°C
100°C 125°C
Temperature [°C]
Temperature [°C]
Figure 15. Switching Frequency (fS) vs. TA
Figure 16. Maximum Duty Ratio (DMAX) vs. TA
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FSGM0765R
FUNCTIONAL DESCRIPTION
the required output voltage. This helps prevent transformer
saturation and reduces stress on the secondary diode during
startup.
Startup
At startup, an internal high−voltage current source
supplies the internal bias and charges the external capacitor
Feedback Control
(C cc) connected to the V pin, as illustrated in Figure 17.
This device employs current−mode control, as shown in
Figure 18. An opto−coupler (such as the FOD817) and shunt
regulator (such as the KA431) are typically used to
implement the feedback network. Comparing the feedback
V
CC
When V reaches 12 V, the FSGM0765R begins switching
CC
and the internal high−voltage current source is disabled. The
FSGM0765R continues normal switching operation and the
power is supplied from the auxiliary transformer winding
voltage with the voltage across the R
resistor makes it
SENSE
unless V goes below the stop voltage of 7.5 V.
possible to control the switching duty cycle. When the
reference pin voltage of the shunt regulator exceeds the
internal reference voltage of 2.5 V, the opto−coupler LED
current increases, pulling down the feedback voltage and
reducing drain current. This typically occurs when the input
voltage is increased or the output load is decreased.
CC
VDC
CVcc
Pulse−by−Pulse Current Limit
Because current− mode control is employed, the peak
current through the SENSEFET is limited by the inverting
VCC
VSTR
3
6
input of PWM comparator (V *), as shown in Figure 18.
FB
ICH
Assuming that the 210 mA current source flows only through
the internal resistor (3R + R = 11.6 kW), the cathode voltage
of diode D2 is about 2.4 V. Since D1 is blocked when the
Vref
VCC good
7.5 V / 12 V
feedback voltage (V ) exceeds 2.4 V, the maximum
FB
Internal
Bias
voltage of the cathode of D2 is clamped at this voltage.
Therefore, the peak value of the current through the
SENSEFET is limited.
Figure 17. Startup Block
Leading−Edge Blanking (LEB)
Soft−Start
At the instant the internal SENSEFET is turned on, a
high−current spike usually occurs through the SENSEFET,
caused by primary−side capacitance and secondary−side
rectifier reverse recovery. Excessive voltage across the
RSENSE resistor leads to incorrect feedback operation in
the current mode PWM control. To counter this effect, the
FSGM0765R employs a leading−edge blanking (LEB)
circuit. This circuit inhibits the PWM comparator for tLEB
(300 ns) after the SENSEFET is turned on.
The FSGM0765R has an internal soft−start circuit that
increases PWM comparator inverting input voltage,
together with the SENSEFET current, slowly after it starts.
The typical soft−start time is 15 ms. The pulse width to the
power switching device is progressively increased to
establish the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased to smoothly establish
Drain
1
Vref
VCC
IDELAY
IFB
OSC
FB
3R
VOUT
VFB
PWM
4
Gate
Driver
D1
D2
FOD817
KA431
*
CFB
R
VFB
LEB (300 ns)
OSP
OLP
VOSP
RSENSE
GND
AOCP
V
AOCP
2
VSD
Figure 18. Pulse Width Modulation Circuit
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9
FSGM0765R
Protection Circuits
current, thus increasing the feedback voltage (V ). If V
FB
FB
The FSGM0765R has several self−protective functions,
such as Overload Protection (OLP), Abnormal
Over−Current Protection (AOCP), Output−Short Protection
(OSP), Over−Voltage Protection (OVP), and Thermal
Shutdown (TSD). All the protections are implemented as
auto−restart. Once the fault condition is detected, switching
is terminated and the SENSEFET remains off. This causes
exceeds 2.4 V, D1 is blocked and the 3.3 mA current source
starts to charge C slowly up In this condition, V
continues increasing until it reaches 6.0 V, when the
switching operation is terminated, as shown in Figure 20.
The delay time for shutdown is the time required to charge
FB
.
FB
C
FB
from 2.4 V to 6.0 V with 3.3 mA. A 25 ~ 50 ms delay is
typical for most applications. This protection is
implemented in auto−restart mode.
V
CC
to fall. When V falls to the Under−Voltage Lockout
CC
(UVLO) stop voltage of 7.5 V, the protection is reset and the
startup circuit charges the V capacitor. When V reaches
the start voltage of 12.0 V, the FSGM0765R resumes normal
operation. If the fault condition is not removed, the
VFB
CC
CC
Overload Protection
6.0 V
2.4 V
SENSEFET remains off and V drops to stop voltage
CC
again. In this manner, the auto−restart can alternately enable
and disable the switching of the power SENSEFET until the
fault condition is eliminated. Because these protection
circuits are fully integrated into the IC without external
components, the reliability is improved without increasing
cost.
t
12
= C x (6.0 − 2.4) / I
FB delay
t1
t2
t
Fault
occurs
Fault
removed
Power
on
VDS
Figure 20. Overload Protection
Abnormal Over−Current Protection (AOCP)
When the secondary rectifier diodes or the transformer
pins are shorted, a steep current with extremely high di/dt
can flow through the SENSEFET during the minimum
turn−on time. Even though the FSGM0765R has overload
protection, it is not enough to protect the FSGM0765R in
that abnormal case; since severe current stress is imposed on
the SENSEFET until OLP is triggered. The FSGM0765R
internal AOCP circuit is shown in Figure 21. When the gate
turn−on signal is applied to the power SENSEFET, the
AOCP block is enabled and monitors the current through the
sensing resistor. The voltage across the resistor is compared
with a preset AOCP level. If the sensing resistor voltage is
greater than the AOCP level, the set signal is applied to the
S−R latch, resulting in the shutdown of the SMPS.
VCC
12.0 V
7.5 V
t
Normal
operation
Fault
situation
Normal
operation
Figure 19. Auto−Restart Protection Waveforms
Overload Protection (OLP)
Drain
Overload is defined as the load current exceeding its
normal level due to an unexpected abnormal event. In this
situation, the protection circuit should trigger to protect the
SMPS. However, even when the SMPS is in normal
operation, the overload protection circuit can be triggered
during the load transition. To avoid this undesired operation,
the overload protection circuit is designed to trigger only
after a specified time to determine whether it is a transient
situation or a true overload situation. Because of the
pulse−by−pulse current limit capability, the maximum peak
current through the SENSEFET is limited and, therefore, the
maximum input power is restricted with a given input
voltage. If the output consumes more than this maximum
1
OSC
3R
PWM
Gate
Driver
*
R
VFB
LEB (300 ns)
RSENSE
VAOCP
GND
Q
Q
S
2
R
VCC good
power, the output voltage (V
voltage. This reduces the current through the opto−coupler
LED, which also reduces the opto−coupler transistor
) decreases below the set
OUT
Figure 21. Abnormal Over−Current Protection
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10
FSGM0765R
Output−Short Protection (OSP)
Thermal Shutdown (TSD)
If the output is shorted, steep current with extremely high
di/dt can flow through the SENSEFET during the minimum
turn−on time. Such a steep current brings high−voltage
stress on the drain of the SENSEFET when turned off. To
protect the device from this abnormal condition, OSP is
The SENSEFET and the control IC on a die in one
package makes it easier for the control IC to detect the over
temperature of the SENSEFET. If the temperature exceeds
~140°C, the thermal shutdown is triggered and the
FSGM0765R stops operation. The FSGM0765R operates in
auto−restart mode until the temperature decreases to around
110°C, when normal operation resumes.
included. It is comprised of detecting V and SENSEFET
FB
turn−on time. When the V is higher than 2 V and the
FB
SENSEFET turn−on time is lower than 1.2 ms, the
FSGM0765R recognizes this condition as an abnormal error
Soft Burst−Mode Operation
To minimize power dissipation in standby mode, the
FSGM0765R enters burst−mode operation. As the load
decreases, the feedback voltage decreases. As shown in
Figure 23, the device automatically enters burst mode when
and shuts down PWM switching until V reaches V
CC
START
again. An abnormal condition output short is shown in
Figure 22.
the feedback voltage drops below V
(400 mV). At this
BURL
point, switching stops and the output voltages start to drop
at a rate dependent on standby current load. This causes the
MOSFET
Drain
Current
Rectifier
Diode
Current
ILIM
V
FB
* = 0.5 V
*
feedback voltage to rise. Once it passes V
(600 mV),
ꢀ V * = 2.0 V
BURH
FB
VFB
switching resumes. At this point, the drain current peak
increases gradually. This soft burst−mode can reduce
audible noise during burst−mode operation. The feedback
voltage then falls and the process repeats. Burst−mode
operation alternately enables and disables switching of the
SENSEFET, thereby reducing switching loss in standby
mode.
ILm
0
t
1.2 ms
1.2 ms
tOFF tON
output short occurs
VOUT
IOUT
0
t
t
VO
OSP triggered
OSP
0
t
VFB
Figure 22. Output−Short Protection
Over−Voltage Protection (OVP)
0.60 V
If the secondary−side feedback circuit malfunctions or a
solder defect causes an opening in the feedback path, the
current through the opto−coupler transistor becomes almost
0.40 V
t
IDS
Soft Burst
zero. Then V climbs up in a similar manner to the overload
FB
situation, forcing the preset maximum current to be supplied
to the SMPS until the overload protection is triggered.
Because more energy than required is provided to the output,
the output voltage may exceed the rated voltage before the
overload protection is triggered, resulting in the breakdown
of the devices in the secondary side. To prevent this
t
VDS
situation, an OVP circuit is employed. In general, the V
CC
is proportional to the output voltage and the FSGM0765R
uses V instead of directly monitoring the output voltage.
t
CC
Switching
disabled
Switching
disabled
t4
If V exceeds 24.5 V, an OVP circuit is triggered, resulting
CC
t1
t2 t3
in the termination of the switching operation. To avoid
undesired activation of OVP during normal operation, V
should be designed to be below 24.5 V.
CC
Figure 23. Burst−Mode Operation
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11
FSGM0765R
TYPICAL APPLICATION CIRCUIT
Table 2. TYPICAL APPLICATION CIRCUIT
Application
Input Voltage
85 ~ 265 V
Rated Output
Rated Power
LCD TV, Monitor Power Supply
5.0 V (2.6 A)
14.0 V (3.0 A)
5 W
AC
Key Design Notes:
2. The SMD−type capacitor (C106) must be placed
1. The delay time for overload protection is designed
to be about 30 ms with C105 (27 nF). OLP time
between 25 ms (22 nF) and 50 ms (43 nF) is
recommended.
as close as possible to the V pin to avoid
CC
malfunction by abrupt pulsating noises and to
improve ESD and surge immunity. Capacitance
between 100 nF and 220 nF is recommended.
Schematic
L201
5mH
T101
EER3019
D201
MBR20150CT
14V, 3A
10
1
2
C201
820mF
25V
C202
820mF
25V
C203
820mF
25V
C207
100nF
SMD
R103
43kW
1W
C104
3.3nF
630V
R102
75kW
6, 9
D101
RGP15M
C103
120mF
400V
3
2
BD101
FSGM0765R
G3SBA60
C301
4.7nF
Y2
6
1
1
3
VSTR
3
Drain
R104
62W
0.5W
C106
220nF 47mF
SMD
C107
L202
5mH
D202
FYPF2006DN
5
4
N.C.
FB
50V
NTC101
5D−11
VCC
5V, 2.6A
4
7, 8
4
GND
D102
UF 4004
C206
1000mF
16V
C208
100nF
SMD
C204
2200mF
10V
C205
1000mF
16V
C105
27nF
100V
C102
150nF
275VAC
2
6, 9
5
ZD101
1N4749A
LF101
20mH
R201
330W
R101
1.5MW
1W
R204
8kW
R202
1.2kW
R203
18kW
C209
43nF
IC301
FOD817B
IC201
KA431LZ
F101
FUSE
C101
220nF
275VAC
R205
250V
3.15A
8kW
Figure 24. Schematic of Demonstration Board
Transformer
EER3019
Barrier tape
1
10
N14V
1
5
6
8
9
2
Np/2
2
9
8
7
6
2
Np/2
4
7
Na
N5V
3
Np/2
10
8
N14V
N5V
4
5
Na
N5V
3
Np/2
TOP
BOT
Figure 25. Schematic of Transformer
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12
FSGM0765R
Winding Specification
Table 3. WINDING SPECIFICATION
Barrier Tape
BOT
TOP
Ts
Pin (S ꢁ F)
3 → 2
Wire
0.37 φ x 1
Turns
Winding Method
N /2
20
Solenoid Winding
Solenoid Winding
Solenoid Winding
Solenoid Winding
Solenoid Winding
Solenoid Winding
2.0 mm
1
p
Insulation: Polyester Tape t = 0.025 mm, 2 Layers
8 → 9
0.4 φ x 3 (TIW)
Insulation: Polyester Tape t = 0.025 mm, 2 Layers
10 → 8
0.4 φ x 3 (TIW)
Insulation: Polyester Tape t = 0.025 mm, 2 Layers
7 → 6
0.4 φ x 3 (TIW)
Insulation: Polyester Tape t = 0.025 mm, 2 Layers
4 → 5
0.2 φ x 1
Insulation: Polyester Tape t = 0.025 mm, 2 Layers
N /2 2 → 1
0.37 φ x 1
N
3
2.0 mm
1
5V
N
5
14V
N
3
2.0 mm
4.0 mm
2.0 mm
1
1
1
5V
N
6
4.0 mm
a
20
p
Insulation: Polyester Tape t = 0.025 mm, 2 Layers
Electrical Characteristics
Table 4. ELECTRICAL CHARACTERISTICS
Pin
Specification
Remark
67 kHz, 1 V
Short All Other Pins
Inductance
Leakage
1 − 3
1 − 3
670 mH 6%
15 mH Maximum
Core & Bobbin
• Core: EER3019 (Ae = 134.0 mm )
2
• Bobbin: EER3019
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FSGM0765R
Bill of Materials
Part #
Value
Capacitor
Note
Table 5. Bill of Materials
Part #
Value
Note
Fuse
250 V 3.15 A
NTC
C101
C102
C103
C104
C105
C106
C107
C201
C202
C203
C204
C205
C206
C207
C208
C209
C301
220 nF / 275 V
150 nF / 275 V
120 mF / 400 V
3.3 nF / 630 V
27 nF / 100 V
220 nF
Box (Pilkor)
Box (Pilkor)
F101
Electrolytic (SamYoung)
Film (Sehwa)
NTC101
5D−11
DSC
Resistor
1.5 MW, J
75 kW, J
43 kW, J
62 W, J
Film (Sehwa)
R101
R102
R103
R104
R201
R202
0.5 W
1/2 W
SMD (2012)
47 mF / 50 V
820 mF / 25 V
820 mF / 25 V
820 mF / 25 V
2200 mF / 10 V
1000 mF / 16 V
1000 mF / 16 V
47 nF / 100 V
100 nF
Electrolytic (SamYoung
Electrolytic (SamYoung
Electrolytic (SamYoung
Electrolytic (SamYoung
Electrolytic (SamYoung
Film (Sehwa)
1 W
1/2 W
330 W, J
1.2 kW, F
1/4 W
1/4 W, 1%
R203
R204
R205
18 kW, F
8 kW, F
1/4 W, 1%
1/4 W, 1%
1/4 W, 1%
SMD (2012)
SMD (2012)
8 kW, F
SMD (2012)
IC
100 nF
SMD (2012)
FSGM0765R
IC201
FSGM0765R
KA431LZ
FOD817B
Diode
ON Semiconductor
ON Semiconductor
ON Semiconductor
4.7 nF / Y2
Inductor
Y−cap (Samhwa)
IC301
LF101
L201
L202
20 mH
Line filter 0.5Ø
5A Rating
5 mH
D101
D102
RGP15M
UF4004
Vishay
Vishay
5 mH
5A Rating
Jumper
ZD101
D201
1N4749
Vishay
J101
T101
MBR20150CT
FYPF2006DN
G3SBA60
ON Semiconductor
ON Semiconductor
Vishay
Transformer
D202
670 mH
BD101
SENSEFET is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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14
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220−6LD LF
CASE 340BG
ISSUE A
DATE 01 SEP 2021
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DOCUMENT NUMBER:
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TO−220−6LD LF
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the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2021
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220−6LD LF
CASE 340BN
ISSUE A
DATE 22 JUL 2021
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DOCUMENT NUMBER:
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TO−220−6LD LF
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ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220 FULLPAK 6LD LF
CASE 340BP
ISSUE A
DATE 01 OCT 2021
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Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
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TO−220 FULLPAK 6LD LF
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
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