FSL106HR [ONSEMI]
650V 集成电源开关，带 100kHz 频率和可调电流限值，用于 10W 离线反激转换器;
| 型号： | FSL106HR |
| 厂家： | 
ONSEMI |
| 描述： | 650V 集成电源开关，带 100kHz 频率和可调电流限值，用于 10W 离线反激转换器 开关 电源开关 转换器 |
| 文件： | 总13页 (文件大小：367K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FSL106HR
Green Mode Power Switch
Description
The FSL106HR integrated Pulse Width Modulator (PWM) and
®
SENSEFET is specifically designed for high−performance offline
Switch−Mode Power Supplies (SMPS) with minimal external
components. FSL106HR includes integrated high−voltage power
switching regulators that combine an avalanche−rugged SENSEFET
with a current−mode PWM control block.
www.onsemi.com
The integrated PWM controller includes: Under−Voltage Lockout
(UVLO) protection, Leading−Edge Blanking (LEB), a frequency
generator for EMI attenuation, an optimized gate turn−on/turn−off
driver, Thermal Shutdown (TSD) protection, and
temperature−compensated precision current sources for loop
compensation and fault protection circuitry. The FSL106HR offers
good soft−start performance. When compared to a discrete MOSFET
and controller or RCC switching converter solution, the FSL106HR
reduces total component count, design size, and weight; while
increasing efficiency, productivity, and system reliability. This device
provides a basic platform that is well suited for the design of
cost−effective flyback converters.
PDIP8 9.42x6.38, 2.54P
CASE 646CM
MARKING DIAGRAM
$Y&E&Z&2&K
FSL106HR
Features
• Internal Avalanche−Rugged SENSEFET (650 V)
• Under 50 mW Standby Power Consumption at 265 Vac, No−load
Condition with Burst Mode
• Precision Fixed Operating Frequency with Frequency Modulation
for Attenuating EMI
$Y
&E
&Z
&2
&K
= ON Semiconductor Logo
= Designated Space
= Assembly Plant Code
= 2−Digit Date code format
= 2−Digits Lot Run Traceability Code
FSL106HR = Specific Device Code Data
• Internal Startup Circuit
• Built−in Soft−Start: 20 ms
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
• Pulse−by−Pulse Current Limit
• Various Protection: Over Voltage Protection (OVP), Overload
Protection (OLP), Output−Short Protection (OSP), Abnormal
Over−Current Protection (AOCP), Internal Thermal Shutdown
Function with Hysteresis (TSD)
Applications
• Auto−Restart Mode
• SMPS for VCR, STB, DVD & DVCD
Players
• SMPS for Home Appliance
• Adapter
• Under−Voltage Lockout (UVLO)
• Low Operating Current: 1.8 mA
• Adjustable Peak Current Limit
Table 1. MAXIMUM OUTPUT POWER (Note 1)
Related Resources
230 Vac + 15% (Note 2)
Adapter (Note 3) Open Frame
9 W 13 W
85−265 Vac
• https://www.onsemi.com/pub/Collateral/
AN−4137.pdf.pdf
• https://www.onsemi.com/pub/Collateral/
AN−4141.pdf.pdf
• https://www.onsemi.com/PowerSolutions/
home.do
Adapter (Note 3)
8 W
Open Frame
10 W
1. The junction temperature can limit the maximum output power.
2. 230 Vac or 100/115 Vac with doubler.
3. Typical continuous power in a non−ventilated enclosed adapter
measured at 50°C ambient
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
July, 2019 − Rev. 3
FSL106HR/D
FSL106HR
Table 2. ORDERING INFORMATION
Part Number
Operating Temperature Range
−40 to 105 °C
Top Mark
Package
8−Lead, Dual Inline Package (DIP)
Packing Method
FSL106HR
FSL106HR
Rail
TYPICAL APPLICATION DIAGRAM
Figure 1. Typical Application
INTERNAL BLOCK DIAGRAM
VSTR
5
Drai n
6,7,8
VCC
2
ICH
VBURL /VBURH
8V/12V
V
Good
Internal
Bias
CC
VREF
V
V
CC
CC
Random
Frequency
Generator
OSC
PWM
IFB
IDELAY
S
R
Q
Q
Gate
Driver
VFB 3
2.5R
R
IPK
4
LEB
On-Time
Detector
Soft
Start
OSP
1
GND
Q
Q
S
R
VSD
VCC
AOCP
V
Good
CC
VAOCP
TSD
VOVP
Figure 2. Internal Block Diagram
www.onsemi.com
2
FSL106HR
PIN CONFIGURATION
GND
Drain
V
Drain
Drain
CC
8−DIP
V
FB
V
STR
I
PK
Figure 3. Pin Configuration
PIN DEFINITIONS
Pin No.
Name
Description
1
GND
Ground. SENSEFET source terminal on the primary side and internal control ground.
Positive Supply Voltage Input. Although connected to an auxiliary transformer winding, current is supplied from pin
5 (V
) via an internal switch during startup (see Figure 2). Once V reaches the UVLO upper threshold (12 V),
CC
2
3
VCC
VFB
STR
the internal startup switch opens and device power is supplied via the auxiliary transformer winding.
Feedback Voltage. The non−inverting input to the PWM comparator, it has a 0.4 mA current source connected inter-
nally, while a capacitor and opto−coupler are typically connected externally. There is a delay while charging external
capacitor C from 2.4 V to 6 V using an internal 5 mA current source. This delay prevents false triggering under tran-
FB
sient conditions, but still allows the protection mechanism to operate under true overload conditions.
Peak Current Limit. Adjusts the peak current limit of the SENSEFET. The feedback 0.4 mA current source is divert-
ed to the parallel combination of an internal 6 kW resistor and any external resistor to GND on this pin to determine
the peak current limit.
4
IPK
Startup. Connected to the rectified AC line voltage source. At startup, the internal switch supplies internal bias and
charges an external storage capacitor placed between the V pin and ground. Once V reaches 12 V, the internal
5
VSTR
CC
CC
switch is opened.
6, 7, 8
Drain
Drain. Designed to connect directly to the primary lead of the transformer and capable of switching a maximum of
650 V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance.
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
−0.3
−0.3
Max
650
650
26
Unit
V
V
STR
V
STR
Pin Voltage
V
Drain Pin Voltage
V
DS
CC
V
Supply Voltage
V
V
I
Feedback Voltage Range
Continuous Drain Current
Drain Current Pulsed (Note 4)
Single Pulsed Avalanche Energy (Note 5)
Total Power Dissipation
−0.3
12.0
0.7
2.8
15
V
FB
A
D
I
A
DM
E
AS
−
−
mJ
W
°C
°C
°C
kV
P
1.5
D
T
Operating Junction Temperature
Operating Ambient Temperature
Storage Temperature
Internally Limited
J
T
−40
−55
5.0
2
+105
+150
A
T
STG
ESD
Human Body Model, JESD22−A114 (Note 6)
Charged Device Model, JESD22−C101 (Note 6)
www.onsemi.com
3
FSL106HR
ABSOLUTE MAXIMUM RATINGS (continued)
Symbol
Parameter
Junction−to−Ambient Thermal Resistance (Note 7, 8)
Min
Max
80
Unit
°C/W
Q
JA
Q
JC
Junction−to−Case Thermal Resistance (Note 7, 9)
Junction−to−Top Thermal Resistance (Note 7, 10)
19
Q
JT
33.7
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
4. Repetitive rating: pulse width limited by maximum junction temperature.
5. L = 30 mH, starting T = 25°C.
J
6. Meets JEDEC standards JESD 22−A114 and JESD 22−C101.
7. All items are tested with the standards JESD 51−2 and JESD 51−10.
8. Q free−standing, with no heat−sink, under natural convection.
JA
9. Q junction−to−lead thermal characteristics under Q test condition. T is measured on the source #7 pin closed to plastic interface for
JC
JA
JA
C
Q
thermo−couple mounted on soldering.
10.Q junction−to−top of thermal characteristic under Q test condition. Tt is measured on top of package. Thermo−couple is mounted in
JT
JA
epoxy glue.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
SENSEFET SECTION
−
−
−
BV
I
Drain−Source Breakdown Voltage
Zero Gate Voltage Drain Current
Drain−Source On−State Resistance
Input Capacitance
V
CC
V
DS
V
GS
V
GS
V
GS
V
GS
V
DD
V
DD
V
DD
V
DD
= 0 V, I = 250 mA
650
V
DSS
D
−
250
mA
= 650 V, V = 0 V
GS
DSS
−
−
−
−
−
−
−
−
R
= 10 V, V = 0 V, T = 25°C
11.5
137
15.7
2.9
18.0
W
DS(ON)
GS
C
−
C
= 0 V, V = 25 V, f = 1MHz
pF
pF
pF
ns
ns
ns
ns
ISS
DS
−
−
−
−
−
−
C
Output Capacitance
= 0 V, V = 25 V, f = 1MHz
DS
OSS
RSS
C
Reverse Transfer Capacitance
Turn−on Delay
= 0 V, V = 25 V, f = 1MHz
DS
t
= 350 V, I = 0.7 A
8.6
d(on)
D
t
Rise Time
= 350 V, I = 0.7 A
9.7
r
D
t
Turn−off Delay
= 350 V, I = 0.7 A
23.6
49.2
d(off)
D
t
Fall Time
= 350 V, I = 0.7 A
D
f
CONTROL SECTION
f
Switching Frequency
V
V
= 650 V, V = 0 V
90
100
5
110
10
kHz
%
OSC
DS
GS
= 10 V, V = 0 V, T = 125°C
Df
Switching Frequency Variation
Frequency Modulation
Maximum Duty Cycle
Minimum Duty Ratio
GS
GS
C
OSC
FM
f
3
kHz
%
D
V
V
= 4 V
= 0 V
71
0
77
0
83
0
MAX
FB
D
%
MIN
FB
V
UVLO Threshold Voltage
11
12
8.0
400
20
13
9.0
V
START
V
After Turn−on
7.0
V
STOP
I
FB
Feedback Source Current
V
= 0
320
15
480
25
mA
ms
FB
FB
t
Internal Soft−Start Time
V
= 4 V
S/S
BURST−MODE SECTION
Burst−Mode Voltage
V
BURH
T = 25°C
J
0.56
0.37
−
0.70
0.50
200
0.84
0.63
−
V
V
V
BURL
BURH(HYS)
V
mV
www.onsemi.com
4
FSL106HR
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
A
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
PROTECTION SECTION
I
Peak Current Limit
T = 25°C, di/dt = 300 mA/ms
0.62
200
5.5
0.70
0.84
A
ns
V
LIM
J
t
Current Limit Delay Time (Note 11)
Shutdown Feedback Voltage
Shutdown Delay Current
CLD
V
V
CC
V
FB
V
FB
= 15 V
= 5 V
6.0
5.0
6.5
6.5
SD
DELAY
I
3.5
mA
V
V
Over−Voltage Protection Threshold
= 2 V
22.5
24.0
1.00
1.60
25.5
1.35
OVP
t
Output Short
Protection (Note 11)
Threshold Time
T = 25°C
ms
V
OSP
J
OSP Triggered when ton < t
OSP
V
Threshold
Feedback Voltage
1.44
2.0
OSP
V
> V
and (Lasts Longer than
FB
OSP
)
t
OSP_FB
t
Feedback Blanking
Time
2.5
ms
OSP_FB
V
AOCP Voltage (Note 11)
T = 25°C
J
0.85
125
1.00
137
1.15
150
V
AOCP
T
Thermal Shutdown
(Note 11)
Shutdown
Temperature
°C
SD
HYS
Hysteresis
60
°C
TSD
t
Leading−Edge Blanking Time (Note 11)
300
ns
LEB
TOTAL DEVICE SECTION
I
I
Operating Supply Current (Note 11)
(While Switching)
V
V
= 14 V, V > V
2.5
1.8
1.1
3.5
2.5
1.5
mA
mA
OP1
CC
FB
BURH
Operating Switching Current, (Control Part
Only)
= 14 V, V < V
OP2
CC
FB
BURL
I
Startup Charging Current
V
V
= 0 V
0.9
35
mA
V
CH
CC
V
Minimum V
Supply Voltage
= V = 0 V, V
Increase
STR
STR
CC
FB
STR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
11. Though guaranteed by design, it is not 100% tested in production.
www.onsemi.com
5
FSL106HR
TYPICAL PERFORMANCE CHARACTERISTICS
(These characteristics graphs are normalized T = 25.)
A
Operating Frequency (f OSC
)
Maximum Duty Cycle (DMAX
)
1.4
1.3
1.2
1.1
1
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.9
0.8
0.7
0.6
-40℃ -25℃ 0℃
25℃ 50℃ 75℃ 100℃ 120℃ 140℃
-40℃ -25℃ 0℃
25℃ 50℃ 75℃ 100℃ 120℃ 140℃
Figure 4. Operating Frequency vs. Temperature
Figure 5. Maximum Duty Cycle vs. Temperature
Start Threshold Voltage (VSTART
)
Operating Supply Current (I op2
)
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
-40
-25
0
25
50
75
100
120
140
-40
-25
0
25
50
75
100
120
140
Figure 6. Operating Supply Current vs.
Temperature
Figure 7. Start Threshold Voltage vs. Temperature
Stop Theshold Voltage (VSTOP
)
Feedback Source Current (IFB)
1.4
1.4
1.3
1.2
1.1
1
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.9
0.8
0.7
0.6
-40℃ -25℃ 0℃ 25℃ 50℃ 75℃ 100℃ 120℃ 140℃
-40℃ -25℃ 0℃
25℃ 50℃ 75℃ 100℃ 120℃ 140℃
Figure 8. Stop Threshold Voltage vs. Temperature
Figure 9. Feedback Source Current vs.
Temperature
www.onsemi.com
6
FSL106HR
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(These Characteristic graphs are normalized at T = 25.)
A
Startup Charging Current (ICH
)
Peak Current Limit (I LIM
)
1.4
1.3
1.2
1.1
1
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.9
0.8
0.7
0.6
-40℃ -25℃ 0℃
25℃ 50℃ 75℃ 100℃ 120℃ 140℃
-40℃ -25℃ 0℃ 25℃ 50℃ 75℃ 100℃ 120℃ 140℃
Figure 10. Startup Charging Current vs.
Temperature
Figure 11. Peak Current Limit vs. Temperature
Burst Operating Supply Current (Iop1
)
Over-Voltage Protection (VOVP
)
1.4
1.4
1.3
1.2
1.1
1
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.9
0.8
0.7
0.6
-40℃ -25℃ 0℃
25℃ 50℃ 75℃ 100℃ 120℃ 140℃
-40
-25
0
25
50
75
100
120
140
Figure 12. Burst Operating Supply Current vs.
Temperature
Figure 13. Over−Voltage Protection vs.
Temperature
www.onsemi.com
7
FSL106HR
Feedback Control
FUNCTIONAL DESCRIPTION
FSL136MR employs current−mode control, as shown in
Figure 16. An opto−coupler (such as the FOD817A) and
shunt regulator (such as the KA431) are typically used to
implement the feedback network. Comparing the feedback
Startup
At startup, an internal high−voltage current source
supplies the internal bias and charges the external capacitor
(C ) connected with the V pin, as illustrated in Figure 14.
A
CC
voltage with the voltage across the R
resistor makes it
SENSE
When V reaches the start voltage of 12 V, the power
CC
possible to control the switching duty cycle. When the shunt
regulator reference pin voltage exceeds the internal
reference voltage of 2.5 V, the optocoupler LED current
switch begins switching and the internal high−voltage
current source is disabled. The power switch continues
normal switching operation and the power is provided from
the auxiliary transformer winding unless V goes below
the stop voltage of 8 V.
increases, the feedback voltage V is pulled down, and the
FB
CC
duty cycle is reduced. This typically occurs when the input
voltage is increased or the output load is decreased.
Figure 16. Pulse−Width−Modulation Circuit
Figure 14. Startup Circuit
Leading−Edge Blanking (LEB)
Oscillator Block
At the instant the internal SENSEFET is turned on, the
primary−side capacitance and secondary−side rectifier
diode reverse recovery typically cause a high−current spike
through the SENSEFET. Excessive voltage across the
The oscillator frequency is set internally and the power
switch has a random frequency fluctuation function.
Fluctuation of the switching frequency of a switched power
supply can reduce EMI by spreading the energy over a wider
frequency range than the bandwidth measured by the EMI
test equipment. The amount of EMI reduction is directly
related to the range of the frequency variation. The range of
frequency variation is fixed internally; however, its
selection is randomly chosen by the combination of external
feedback voltage and internal free−running oscillator. This
randomly chosen switching frequency effectively spreads
the EMI noise nearby switching frequency and allows the
use of a cost− effective inductor instead of an AC input line
filter to satisfy the world−wide EMI requirements.
R
SENSE
resistor leads to incorrect feedback operation in the
current−mode PWM control. To counter this effect, the
power switch employs a leading−edge blanking (LEB)
circuit (see the Figure 16). This circuit inhibits the PWM
comparator for a short time (t ) after the SENSEFET is
LEB
turned on.
Protection Circuit
The power switch has several protective functions, such
as overload protection (OLP), over−voltage protection
(OVP), output−short protection (OSP), under−voltage
lockout (UVLO), abnormal over−current protection
(AOCP), and thermal shutdown (TSD). Because these
various protection circuits are fully integrated in the IC
without external components, the reliability is improved
without increasing cost. Once a fault condition occurs,
switching is terminated and the SENSEFET remains off.
This causes V to fall. When V reaches the UVLO stop
IDS
several
mseconds
tSW=1/fSW
tSW
t
CC
CC
Dt
voltage, V
(8 V), the protection is reset and the internal
STOP
fSW
MAX
f
SW+1/2DfSW
high−voltage current source charges the V capacitor via
CC
the V
V
pin. When V reaches the UVLO start voltage,
(12 V), the power switch resumes normal operation.
STR
CC
MAX
no repetition
START
f
SW-1/2DfSW
several
milliseconds
In this manner, the auto−restart can alternately enable and
disable the switching of the power SENSEFET until the
fault condition is eliminated.
t
Figure 15. Frequency Fluctuation Waveform
www.onsemi.com
8
FSL106HR
Abnormal Over−Current Protection (AOCP)
When the secondary rectifier diodes or the transformer pin
are shorted, a steep current with extremely high di/dt can
flow through the SENSEFET during the LEB time. Even
though the power switch has OLP (Overload Protection), it
is not enough to protect the FPS in that abnormal case, since
severe current stress is imposed on the SENSEFET until
OLP triggers. The power switch includes the internal AOCP
(Abnormal Over−Current Protection) circuit shown in
Figure 19. When the gate turn−on signal is applied to the
power SENSEFET, the AOCP block is enabled and monitors
the current through the sensing resistor. The voltage across
the resistor is compared with a preset AOCP level. If the
sensing resistor voltage is greater than the AOCP level, the
set signal is applied to the latch, resulting in the shutdown of
the SMPS.
Figure 17. P−Widodulation it
2.5R
OSC
Overload Protection (OLP)
S
R
Q
Q
PWM
Gate
Driver
Overload is defined as the load current exceeding a preset
level due to an unexpected event. In this situation, the
protection circuit should be activated to protect the SMPS.
However, even when the SMPS is operating normally, the
overload protection (OLP) circuit can be activated during
the load transition or startup. To avoid this undesired
operation, the OLP circuit is designed to be activated after
a specified time to determine whether it is a transient
situation or a true overload situation.
R
LEB
Rsense
+
2
GND
AOCP
−
VAOCP
Figure 19. Abnormal Over−Current Protection
Thermal Shutdown (TSD)
In conjunction with the I current limit pin (if used), the
PK
The SENSEFET and the control IC are integrated, making
it easier to detect the temperature of the SENSEFET. When
the temperature exceeds approximately 137°C, thermal
shutdown is activated.
current−mode feedback path limits the current in the
SENSEFET when the maximum PWM duty cycle is
attained. If the output consumes more than this maximum
power, the output voltage (V ) decreases below its rating
O
voltage. This reduces the current through the opto−coupler
LED, which also reduces the opto−coupler transistor
current, thus increasing the feedback voltage (V ). If V
Over−Voltage Protection (OVP)
In the event of a malfunction in the secondary−side
feedback circuit or an open feedback loop caused by a
soldering defect, the current through the opto−coupler
FB
FB
exceeds 2.4 V, the feedback input diode is blocked and the
5 mA current source (I ) starts to charge C slowly up
transistor becomes almost zero. Then, V climbs up in a
DELAY
FB
FB
to V . In this condition, V increases until it reaches 6 V,
similar manner to the overload situation, forcing the preset
maximum current to be supplied to the SMPS until the
overload protection is activated. Because excess energy is
provided to the output, the output voltage may exceed the
rated voltage before the overload protection is activated,
resulting in the breakdown of the devices in the secondary
side. To prevent this situation, an over−voltage protection
CC
FB
when the switching operation is terminated, as shown in
Figure 18. The shutdown delay is the time required to charge
C
FB
from 2.4 V to 6 V with 5 mA current source.
VFB
Overload Protection
(OVP) circuit is employed. In general, V is proportional
CC
6V
to the output voltage and the power switch uses V instead
CC
of directly monitoring the output voltage. If V exceeds
CC
24 V, OVP circuit is activated, resulting in termination of the
switching operation. To avoid undesired activation of OVP
2.4V
during normal operation, V should be designed to be
below 24 V.
CC
t12 = CFB× (V(t )−V(t1 )) / I
2
DELAY
t1
t2
t
Figure 18. Overload Protection (OLP)
www.onsemi.com
9
FSL106HR
Output−Short Protection (OSP)
voltage decreases. As shown in Figure 22, the device
automatically enters burst mode when the feedback voltage
If the output is shorted, steep current with extremely high
di/dt can flow through the SENSEFET during the LEB time.
Such a steep current brings high−voltage stress on the drain
of SENSEFET when turned off. To protect the device from
such an abnormal condition, OSP detects V
SENSEFET turn−on time. When the V is higher than
1.6 V and the SENSEFET turn−on time is lower than 1.0 ms,
the FPS recognizes this condition as an abnormal error and
shuts down PWM switching until V
again. An abnormal condition output is shown in Figure 20.
drops below V
. Switching continues, but the current
BURH
limit is fixed internally to minimize flux density in the
transformer. The fixed current limit is larger than that
and
defined by V = V
and, therefore, V is driven down
FB
FB
BURH
FB
further. Switching continues until the feedback voltage
drops below V . At this point, switching stops and the
FB
BURL
output voltages start to drop at a rate dependent on the
standby current load. This causes the feedback voltage to
reaches V
CC
START
rise. Once it passes V
, switching resumes. The
BURH
feedback voltage then falls and the process repeats. Burst
mode alternately enables and disables switching of the
SENSEFET and reduces switching loss in standby mode.
Turn−off Delay
Rectifier
Diode
Current
MOSFET
Drain
Current
ILIM
VFB
Minimum
Turn−on Time
D
VOUT
1.6ms
Output Short Occurs
IOUT
Figure 20. Output Short Waveforms (OSP)
Soft−Start
The power switch has an internal soft−start circuit that
slowly increases the feedback voltage, together with the
SENSEFET current, after it starts. The typical soft−start
time is 20 ms, as shown in Figure 21, where progressive
increments of the SENSEFET current are allowed during the
startup phase. The pulse width to the power switching device
is progressively increased to establish the correct working
conditions for transformers, inductors, and capacitors. The
voltage on the output capacitors is progressively increased
with the intention of smoothly establishing the required
output voltage. Soft−start helps to prevent transformer
saturation and reduce the stress on the secondary diode.
Figure 22. Burst−Mode Operation
Adjusting Peak Current Limit
As shown in Figure 23, a combined 6 kW internal
resistance is connected to the non−inverting lead on the
PWM comparator. An external resistance of Rx on the
current limit pin forms a parallel resistance with the 6 kW
when the internal diodes are biased by the main current
source of 400 mA. For example, FSL106HR has a typical
1.25ms
ILIM
16Steps
SENSEFET peak current limit (I ) of 0.7 A. I
can be
LIM
LIM
adjusted to 0.5 A by inserting Rx between the I pin and the
PK
ground. The value of the Rx can be estimated by the
following equations:
Current Limit
0.25ILIM
0.7A : 0.5A + 6kW : XkW
Drain
(eq. 1)
Current
Ŧ
X + Rx 6kW
t
(eq. 2)
Figure 21. Internal Soft−Start
Where X is the resistance of the parallel network.
Burst Operation
To minimize power dissipation in standby mode, the FPS
enters burst mode. As the load decreases, the feedback
www.onsemi.com
10
FSL106HR
Figure 23. Peak Current Limit Adjustment
SENSEFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries.
www.onsemi.com
11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 9.42x6.38, 2.54P
CASE 646CM
ISSUE O
DATE 31 JUL 2016
9.83
9.00
8
1
5
6.670
6.096
4
8.255
TOP VIEW
7.610
1.65
1.27
(0.56)
7.62
3.683
3.200
5.08 MAX
3.60
3.00
0.33 MIN
0.356
0.200
15
°
0.560
0.355
°
0
2.54
9.957
7.62
FRONT VIEW
7.870
SIDE VIEW
NOTES:
A. CONFORMS TO JEDEC MS−001, VARIATION BA
B. ALL DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONS AND TOLERANCES PER ASME
Y14.5M−2009
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13468G
PDIP8 9.42X6.38, 2.54P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
ADDITIONAL INFORMATION
TECHNICAL PUBLICATIONS:
Technical Library: www.onsemi.com/design/resources/technical−documentation
onsemi Website: www.onsemi.com
ONLINE SUPPORT: www.onsemi.com/support
For additional information, please contact your local Sales Representative at
www.onsemi.com/support/sales
相关型号：
©2020 ICPDF网 联系我们和版权申明