FSL156MRIN_技术文档

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April 2018

FSL156MRIN

Green-Mode Power Switch (FPS™)

Features

Description

The FSL156MRIN is an integrated Pulse Width

Modulation (PWM) controller and SenseFET specifically

designed for offline Switched Mode Power Supplies

(SMPS) with minimal external components. The PWM

controller includes an integrated fixed-frequency

oscillator, Line-Over Voltage Protection (LOVP), Under-

Voltage Lockout (UVLO), Leading-Edge Blanking (LEB),

optimized gate driver, internal soft-start, temperature-

compensated precise current sources for loop

compensation, and self-protection circuitry. Compared

with a discrete MOSFET and PWM controller solution,

the FSL156MRIN reduces total cost, component count,

size, and weight; while simultaneously increasing

efficiency, productivity, and system reliability. This

device provides a basic platform suited for cost-effective

design of a flyback converter.

.

Advanced Soft Burst Mode for Low Standby Power

and Low Audible Noise

.

Random Frequency Fluctuation (RFF) for Low EMI

Pulse-by-Pulse Current Limit

Overload Protection (OLP), Over-Voltage

Protection (OVP), Abnormal Over-Current

Protection (AOCP), Internal Thermal Shutdown

(TSD) with Hysteresis, Output-Short Protection

(OSP), and Under-Voltage Lockout (UVLO) with

Hysteresis , Line Over Voltage Protection (LOVP)

.

Low Operating Current (0.4mA) in Burst Mode

Internal Startup Circuit

Internal High-Voltage SenseFET: 650V

Built-in Soft-Start: 15ms

Auto-Restart Mode

Applications

.

Power Supply for Home Appliances, LCD Monitors,

STBs, and DVD Players

Ordering Information

Output Power Table⁽²⁾

Operating Current

R_DS(ON)

(Max.)

230V_AC±15%

85-265V_AC

Part Number Package⁽¹⁾

Junction

Limit

Temperature (Typ.)

Open

Adapter⁽³⁾

Frame⁽⁴⁾

FSL156MRIN

-40°C ~ +125°C

8-DIP

1.6A

26W

40W

20W

30W

2.2

Notes:

1. Lead-free package per JEDEC J-STD-020B.

2. The junction temperature can limit the maximum output power.

3. Typical continuous power in a non-ventilated enclosed adapter measured at 50C ambient temperature.

4. Maximum practical continuous power in an open-frame design at 50C ambient temperature.

FSL156MRIN • Rev. 2

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Application Circuit

V_O

AC

IN

V_STR

V_IN

Drain

GND

V_CC

FB

Figure 1. Typical Application Circuit

Internal Block Diagram

Figure 2. Internal Block Diagram

FSL156MRIN • Rev. 2

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2

Pin Configuration

1. GND

2. V_CC

3. FB

8. Drain

7. Drain

6. Drain

5. V_STR

FSL156MRIN

4. V_IN

Figure 3. Pin Assignments (Top View)

Pin Definitions

Pin #

Name

Description

1

GND

Ground. This pin is the control ground and the SenseFET source.

Power Supply. This pin is the positive supply input, which provides the internal operating

current for both startup and steady-state operation.

2

3

V_CC

FB

Feedback. This pin is internally connected to the inverting input of the PWM comparator.

The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor

should be placed between this pin and GND. If the voltage of this pin reaches 7V, the

overload protection triggers, which shuts down the FPS.

Line Over-Voltage Input. This pin is the input pin of line voltage. The voltage, which is

divided by resistors, is the input of this pin. If this pin voltage is higher than V_INHvoltage, the

LOVP triggers, which shuts down the FPS. Do not leave this pin floating. If LOVP is not used,

this pin should be directly connected to the GND.

4

5

V_IN

Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link.

At startup, the internal high-voltage current source supplies internal bias and charges the

external capacitor connected to the V_CCpin. Once V_CCreaches 12V, the internal current

source (I_CH) is disabled.

V_STR

Drain

6

7

8

SenseFET Drain. High-voltage power SenseFET drain connection.

FSL156MRIN • Rev. 2

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3

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Symbol

V_STR

V_DS

Parameter

Min.

Max.

650

26

Unit

V

V_STRPin Voltage

Drain Pin Voltage

V_CCPin Voltage

V

V_CC

V

V_FB

Feedback Pin Voltage

-0.3

10.0

V

V_IN

I_DM

V_INPin Voltage

10.0

4

V

A

Drain Current Pulsed

1.90

1.27

190

1.5

T_C=25C

I_DS

Continuous Switching Drain Current⁽⁵⁾

A

T_C=100C

E_AS

P_D

Single-Pulsed Avalanche Energy⁽⁶⁾

Total Power Dissipation (T_C=25C)⁽⁷⁾

Maximum Junction Temperature

Operating Junction Temperature⁽⁸⁾

Storage Temperature

mJ

W

150

+125

+150

4.5

C

T_J

T_STG

-40

-55

Human Body Model, JESD22-A114

Charged Device Model, JESD22-C101

Electrostatic Discharge

Capability

ESD

kV

2.0

Notes:

5. Repetitive peak switching current when the inductive load is assumed: limited by maximum duty (D_MAX=0.73) and

junction temperature (see Figure 4).

6. L=45mH, starting T_J=25C.

7. Infinite cooling condition (refer to the SEMI G30-88).

8. Although this parameter guarantees IC operation, it does not guarantee all electrical characteristics.

Figure 4. Repetitive Peak Switching Current

Thermal Impedance

T_A=25°C unless otherwise specified.

Symbol

θ_JA

Parameter

Junction-to-Ambient Thermal Impedance⁽⁹⁾

Junction-to-Lead Thermal Impedance⁽¹⁰⁾

Value

85

Unit

°C/W

Ψ_JL

11

Notes:

9. JEDEC recommended environment, JESD51-2, and test board, JESD51-10, with minimum land pattern.

10. Measured on drain pin #7, close to the plastic interface.

www.onsemi.com

FSL156MRIN • Rev. 2

4

Electrical Characteristics

T_J= 25C unless otherwise specified.

Symbol

Parameter

Conditions

Min.

Typ. Max.

Unit

SenseFET Section

BV_DSS

I_DSS

R_DS(ON)

C_ISS

C_OSS

t_r

Drain-Source Breakdown Voltage

Zero-Gate-Voltage Drain Current

650

V

_CC=0V, I_D=250A

250

µA

Ω

V_DS=520V, T_A=125C

Drain-Source On-State Resistance V_GS=10V, I_D=1A

1.8

515

75

2.2

Input Capacitance⁽¹¹⁾

Output Capacitance⁽¹¹⁾

Rise Time

V_DS=25V, V_GS=0V, f=1MHz

pF

ns

V_DS=25V, V_GS=0V, f=1MHz

V_DS=325V, I_D=4A, R_G=25Ω

26

t_f

Fall Time

25

t_d(on)

t_d(off)

Turn-On Delay

Turn-Off Delay

14

32

Control Section

f_S

f_S

Switching Frequency⁽¹¹⁾

Switching Frequency Variation⁽¹¹⁾

V_CC=14V, V_FB=4V

-25C < T_J< 125C

V_CC=14V, V_FB=4V

V_CC=14V, V_FB=0V

V_FB=0

61

67

±5

67

73

±10

73

kHz

%

D_MAX

D_MIN

I_FB

Maximum Duty Ratio

%

Minimum Duty Ratio

0

%

Feedback Source Current

65

11

90

12

7.5

15

115

13

µA

V

V_START

V_STOP

t_SS

V_FB=0V, V_CCSweep

After Turn-on, V_FB=0V

V_STR=40V, V_CCSweep

UVLO Threshold Voltage

7.0

8.0

V

Internal Soft-Start Time

ms

V

V_RECOMMRecommended V_CCRange

Burst Mode Section

V_BURH

13

23

0.45

0.30

0.50

0.35

150

0.55

0.40

V

V_BURL

Hys

Burst-Mode Voltage

V_CC=14V, V_FBSweep

mV

Protection Section

I_LIM

V_SD

Peak Drain Current Limit

1.45

6.45

1.2

1.60

7.00

2.0

1.75

7.55

2.8

A

V

di/dt=300mA/s

Shutdown Feedback Voltage

Shutdown Delay Current

Leading-Edge Blanking Time^(11,12)

V_CC=14V, V_FBSweep

V_CC=14V, V_FB=4V

I_DELAY

t_LEB

µA

ns

V

300

24.5

V_OVP

Over-Voltage Protection

V_CCSweep

23.0

1.87

26.0

2.03

Line Over-Voltage Protection

Threshold Voltage

V_INH

V_CC=14V, V_INSweep

1.95

0.06

V

Line Over-Voltage Protection

Hysteresis

V_INHYS

V_CC=14V, V_INSweep

OSP Triggered when

t_OSP

V_OSP

t_{OSP_FB}

TSD

Threshold Time

Output-Short

Threshold V_FB

Protection⁽¹¹⁾

0.7

1.8

2.0

125

1.0

2.0

2.5

135

60

1.3

2.2

3.0

145

µs

V

t

_ON<t_OSP& V_FB>V_OSP

(Lasts Longer than t_{OSP_FB}

)

V_FBBlanking Time

µs

C

Shutdown Temperature

Hysteresis

Thermal Shutdown Temperature⁽¹¹⁾

T_HYS

Continued on the following page…

FSL156MRIN • Rev. 2

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5

Electrical Characteristics (Continued)

T_J= 25C unless otherwise specified.

Symbol

Parameter

Conditions

Min.

Typ. Max. Unit

Total Device Section

Operating Supply Current,

(Control Part in Burst Mode)

I_OP

I_OPS

V_CC=14V, V_FB=0V

V_CC=14V, V_FB=2V

0.3

1.1

0.4

1.5

120

0.5

1.9

mA

µA

Operating Switching Current,

(Control Part and SenseFET Part)

V

_CC=11V (Before V_CC

I_START

Start Current

85

155

1.3

Reaches V_START

)

I_CH

Startup Charging Current

V_CC=V_FB=0V, V_STR=40V

V_CC=V_FB=0V, V_STRSweep

0.7

1.0

26

mA

V

V_STR

Minimum V_STRSupply Voltage

Notes:

11. These parameters are guaranteed; not 100% tested in production.

12. t_LEBincludes gate turn-on time.

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FSL156MRIN • Rev. 2

6

Typical Performance Characteristics

Characteristic graphs are normalized at T_A=25°C.

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

‐40'C ‐20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C

Temperature [ °C]

Figure 5. Operating Supply Current (I_OP) vs. T_A

Figure 6. Operating Switching Current (I_OPS) vs. T_A

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

‐40'C ‐20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C

Temperature [ °C]

Figure 7. Startup Charging Current (I_CH) vs. T_A

Figure 8. Peak Drain Current Limit (I_LIM) vs. T_A

1.40

1.30

1.20

1.10

1.00

0.90

0.80

0.70

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.60

0.80

‐40'C ‐20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C

Temperature [ °C]

Figure 9. Feedback Source Current (I_FB) vs. T_A

Figure 10. Shutdown Delay Current (I_DELAY) vs. T_A

FSL156MRIN • Rev. 2

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7

Typical Performance Characteristics

Characteristic graphs are normalized at T_A=25°C.

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

‐40'C ‐20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C

Temperature [ °C]

Figure 11. UVLO Threshold Voltage (V_START) vs. T_A

Figure 12. UVLO Threshold Voltage (V_STOP) vs. T_A

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

‐40'C ‐20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C

Temperature [ °C]

Figure 13. Shutdown Feedback Voltage (V_SD) vs. T_A

Figure 14. Over-Voltage Protection (V_OVP) vs. T_A

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

‐40'C ‐20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C

Temperature [ °C]

Figure 15. Switching Frequency (f_S) vs. T_A

Figure 16. Maximum Duty Ratio (D_MAX) vs. T_A

FSL156MRIN • Rev. 2

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Typical Performance Characteristics

Characteristic graphs are normalized at T_A=25°C.

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

‐40'C ‐25'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C

Temperature [ °C]

Figure 17. Line OVP (V_INH) vs. T_A

Figure 18. Hysteresis of LOVP (V_INHYS) vs. T_A

FSL156MRIN • Rev. 2

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9

Functional Description

1. Startup: At startup, an internal high-voltage current

source supplies the internal bias and charges the

external capacitor (C_VCC) connected to the V_CCpin, as

illustrated in Figure 19. When V_CCreaches 12V, the

FSL156MRIN begins switching and the internal high-

voltage current source is disabled. Normal switching

operation continues and the power is supplied from the

auxiliary transformer winding unless V_CCgoes below the

stop voltage of 7.5V.

3. Feedback Control: This device employs Current-

Mode control, as shown in Figure 20. An opto-coupler

(such as the FOD817) and shunt regulator (such as the

KA431) are typically used to implement the feedback

network. Comparing the feedback voltage with the

voltage across the R_SENSEresistor makes it possible to

control the switching duty cycle. When the reference pin

voltage of the shunt regulator exceeds the internal

reference voltage of 2.5V, the opto-coupler LED current

increases, pulling down the feedback voltage and

reducing drain current. This typically occurs when the

input voltage is increased or the output load is decreased.

3.1 Pulse-by-Pulse Current Limit: Because Current-

Mode control is employed, the peak current through

the SenseFET is limited by the inverting input of PWM

comparator (V_FB*), as shown in Figure 20. Assuming

that the 90μA current source flows only through the

internal resistor (3R + R =25kꢀ), the cathode voltage

of diode D2 is about 2.8V. Since D1 is blocked when

the feedback voltage (V_FB) exceeds 2.8V, the

maximum voltage of the cathode of D2 is clamped at

this voltage. Therefore, the peak value of the current

through the SenseFET is limited.

3.2 Leading-Edge Blanking (LEB): At the instant the

internal SenseFET is turned on, a high-current spike

usually occurs through the SenseFET, caused by

primary-side capacitance and secondary-side rectifier

reverse recovery. Excessive voltage across the R_SENSE

resistor leads to incorrect feedback operation in

Current-Mode PWM control. To counter this effect, the

LEB circuit inhibits the PWM comparator for t_LEB

(300ns) after the SenseFET is turned on.

Figure 19. Startup Block

2. Soft-Start: The internal soft-start circuit increases

PWM comparator inverting input voltage, together with

the SenseFET current, slowly after startup. The typical

soft-start time is 15ms. The pulse width to the power

switching device is progressively increased to establish

the correct working conditions for the transformers,

inductors, and capacitors. The voltage on the output

capacitors is progressively increased to smoothly

establish the required output voltage. This helps prevent

transformer saturation and reduces stress on the

secondary diode during startup.

Figure 20. Pulse Width Modulation Circuit

FSL156MRIN • Rev. 2

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4. Protection Circuits: The FSL156MRIN has several

self-protective functions, such as Overload Protection

(OLP), Abnormal Over-Current Protection (AOCP),

Output-Short Protection (OSP), Over-Voltage Protection

(OVP), and Thermal Shutdown (TSD). All the

protections are implemented as auto-restart. Once the

fault condition is detected, switching is terminated and

the SenseFET remains off. This causes V_CCto fall.

When V_CCfalls to the Under-Voltage Lockout (UVLO)

stop voltage of 7.5V, the protection is reset and the

startup circuit charges the V_CCcapacitor. When V_CC

reaches the start voltage of 12.0V, normal operation

resumes. If the fault condition is not removed, the

SenseFET remains off and V_CCdrops to stop voltage

again. In this manner, the auto-restart can alternately

enable and disable the switching of the power

SenseFET until the fault condition is eliminated.

Because these protection circuits are fully integrated

into the IC without external components, reliability is

improved without increasing cost.

increasing until it reaches 7.0V, when the switching

operation is terminated, as shown in Figure 22. The

delay for shutdown is the time required to charge C_FB

from 2.5V to 7.0V with 2.0µA. A 25 ~ 50ms delay is

typical for most applications. This protection is

implemented as auto-restart.

Figure 22. Overload Protection

4.2 Abnormal Over-Current Protection (AOCP):

When the secondary rectifier diodes or the

transformer pins are shorted, a steep current with

extremely high di/dt can flow through the SenseFET

during the minimum turn-on time. Even though the

FSL156MRIN has overload protection, it is not

enough to protect the FSL156MRIN in that abnormal

case; due to the severe current stress imposed on the

SenseFET until OLP is triggered. The internal AOCP

circuit is shown in Figure 23. When the gate turn-on

signal is applied to the power SenseFET, the AOCP

block is enabled and monitors the current through the

sensing resistor. The voltage across the resistor is

compared with a preset AOCP level. If the sensing-

resistor voltage is greater than the AOCP level, the

set signal is applied to the S-R latch, resulting in the

shutdown of the SMPS.

Figure 21. Auto-Restart Protection Waveforms

4.1 Overload Protection (OLP): Overload is defined

as the load current exceeding its normal level due to

an unexpected abnormal event. In this situation, the

protection circuit should trigger to protect the SMPS.

However, even when the SMPS is in normal

operation, the overload protection circuit can be

triggered during the load transition. To avoid this

undesired operation, the overload protection circuit is

designed to trigger only after a specified time to

determine whether it is a transient situation or a true

overload situation. Because of the pulse-by-pulse

current-limit capability, the maximum peak current

through the SenseFET is limited and, therefore, the

maximum input power is restricted with a given input

voltage. If the output consumes more than this

maximum power, the output voltage (V_OUT) decreases

below the set voltage. This reduces the current

through the opto-coupler LED, which also reduces the

opto-coupler transistor current, increasing the

feedback voltage (V_FB). If V_FBexceeds 2.5V, D1 is

blocked and the 2.0µA current source starts to charge

C_FBslowly up_.In this condition, V_FBcontinues

Figure 23. Abnormal Over-Current Protection

FSL156MRIN • Rev. 2

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11

4.3. Output-Short Protection (OSP): If the output is

shorted, steep current with extremely high di/dt can

flow through the SenseFET during the minimum turn-

on time. Such a steep current creates high-voltage

stress on the drain of the SenseFET when turned off.

To protect the device from this abnormal condition,

OSP is included. It is comprised of detecting V_FBand

SenseFET turn-on time. When the V_FBis higher than

2.0V and the SenseFET turn-on time is lower than

1.0μs, this condition is recognized as an abnormal

error and PWM switching shuts down until V_CC

reaches V_STARTagain. An abnormal condition output

short is shown in Figure 24.

4.6 Line Over-Voltage Protection (LOVP): If the line

input voltage is increased to an unwanted level, high

line input voltage creates high-voltage stress on the

entire system. To protect from this abnormal condition,

LOVP is included. It is comprised of detecting V_INusing

divided resistors. When V_INis higher than 1.95V, this

condition is recognized as an abnormal error and PWM

switching shuts down until V_INdecreases to around

1.89V (60mV hysteresis).

Figure 25. Line Over-Voltage Protection

5. Soft Burst Mode: To minimize power dissipation in

Standby Mode, the FSL156MRIN enters Burst-Mode

operation. As the load decreases, the feedback voltage

decreases. As shown in Figure 22, the device

automatically enters Burst Mode when the feedback

voltage drops below V_BURL(350mV). At this point,

switching stops and the output voltages start to drop at

a rate dependent on standby current load. This causes

the feedback voltage to rise. Once it passes V_BURH

(500mV), switching resumes. The feedback voltage then

falls and the process repeats. Burst Mode alternately

enables and disables SenseFET switching, reducing

switching loss in Standby Mode.

Figure 24. Output-Short Protection

4.4 Over-Voltage Protection (OVP): If the

secondary-side feedback circuit malfunctions or a

solder defect causes an opening in the feedback path,

the current through the opto-coupler transistor

becomes almost zero. Then V_FBclimbs up in a similar

manner to the overload situation, forcing the preset

maximum current to be supplied to the SMPS until the

overload protection is triggered. Because more

energy than required is provided to the output, the

output voltage may exceed the rated voltage before

the overload protection is triggered, resulting in the

breakdown of the devices in the secondary side. To

prevent this situation, an OVP circuit is employed. In

general, the V_CCis proportional to the output voltage

and the FSL156MRIN uses V_CCinstead of directly

monitoring the output voltage. If V_CCexceeds 24.5V,

an OVP circuit is triggered, resulting in the termination

of the switching operation. To avoid undesired

activation of OVP during normal operation, V_CCshould

be designed to be below 24.5V.

4.5 Thermal Shutdown (TSD): The SenseFET and

the control IC on a die in one package makes it easier

for the control IC to detect the temperature of the

SenseFET. If the temperature exceeds ~135C, the

thermal shutdown is triggered and stops operation.

The FSL156MRIN operates in Auto-Restart Mode

until the temperature decreases to around 75C,

when normal operation resumes.

Figure 26. Burst-Mode Operation

FSL156MRIN • Rev. 2

www.onsemi.com

12

6. Random Frequency Fluctuation (RFF): Fluctuating

switching frequency of an SMPS can reduce EMI by

spreading the energy over a wide frequency range. The

amount of EMI reduction is directly related to the

switching frequency variation, which is limited internally.

The switching frequency is determined randomly by

external feedback voltage and an internal free-running

oscillator at every switching instant. RFF effectively

scatters EMI noise around typical switching frequency

(67kHz) and can reduce the cost of the input filter

included to meet the EMI requirements (e.g. EN55022).

Figure 27. Random Frequency Fluctuation

FSL156MRIN • Rev. 2

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13

Package Dimensions

9.83

9.00

6.67

6.096

8.255

7.61

3.683

3.20

7.62

5.08 MAX

0.33 MIN

3.60

3.00

(0.56)

2.54

0.356

0.20

0.56

0.355

9.957

7.87

1.65

1.27

7.62

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO

JEDEC MS-001 VARIATION BA

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE EXCLUSIVE OF BURRS,

MOLD FLASH, AND TIE BAR EXTRUSIONS.

D) DIMENSIONS AND TOLERANC

ASME Y14.5M-1994

ES PER

E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.

Figure 28. 8-Lead, MDIP, JEDEC MS-001, .300" Wide

FSL156MRIN • Rev. 2

www.onsemi.com

14

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1


型号：	FSL156MRIN
厂家：	ONSEMI
描述：	650V 集成电源开关，带线路 OVP 和异常 OCP，用于 30W 离线反激转换器开关电源开关光电二极管转换器
文件：	总16页 (文件大小：985K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FSL156MRIN [ONSEMI]

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