FSUSB30UMX [ONSEMI]
小功率 2 端口高速 USB 2.0 (480 Mbps) 开关;
| 型号： | FSUSB30UMX |
| 厂家： | 
ONSEMI |
| 描述： | 小功率 2 端口高速 USB 2.0 (480 Mbps) 开关 开关 |
| 文件： | 总19页 (文件大小：1339K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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2013 年 3 月
FSUSB30
低功率、双端口、高速 USB2.0(480Mbps) 开关
特性
说明
?
?
?
低导通电容：3.7pF （典型值）
FSUSB30 是一款低功率、 2 端口、高速 USB 2.0 开关。
该器件配置为双刀双掷 (DPDT) 开关，专为在两个高速
(480Mbps) 源或高速和全速 (12Mbps) 源之间切换进行了
优化。 FSUSB30 符合 USB2.0 的要求，并且具有 3.7pF
的极低导通电容 (CON)。此器件的宽带宽 (720MHz) 超过
了通过三次谐波所需的带宽，这使得信号的边沿和相位失
真降到最小。出色的通道间串扰性能可实现最小的干扰。
低导通电阻：6.5W （典型值）
低功耗：1μA （最大值）
衆 t10μA 最大 ICCT 超过扩展控制电压范围
(VIN = 2.6V, VCC = 4.3V)
?
?
?
宽 -3dB 带宽， >720MHz
8kV 静电放电保护
当 VCC = 0V; D+/D- 引脚可耐受的电压达到 5.5V 时，
会提供断电保护
封装：
FSUSB30 在 D+ / D- 引脚上包含了特殊的电路，在断电时
可使器件承受过压条件。同时，当应用于 S 引脚的控制电
压小于电源电压 (VCC) 时，该器件可以最大限度地降低功
耗。此特性对超便携式应用（例如手机）尤为重要，可支
持基带处理器通用 I/O 的直接接口。其他应用包括便携手
机、PDA、数码相机、打印机和笔记本电脑中共享的开关
和连接器。
?
衆 t10 引脚 MicroPak™ (1.6 x 2.1mm)
衆 t10 引脚 MSOP
衆 t10 引脚 UMLP (1.4 x 1.8mm)
应用
?
手机、个人数字处理 (PDA)、数码相机和笔记本 LCD
显示器、电视机和机顶盒
相关应用说明
?
AN-6022 使用 FSUSB30/FSUSB31，以符合 USB 2.0
故障条件要求
订购信息
订货号
封装编号
MAC010A
MUA10A
MLP010A
产品代码记号
封装说明
10 引脚 MicroPak， 1.6 x 2.1mm
10 引脚模塑小外形封装 (MSOP)， JEDEC MO-187， 3.0mm 宽
10 引脚方形超薄 MLP (UMLP) 1.4 x 1.8mm
FSUSB30L10X
FSUSB30MUX
FSUSB30UMX
FJ
FSUSB30
GJ
FSUSB30
VCC
1D+
1D–
D+
D–
USB2.0
Controller
USB
Set Top Box
(STB) CPU
or
Connector
DSP
2D+
2D–
DVR or
Mass Storage
Controller
Processor
Control
.
S
OE
图 1. 典型应用
MicroPak 是飞兆半导体公司的商标。
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
连接图
模拟符号
Pad Assignments for MicroPak
HSD1+
HSD2+
D+
D–
9
8
2
7
3
6
HSD1–
HSD2–
VCC 10
1
5
4
GND
S
Control
OE
(Top View)
引脚描述
Pad Assignments for DQFN
NC VCC
引脚名
说明
OE
总线开关使能
选择输入
数据端口
未连接
1
14
S
D+, D-, HSDn+, HSDn-
NC
2
3
4
5
6
13
12
11
10
9
S
HSD1+
NC
OE
HSD1–
NC
HSD2+
D+
HSD2–
D–
真值表
7
8
S
OE
功能
GND NC
(Top Through View)
X
高
低
低
未连接
D+, D- = HSD1n
低
高
Pin Assignment for MSOP
D+, D- = HSD2n
1
10
S
VCC
HSD1+
2
3
4
9
8
7
OE
HSD2+
D+
HSD1–
HSD2–
D–
5
6
GND
(Top Through View)
Pad Assignments for µMLP
7
1
6
2
5
4
3
8
9
D–
OE
VCC
GND
D+
10
Sel
(Top Through View)
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
2
绝对最大额定值
应力超过绝对最大额定值，可能会损坏设备。在超出推荐的工作条件的情况下，该器件可能无法正常运行或操作，且不
建议让器件在这些条件下长期工作。此外，过度暴露在高于推荐的工作条件下，会影响器件的可靠性。绝对最大额定值
仅是额定应力值。
符号
VCC
参数
最低
-0.5
-0.5
0.5
最大值
+5.5
VCC
单位
V
电源电压
DC 输入电压 (1)
VCNTRL
V
HSDnX
VCC
V
VSW
0.5
VCC
V
直流开关 I/O 电压 (1)
D+,D- 考虑到 VCC > 0
D+,D- 考虑到 VCC = 0
-0.50
-50
VCC
V
IIK
mA
mA
°C
kV
kV
直流输入二极管电流
直流输出电流
存储温度
IOUT
TSTG
50
+150
8
-65
全部引脚
ESD
人体模型
8
输入 / 输出至地
注意：
1. 当观测输入与输出二极管电流额定值时，该输入与输出可能超出负额定值。
推荐工作条件
推荐的操作条件表定义了器件的真实工作条件。指定推荐的工作条件，以确保设备的最佳性能达到数据表中的规格。飞
兆半导体建议不要超过推荐工作条件，也不能按照绝对最大额定值进行设计。
符号
VCC
VIN
参数
最低
3.0
0
最大值
4.3
单位
V
电源电压
VCC
VCC
+85
V
控制输入电压
开关输入电压
工作温度
VSW
TA
0
V
-40
°C
JA
250
°C/W
热阻， 10 MicroPak
注意：
2. 控制输入必须保持高电平或低电平，不允许浮动。
© 2006 飞兆半导体公司
FSUSB30 Rev. 1.1.8
www.fairchildsemi.com
3
直流电气特性
若无其他说明，所有典型值都在 25°C 下测得。
TA = -40°C 至 +85°C
VCC (V)
符号
VIK
参数
工作条件
IIN = -18mA
单位
最小值 典型值 最大值
3.0
-1.2
V
V
箝位二极管电压
输入电压高电平
1.3
1.7
0.5
0.7
3.0 至 3.6
VIH
4.3
V
V
3.0 至 3.6
4.3
VIL
输入电压低电平
V
IIN
4.3
-1.0
-2.0
1.0
2.0
µA
µA
控制脚输入漏电流
关断漏电流
VSW = 0.0V 至 VCC
0 ≤ Dn, HSD1n, HSD2n ≤ VCC
IOZ
4.3
电源关断漏
电流 (D+, D–)
IOFF
0
-2.0
2.0
µA
VSW = 0V 至 4.3V, VCC = 0V
VSW = 0.4V, ION = -8mA
3.0
3.6
3.0
6.5
10.0
7.0
RON
开关导通电阻 (3)
VSW = 0V, IO = 30mA, 25°C
(4)
∆RON
Delta RON
VSW = 0.4V, ION = -8mA
0.35
2.0
VSW = 0.0V - 1.0V,
ION = -8mA
RON 平坦度 RON 平坦度 (3)
3.0
4.3
4.3
VCNTRL = 0.0V 或 VCC
,
ICC
1.0
µA
µA
静态电源电流
IOUT = 0
每个控制电压的 ICC
流增量
电
ICCT
10.0
VCNTRL （控制输入） = 2.6V
说明：
3. 在通过开关的指定电流下，由 Dn、 HSD1n 和 HSD2n 引脚之间的电压降测得。
导通电阻决定于这两个端口上的电压降。
4. 由产品特性保证。
交流电气特性
若无其他说明，所有典型值都在 25°C， Vcc=3.3V 时测得。
TA = -40°C 至 +85°C
VCC (V)
符号
参数
工作条件
单位 图位
最小值 典型值 最大值
HD1 , HD2 = 0.8V,
导通时间 S,
n
n
t
13
30
ns
3.0 至 3.6
3.0 至 3.6
3.3
图 9
ON
R = 50, C = 5pF
OE 至 Output
L
L
HD1 , HD2 = 0.8V,
关断时间 S,
OE 至 Output
n
n
t
12
25
ns
图 9
OFF
R = 50, C = 5pF
L
L
图 7
图 8
(4)
t
R = 50, C = 5pF
0.25
ns
传输延迟
PD
L
L
R = 50, C = 5pF,
IN
L
L
t
2.0
6.5
ns
先开后合
3.0 至 3.6
图 10
BBM
V
= 0.8V
O
f = 240MHz, R = 50
-30
-45
720
550
dB
dB
关断隔离 （非相邻）
非相邻通道串扰
3.0 至 3.6
3.0 至 3.6
图 13
图 14
IRR
T
Xtalk
R = 50, f = 240MHz
T
R = 50, C = 0pF
T
L
BW
MHz
-3dB 带宽
3.0 至 3.6
图 12
R = 50, C = 5pF
T
L
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
4
高速 USB 相关的交流电气特性
TA = -40°C 至 +85°C
最小值 典型值 最大值
50
VCC (V)
符号
参数
工作条件
单位
图位
图 7
t
R = 50, C = 5pF
ps
ps
通道间相位差 (5)
3.0 至 3.6
3.0 至 3.6
SK(O)
L
L
图 11
在相同输出下，反向
转换的时滞 (5)
图 7
图 11
t
R = 50, C = 5pF
20
SK(P)
L
L
R = 50, C = 5pF,
L
L
(5)
t
200
ps
总抖动
480 Mbps 时，t = t = 500ps 3.0 至 3.6
J
R
F
15
(PRBS = 2 - 1)
注意：
5. 由产品特性保证。
电容值
符号
C
TA = -40°C 至 +85°C
参数
工作条件
单位
图位
最小值 典型值 最大值
V
= 0V
CC
1.5
3.7
2.5
pF
控制引脚输入电容
图 16
图 15
图 16
IN
C
V
V
= 3.3, OE = 0V
pF
pF
D1 , D2 , Dn 导通电容
ON
CC
CC
n
n
C
D1 , D2 关断电容
和 OE = 3.3
OFF
n
n
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
5
典型特性
Frequency Response
0
-1
-2
-3
-4
-5
-6
-7
-8
1
10
100
1000
10000
Frequency (MHz)
C
L = 0pF, VCC = 3.3V
图 2. 增益 vs. 频率
Frequency Response
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
1
10
100
1000
Frequency (MHz)
图 3. 关断隔离
Frequency Response
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
1
10
100
1000
VCC = 3.3V
Frequency (MHz)
图 4. 串扰
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
6
测试框图
VON
IDn(OFF)
NC
HSDn
A
Dn
VIN
VIN
ION
GND
Select
GND
Select
GND
VS = 0 or VCC
VS = 0 to VCC
Each switch port is tested separately.
RON = VON / ION
图 5. 导通电阻
图 6. 关断漏电流
tFALL = 500ps
tRISE = 500ps
800mV
HSDn
VIN
D+, D–
CL
90%
50%
90%
50%
Input: HSDn+,
VOUT
RL
HSDn–
400mV
RS
GND
10%
10%
GND
VSel
GND
VOH
Output: D+, D–
50%
50%
RL, RS, and CL are functions of the application environment
(see AC Electrical tables for specific values).
VOL
tPLH
tPHL
CL includes test fixture and stray capacitance.
图 7. 交流测试电路负载
图 8. 开关传输延迟波形
tFALL = 2.5ns
tRISE = 2.5ns
VCC
90%
/2
90%
Input – S, OE
V
V
/2
CC
CC
10%
10%
GND
VOH
90%
90%
Output – VOUT
VOL
tON
tOFF
图 9. 开通 / 关断波形
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
7
VCC
VCC
HSDn
HSDn
VO
VOUT
CL*
VCC
0V
D+, D–
Control
Input
50%
RL
tR = tF = 2.5ns (10–90%)
S
VOUT
Control
Input
GND
0.9 x VOUT
tD
*CL includes test fixture and stray capacitance.
图 10. “ 先开后合 ”(tBBM
)
tFALL = 500ps
tRISE = 500ps
800mV
90%
50%
90%
50%
Input: D+, D–
10%
10%
400mV
t
FALL = 500ps
tRISE = 500ps
800mV
VOH
Output1: HSD1+
HSD1–
90%
50%
90%
50%
50%
Input: HSDn+
HSDn–
50%
VOL
10%
10%
tPLH1
tPHL1
400mV
VOH
VOH
50%
50%
50%
50%
Output1: D2+, D2–
Output: D+, D–
VOL
VOL
tPLH
tPHL
tPLH2
tPHL2
TSK(P) = | tPHL – tPLH
Pulse Skew, TSK(P)
|
T
SK(O) = | tPLH1 – tPLH2 | or | tPHL1 – tPHL2
|
Output Skew, TSK(OUT)
图 11. 开关时滞测试
Network Analyzer
FSUSB30
RS
VIN
VS
GND
GND
V
Sel
GND
VOUT
RT
GND
RS and RT are functions of the application environment
(See AC Electrical Tables for specific values).
GND
图 12. 带宽
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
8
Network Analyzer
FSUSB30
RS
VIN
VS
GND
GND
RT
GND
V
Sel
GND
GND
VOUT
RT
GND
OFF-Isolation = 20 Log (VOUT /VIN
)
图 13. 通道的关断隔离
NC
Network Analyzer
FSUSB30
RS
VIN
VS
GND
GND
V
Sel
RT
GND
GND
RT
VOUT
GND
S and RT are functions of the application environment
(50, 75 or 100Ω)
R
GND
Crosstalk = 20 Log (VOUT / VIN
)
图 14. 非相邻通道间串扰
FSUSB30
FSUSB30
D1n, D2n
Dn
Dn
Capacitance
Meter
S
S
Capacitance
Meter
VSel = 0 or VCC
VSel = 0 or VCC
f = 240MHz
f = 240MHz
D1n, D2n
图 15. 通道导通电容
图 16. 通道关断电容
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
9
应用指南：符合 USB 2.0 Vbus 短路要求
在 USB 2.0 规范的第 7.1.1 节，说明了 USB 设备必须能
够耐受关闭或开启 USB 设备时 Vbus 与 D+ 或 D- 的短
路。 FSUSB30 配置可有效满足这两项要求。
上电保护
USB 2.0 规范还说明， USB 设备应该能够耐受传输数据
时出现的 Vbus 短路。为了提供针对这种情况的防护，飞
兆建议在开关 VCC 引脚和电源电压轨之间加入一个
100W 串行电阻。在出现过压时，这种更改操作可以限制
流回 VCC 轨道的电流，从而将电流保持在安全工作范围
内。在这种应用中，开关将完整的 5.25V 输入信号通过选
择的输出口发送出去，同时维持未被选择的引脚上的关断
隔离。
断电保护
对于 Vbus 短路，开关需要能够耐受这种情况至少 24 小
时。 FSUSB30 具有专门设计的电路，可以防止关闭电源
和过压条件下的意外信号泄漏，并且保证系统可靠性。这
种保护也被增加到普通引脚 (D+, D-)。
VCC= 3.6 V
100 Ohms
HSD+
HSD+
D+ = 5.25V
D- = 5.25V
FSUSB30
HSD-
HSD-
Figure 17. Adding 100 resistor in series with the VCC supply allows the FSUSB30 to withstand a
Vbus short when powered up
For more information, see Applications Note AN-6022 Using the FSUSB30 to Comply with USB 2.0 Fault
Condition Requirements at www.fairchildsemi.com
© 2006 飞兆半导体公司
FSUSB30 Rev. 1.1.8
www.fairchildsemi.com
10
卷带和卷盘规格
DQFN 的卷带形式
带第 节
封装指示符
位腔
腔状态
空
盖带状态
密封
空白段 （始点终点）
载体
125 （典型值）
2500/3000
BQX
装满
空
密封
空白片尾 （插孔末端）
75 （典型值）
密封
卷带尺寸
尺寸以英寸 （毫米）表示，除非另有说明。
© 2006 飞兆半导体公司
FSUSB30 Rev. 1.1.8
www.fairchildsemi.com
11
DQFN 的卷带尺寸
尺寸以英寸 （毫米）表示，除非另有说明。
A
B
C
D
N
W1
W2
卷带大小
13.0
(330)
0.059
(1.50)
0.512
(13.00)
0.795
(20.20)
7.008
(178)
0.488
(12.4)
0.724
(18.4)
(12mm)
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
12
MSOP 的卷带尺寸
尺寸以英寸 （毫米）表示，除非另有说明。
MSOP 的卷带尺寸
尺寸以英寸 （毫米）表示，除非另有说明。
A
B
C
D
N
W1
W2
W3
卷带大小
13
(330)
0.059
(1.5)
0.512
(13)
0.795
(20.2)
7.008
(178)
0.448
(12.4)
0.724
(18.4)
0.468-0.606
(11.9 -15.4)
(12mm)
© 2006 飞兆半导体公司
FSUSB30 Rev. 1.1.8
www.fairchildsemi.com
13
物理尺寸测试
0.10 C
2.10
A
2X
1.62
B
KEEPOUT ZONE, NO TRACES
OR VIAS ALLOWED
(0.11)
0.56
1.12
1.60
PIN1 IDENT IS
2X LONGER THAN
OTHER LINES
0.10 C
10X
(0.35)
(0.25)
2X
10X
0.50
TOP VIEW
RECOMMENDED LAND PATTERN
0.55 MAX
0.05 C
0.05 C
0.05
0.00
(0.20)
C
0.35
0.25
SIDE VIEW
(0.15)
D
DETAIL A
(0.36)
0.35
0.25
0.65
0.55
0.35
0.25
DETAIL A 2X SCALE
1
4
0.56
NOTES:
10
5
A. PACKAGE CONFORMS TO JEDEC
REGISTRATION MO-255, VARIATION UABD .
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. PRESENCE OF CENTER PAD IS PACKAGE
SUPPLIER DEPENDENT. IF PRESENT IT
IS NOT INTENDED TO BE SOLDERED AND
HAS A BLACK OXIDE FINISH.
(0.29)
0.35
6
9
9X
0.25
0.50
0.25
0.15
9X
1.62
0.10
0.05
C
C
A B
ALL FEATURES
E. DRAWING FILENAME: MKT-MAC10Arev5.
BOTTOM VIEW
图 17. 10 引脚 MicroPak， 1.6 x 2.1mm
要了解卷带和卷盘规格，请访问飞兆半导体的网站：http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.
封装图纸是作为一项服务而提供给考虑选用飞兆半导体产品的客户。具体参数可进行改动，且无需做出相应通知。请注意图纸上的版本
和 / 或日期，并联系飞兆半导体代表核实或获得最新版本。封装规格并不超出飞兆公司全球范围内的条款与条件，尤其指保修，保修涉
及飞兆半导体的全部产品。
请经常访问飞兆半导体在线封装网页，以获取最新封装图纸。
http://www.fairchildsemi.com/packaging/.
© 2006 飞兆半导体公司
FSUSB30 Rev. 1.1.8
www.fairchildsemi.com
14
物理尺寸测试
图 18. 10 引脚模塑小外形封装 (MSOP)， JEDEC MO-187， 3.0mm 宽
封装图纸是作为一项服务而提供给考虑选用飞兆半导体产品的客户。具体参数可进行改动，且无需做出相应通知。请注意图纸上的版本和
/ 或日期，并联系飞兆半导体代表核实或获得最新版本。封装规格并不超出飞兆公司全球范围内的条款与条件，尤其指保修，保修涉及飞兆
半导体的全部产品。
请经常访问飞兆半导体在线封装网页，以获取最新封装图纸。
http://www.fairchildsemi.com/packaging/.
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
15
物理尺寸测试
0.10 C
2X
1.40
A
B
(9X)
1.70
0.563
0.663
1.80
1
PIN#1 IDENT
2.10
0.10 C
0.40
TOP VIEW
2X
0.225
(10X)
RECOMMENDED
LAND PATTERN
0.55 MAX.
(0.15)
0.10 C
0.08 C
9X
0.45
1.45
SEATING
PLANE
0.55
0.40
C
0.05
0.00
SIDE VIEW
1.85
0.35
(9X)
0.45
0.225
(10X)
3
OPTIONAL MINIMIAL
TOE LAND PATTERN
0.40
6
DETAIL A
1
NOTES:
PIN#1 IDENT
A. PACKAGE DOES NOT CONFORM TO
ANY JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
0.15
0.25
10
(10X)
0.10 C A B
0.05 C
BOTTOM VIEW
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
0.55
0.45
E. DRAWING FILENAME: MKT-UMLP10Arev5.
F. FAIRCHILD SEMICONDUCTOR.
PACKAGE
EDGE
45°
LEAD
OPTION 2
LEAD
OPTION 1
0.25
0.15
DETAIL A
SCALE : 2X
SCALE : 2X
SCALE : 2X
图 19. 10 引脚，方形，超薄膜塑无铅封装 (UMLP)， 1.4 x 1.8mm
封装图纸是作为一项服务而提供给考虑选用飞兆半导体产品的客户。具体参数可进行改动，且无需做出相应通知。请注意图纸上的版本
和 / 或日期，并联系飞兆半导体代表核实或获得最新版本。封装规格并不超出飞兆公司全球范围内的条款与条件，尤其指保修，保修涉
及飞兆半导体的全部产品。
请经常访问飞兆半导体在线封装网页，以获取最新封装图纸。
http://www.fairchildsemi.com/packaging/.
© 2006 飞兆半导体公司
FSUSB30 Rev. 1.1.8
www.fairchildsemi.com
16
© 2006 飞兆半导体公司
www.fairchildsemi.com
FSUSB30 Rev. 1.1.8
17
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