FSUSB74UMX [ONSEMI]

高速 USB 2.0 开关/多路复用器;
FSUSB74UMX
型号: FSUSB74UMX
厂家: ONSEMI    ONSEMI
描述:

高速 USB 2.0 开关/多路复用器

开关 PC 复用器
文件: 总12页 (文件大小:609K)
中文:  中文翻译
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April 2012  
FSUSB74  
4:1 High-Speed USB Multiplexer/Switch  
Features  
Switch Type  
USB  
Description  
The FSUSB74 is a bi-directional, low-power, high-speed  
USB 2.0 4:1 MUX. It is optimized for switching from four  
high-speed (480Mbps) sources or any combination of high-  
speed and full-/low-speed USB/UART sources to one USB  
2.0 connector.  
4:1  
USB 2.0 High–Speed Compliant  
USB 2.0 Full-Speed Compliant  
RON  
CON  
6.5  
7.5pF  
Applications  
15kV (Air)  
8kV (Contact)  
ESD (IEC61000-4-2)  
.
.
.
MP3 Portable Media Players  
Cellular Phones, Smart Phones  
Netbooks, Mobile Internet Devices (MID)  
VCC  
2.7 to 4.4V  
<1µA  
ICCSLP  
ICCACT  
9µA  
Related Resources  
16- Lead UMLP 1.80 x 2.60 x  
0.55mm, 0.40mm Pitch  
16-Lead MLP 3 x 3 x 0.7mm,  
0.5mm Pitch  
. For samples and questions, please contact:  
Package  
Analog.Switch@fairchildsemi.com.  
. FSUSB74 Demonstration Board  
. FSUSB74 Evaluation Board  
FSUSB74UMX (UMLP)  
FSUSB74MPX (MLP)  
Ordering Information  
Typical Application  
FSUSB74  
USB Port  
4G  
µProcessor  
HS-USB #1  
D+  
D-  
HS-USB #2  
PMIC  
4:1  
MUX  
Application  
µProcessor  
HS-USB #3  
HS-USB #4  
3G  
µProcessor  
Figure 1. Mobile Phone Example  
© 2010 Fairchild Semiconductor Corporation  
FSUSB74 • Rev. 1.0.2  
www.fairchildsemi.com  
Pin Configurations  
NC  
16  
/OE HSD0- HSD0+  
NC /OE HSD0- HSD0+  
16 15 14 13  
HSD0+  
HSD1+  
HSD2+  
HSD3+  
HSD0–  
HSD1–  
15  
14  
13  
D+  
HSD1-  
HSD1+  
HSD2+  
HSD2-  
12  
11  
10  
9
GND  
D+  
1
2
3
4
HSD1-  
HSD1+  
HSD2+  
HSD2-  
12  
11  
10  
9
GND  
D+  
1
2
D-  
3
D-  
D–  
HSD2 –  
HSD3 –  
VCC  
4
VCC  
SEL1  
5
6
7
8
5
6
7
8
/OE  
Control  
SEL0  
SEL1 SEL0 HSD3- HSD3+  
SEL1 SEL0 HSD3- HSD3+  
Figure 2. UMLP Analog Symbol  
Figure 3. UMLP (Top View)  
Figure 4. MLP (Top View)  
Pin Descriptions  
Pin #  
1
Name  
GND  
Type  
Ground  
I/O  
Description  
Ground  
2
D+  
D+ common port (HS or FS USB)  
D- common port (HS or FS USB)  
3
D-  
I/O  
4
VCC  
Power Supply Supply Voltage  
5
SEL1  
SEL0  
HSD3-  
HSD3+  
HSD2-  
HSD2+  
HSD1+  
HSD1-  
HSD0+  
HSD0-  
/OE  
Input  
Input  
I/O  
Path Selection Control Input (see truth table below)  
Path Selection Control Input (see truth table below)  
D- from fourth source path (HS or FS USB)  
D+ from fourth source path (HS or FS USB)  
D- from third source path (HS or FS USB)  
D+ from third source path (HS or FS USB)  
D+ from second source path (HS or FS USB)  
D- from second source path (HS or FS USB)  
D+ from first source path (HS or FS USB)  
D- from first source path (HS or FS USB)  
Enable Control Input (see truth table below)  
No Connect  
6
7
8
I/O  
9
I/O  
10  
11  
12  
13  
14  
15  
16  
I/O  
I/O  
I/O  
I/O  
I/O  
Input  
NC  
Truth Table  
/OE  
1
SEL1  
SEL0  
Function  
X
0
0
1
1
X
0
1
0
1
D+, D- Switch Paths Open  
D+=HSD0+, D-=HSD0-  
D+=HSD1+, D-=HSD1-  
D+=HSD2+, D-=HSD2-  
D+=HSD3+, D-=HSD3-  
0
0
0
0
© 2010 Fairchild Semiconductor Corporation  
FSUSB74 • Rev. 1.0.2  
www.fairchildsemi.com  
2
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable  
above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition,  
extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute  
maximum ratings are stress ratings only.  
Symbol  
VCC  
Parameter  
Min. Max. Unit  
Supply Voltage  
-0.5  
-0.50  
-0.50  
-50  
5.25  
VCC  
V
V
VCNTRL  
VSW  
DC Input Voltage (SEL1, SEL0, /OE, SELS)(1)  
DC Switch I/O Voltage(1)  
5.25  
V
IIK  
DC Input Diode Current  
mA  
°C  
TSTG  
MSL  
Storage Temperature  
-65  
+150  
1
Moisture Sensitivity Level (JEDEC J-STD-020A)  
Level  
Air Gap  
15  
8
IEC61000-4-2 System on USB connector pins D+ & D-  
Human Body Model, JEDEC: JESD22-A114  
Contact  
ESD  
D+,D- to GND  
Power to GND  
All Other Pins  
6
kV  
12  
2
Note:  
1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating  
conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend  
exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
Parameter  
Min. Max. Unit  
VCC  
Supply Voltage  
2.5  
0
4.4  
VCC  
4.4  
V
V
(2)  
VCNTRL  
Control Input Voltage (SEL1, SEL0, /OE, and SELS)  
Switch I/O Voltage  
VSW  
TA  
-0.5  
-40  
V
Operating Temperature  
+85  
°C  
Note:  
2. The control input must be held HIGH or LOW; it must not float.  
© 2010 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSUSB74 • Rev. 1.0.2  
3
DC Electrical Characteristics  
All typical values are for VCC=3.3V at 25°C unless otherwise specified.  
TA=- 40ºC to +85ºC  
Min. Typ. Max.  
Symbol  
Parameter  
Conditions  
VCC (V)  
Unit  
(3)  
RON  
HS Switch On Resistance  
HS Delta Ron(4)  
VSW=0.4V, ION=-8mA, Figure 5  
VSW=0.4V, ION=-8mA  
3.3  
3.3  
6.5  
0.5  
9.0  
  
  
(3)  
RON  
All Combinations of /OE, SEL1 & SEL0  
in the Truth Table (1=VCC, 0=0V)  
IIN  
IOZ  
Control Input Leakage  
Off State Leakage  
4.4  
4.4  
0
-1  
-1  
-1  
1
1
1
µA  
µA  
µA  
0 Dn, HSD0n, HSD1n, HSD2n,  
HSD3n 4.4V  
Power-Off Leakage Current  
(All I/O Ports)  
IOFF  
VSW=0V to 4.4V, VCC=0V, Figure 6  
ICCSLP Sleep Mode Supply Current  
ICCACT Active Mode Supply Current  
/OE=VCC  
4.4  
4.4  
4.4  
4.4  
2.5  
1
µA  
µA  
µA  
µA  
V
All Active Modes in Truth Table  
VCNTRL=1.8V  
9
18  
3.3  
4.9  
4.0  
6.0  
-1.2  
Increase in ICC Current per  
ICCT  
Control Input and VCC  
VCNTRL=1.2V  
VIK  
VIH  
Clamp Diode Voltage  
IIN=-18mA  
Control Input Voltage High  
Control Input Voltage Low  
SEL1, SEL0, /OE  
SEL1, SEL0, /OE  
2.5 to 4.4 1.0  
2.5 to 4.4  
V
VIL  
0.35  
V
Notes:  
3. Measured by the voltage drop between HSDn and Dn pins at the indicated current through the switch. On resistance is  
determined by the lower of the voltage on the two (HSDn or Dn ports).  
4. Guaranteed by characterization.  
© 2010 Fairchild Semiconductor Corporation  
FSUSB74 • Rev. 1.0.2  
www.fairchildsemi.com  
4
AC Electrical Characteristics  
All typical values are for VCC=3.3V at TA=25°C unless otherwise specified.  
TA=- 40ºC to +85ºC  
Min. Typ. Max.  
Symbol  
Parameter  
Conditions  
VCC (V)  
Unit  
Turn-On Time when Switching  
from One USB Path (or Disabled  
i.e. /OE=1) to Another USB Path  
RL=50, CL=35pF, VSW=0.8V,  
Figure 7, Figure 8  
tON  
2.5 to 4.4 126  
400  
80  
µs  
Turn-Off Time, Turning Off Any  
of the USB Paths  
RL=50, CL=35pF, VSW=0.8V,  
Figure 7, Figure 8  
tOFF  
tPD  
2.5 to 4.4  
3.3  
ns  
ns  
ns  
Propagation Delay(5)  
CL=5pF, RL=50, Figure 7, Figure 9  
0.25  
4.5  
CL=5pF, Dn at 0V or 3.6V, 40.5in  
series with switch 10% to 90%  
tRF  
Slow Turn-On/Off Switch Paths(5)  
3.3  
RL=50, CL=35pF, VSW1=VSW2=0.8V,  
Figure 11  
tBBM  
OIRR  
Xtalk  
Break-Before-Make Time(5)  
Off Isolation(5)  
2.5 to 4.4 126  
2.5 to 4.4  
400  
µs  
dB  
dB  
RL=50, f=240MHz, Figure 13  
-40  
-40  
Channel-to-Channel Crosstalk(5) RL=50, f=240MHz, Figure 14  
2.5 to 4.4  
tSK(P)  
Pulse Skew(5)  
VSW=0.2VdiffPP, Figure 10, CL=5pF  
2.5 to 4.4  
2.5 to 4.4  
25  
25  
ps  
ps  
Skew Between Differential  
Signals Within a Pair(5)  
tSK(I)  
VSW=0.2VdiffPP, Figure 10, CL=5pF  
Note:  
5. Guaranteed by characterization.  
Capacitance Characteristics  
All typical values are for VCC=3.3V at TA=25°C unless otherwise specified.  
Symbol  
Parameter  
Conditions  
VCC (V)  
Typical Unit  
CIN  
Input Capacitance(6)  
0
3
CON  
D+/D- On Capacitance(6)  
Any Switch Path Enabled, f=1MHz, Figure 16  
If VCC=3.3V, then /OE=3.3V; f=1MHz, Figure 15  
3.3  
7.5  
pF  
HSD0n, HSD1n, HSD2n, HSD3n  
Off Capacitance(6)  
COFF  
0 or 3.3  
2.2  
Note:  
6. Guaranteed by characterization.  
© 2010 Fairchild Semiconductor Corporation  
FSUSB74 • Rev. 1.0.2  
www.fairchildsemi.com  
5
Test Diagrams  
VON  
IDn(OFF)  
NC  
A
HSD  
n
V
Dn  
SW  
V
Select  
SW  
GND  
ION  
GND  
V
Sel= 0 orVcc  
Select  
GND  
**Each switch port is tested separately  
V
Sel= 0 orVcc  
R
ON = VON / ION  
Figure 5. On Resistance  
Figure 6. Off Leakage  
HSD  
n
Dn  
C
V
SW  
VOUT  
R
R
GND  
L
L
S
GND  
V
Sel  
GND  
RL , R , and CL are functions of the application  
S
environment (see AC Tables for specific values)  
CL includes test fixture and stray capacitance.  
Figure 7. AC Test Circuit Load  
Figure 8. Turn-On / Turn-Off Waveforms  
t
= 750ps  
t
= 750ps  
FALL  
RISE  
0.4V  
400mV  
90%  
90%  
50%  
Input  
– V  
D+/D  
50%  
50%  
-
Input  
50%  
0V  
10%  
10%  
tPLH  
tPHL  
GND  
+
VOH  
VOH  
Output  
50%  
50%  
Output  
- V  
VOL  
OUT  
pLH-  
50%  
50%  
-
V
OL  
t
t
t
t
pLH+  
pHL+  
pHL-  
Figure 9. Propagation Delay (tRtF – 500ps)  
Figure 10. Skew Test Waveforms  
SK(P) = | tPLH- – tPHL- | or | tPLH+ – tPHL+  
tSK(I) = | tPLH- – tPHL+ | or | tPLH+ – tPHL-  
t
|
|
© 2010 Fairchild Semiconductor Corporation  
FSUSB74 • Rev. 1.0.2  
www.fairchildsemi.com  
6
Test Diagrams (Continued)  
tRISE= 2.5ns  
Vcc  
Input - VSel  
HSD  
90%  
Vcc/2  
n
Dn  
C
V
SW1  
10%  
0V  
VOUT  
GND  
L
V
R
L
SW2  
VOUT  
GND  
0.9*Vout  
GND  
0.9*Vout  
R
S
tBBM  
V
Sel  
RL , RS, and CL are functions of the application  
environment (see AC Tables for specific values)  
CL includes test fixture and stray capacitance.  
GND  
Figure 11. Break-Before-Make Interval Timing  
Network Analyzer  
RS  
Network Analyzer  
R
S
VIN  
V
IN  
V
S
GND  
GND  
VS  
GND  
VOUT  
GND  
R
T
GND  
V
GND  
V
Sel  
Sel  
V
OUT  
GND  
GND  
R
T
GND  
RT  
RS and RT are functions of the application  
environment (see AC Tables for specific values).  
GND  
GND  
RS and RT are functions of the application  
Off isolation = 20 Log (VOUT / VIN  
)
environment (see AC Tables for specific values).  
Figure 12. Bandwidth  
Figure 13. Channel Off Isolation  
Network Analyzer  
NC  
R
S
V
IN  
V
GND  
S
GND  
V
Sel  
GND  
R
T
GND  
V
OUT  
GND  
R
T
RS and RT are functions of the application environment  
(see AC Tables for specific values).  
GND  
Crosstalk = 20 Log (VOUT / VIN)  
Figure 14. Non-Adjacent Channel-to-Channel Crosstalk  
HSD  
HSD  
n
Capacitance  
Meter  
n
S
S
V
Capacitance  
Meter  
V
= 0 or V  
cc  
Sel  
= 0 or V  
cc  
Sel  
HSD  
HSD  
n
n
Figure 15. Channel Off Capacitance  
Figure 16. Channel On Capacitance  
© 2010 Fairchild Semiconductor Corporation  
FSUSB74 • Rev. 1.0.2  
www.fairchildsemi.com  
7
Physical Dimensions  
2.10  
0.563(15X)  
0.10  
C
1.80  
A
B
0.663  
0.40  
2X  
1
2.60  
2.90  
PIN#1 IDENT  
0.10  
C
TOP VIEW  
0.225  
(16X)  
2X  
RECOMMENDED  
LAND PATTERN  
0.55 MAX.  
0.152  
0.10  
0.08  
C
C
TERMINAL SHAPE VARIANTS  
SEATING  
PLANE  
C
0.05  
0.00  
0.40  
0.60  
SIDE VIEW  
0.30  
0.50  
0.15  
0.25  
0.15  
0.25  
0.10  
15X  
15X  
0.45  
0.10  
0.35  
PIN 1  
NON-PIN 1  
5
Supplier 1  
9
0.40  
0.30  
0.50  
0.15  
0.25  
0.15  
15X  
0.25  
0.30  
0.50  
15X  
1
PIN 1  
NON-PIN 1  
PIN#1 IDENT  
Supplier 2  
13  
0.25  
0.15  
16  
0.55  
0.45  
0.10  
0.05  
C
C
A B  
BOTTOM VIEW  
R0.20  
PACKAGE  
EDGE  
NOTES:  
A. PACKAGE DOES NOT FULLY CONFORM TO  
JEDEC STANDARD.  
LEAD  
OPTION 2  
SCALE : 2X  
LEAD  
OPTION 1  
SCALE : 2X  
B. DIMENSIONS ARE IN MILLIMETERS.  
C. DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M, 1994.  
D. LAND PATTERN RECOMMENDATION IS  
BASED ON FSC DESIGN ONLY.  
E. DRAWING FILENAME: MKT-UMLP16Arev4.  
F. TERMINAL SHAPE MAY VARY ACCORDING  
TO PACKAGE SUPPLIER, SEE TERMINAL  
SHAPE VARIANTS.  
Figure 17. 16-Pin, Ultrathin Molded Leadless Package (UMLP)  
Order Number  
Operating Temperature Range  
Package Description  
Packing Method  
16-Terminal, Ultrathin Molded Leadless  
Package (UMLP)  
FSUSB74UMX  
-40 to 85°C  
Tape & Reel  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without  
notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most  
recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty  
therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.  
© 2010 Fairchild Semiconductor Corporation  
FSUSB74 • Rev. 1.0.2  
www.fairchildsemi.com  
8
Physical Dimensions  
Figure 18. 16-Lead, Quad Molded Leadless Package (MLP)  
Order Number Operating Temperature Range  
Package Description  
Packing Method  
16-Lead, Quad, Molded Leadless Package  
(MLP), 3mm x 3mm  
FSUSB74MPX  
-40 to 85°C  
Tape & Reel  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without  
notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most  
recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty  
therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.  
© 2010 Fairchild Semiconductor Corporation  
FSUSB74 • Rev. 1.0.2  
www.fairchildsemi.com  
9
© 2010 Fairchild Semiconductor Corporation  
FSUSB74 • Rev. 1.0.2  
www.fairchildsemi.com  
10  
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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
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