HCPL2530SM [ONSEMI]
高速晶体管光耦合器;
| 型号： | HCPL2530SM |
| 厂家： | 
ONSEMI |
| 描述： | 高速晶体管光耦合器 晶体管 光电 |
| 文件： | 总16页 (文件大小：517K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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8-Pin DIP High Speed
Transistor Optocouplers
PDIP8 6.6x3.81, 2.54P
CASE 646BW
8
1
Single-Channel: 6N135M,
6N136M, HCPL4503M
Dual-Channel: HCPL2530M,
HCPL2531M
PDIP8 9.655x6.61, 2.54P
CASE 646CQ
8
8
1
1
1
PDIP8 GW
CASE 709AC
Description
The 6N135M, 6N136M, HCPL4503M, HCPL2530M, and
HCPL2531M optocouplers consist of an AlGaAs LED optically
coupled to a high speed photodetector transistor for each channel.
A separate connection for the bias of the photodiode improves the
speed by several orders of magnitude over conventional
phototransistor optocouplers by reducing the base−collector
capacitance of the input transistor.
The HCPL4503M has no internal connection to the phototransistor
base for improved noise immunity. An internal noise shield provides
superior common mode rejection of up to 50,000 V/ms.
PDIP8 GW
CASE 709AD
8
MARKING DIAGRAM
ON
6N135
VXXYYB
Features
6N135 = Device Number
• High Speed – 1 MBit/s
V
= DIN EN/IEC60747−5−5 Option (only
• Dual−Channel: HCPL2530M, HCPL2531M
• CTR Guaranteed 0°C to 70°C
appears on component ordered with this
option)
XX
YY
= Two Digit Year Code, e.g., ‘15’
= Two Digit Work Week Ranging from ‘01’ to
‘53’
• No Base Connection for Improved Noise Immunity (HCPL4503M)
• Superior CMR of 15,000 V/ms Minimum (HCPL4503M)
• Safety and Regulatory Approvals
B
= Assembly Package Code
♦ UL1577, 5,000 VAC
for 1 Minute
RMS
♦ DIN EN/IEC60747−5−5
• These are Pb−Free Devices
ORDERING INFORMATION
See detailed ordering and shipping information on page 11 of
this data sheet.
Applications
• Line Receivers
• Pulse Transformer Replacement
• Output Interface to CMOS−LSTTL−TTL
• Wide−Bandwidth Analog Coupling
Related Resources
• https://www.onsemi.com/products/interfaces/high−performance−opto
couplers
• https://www.onsemi.com/products/interfaces/high−performance−opto
couplers/high−performance−transistor−optocouplers/hcpl0500
• https://www.onsemi.com/products/interfaces/high−performance−opto
couplers/high−performance−transistor−optocouplers/fodm452
• https://www.onsemi.com/products/interfaces/high−performance−opto
couplers/low−voltage−high−performance−optocouplers/fod050l
© Semiconductor Components Industries, LLC, 2008
1
Publication Order Number:
September, 2021 − Rev. 2
HCPL2530M/D
Single−Channel: 6N135M, 6N136M, HCPL4503M Dual−Channel: HCPL2530M,
HCPL2531M
SCHEMATICS
VCC
N/C
+
+
1
8
1
8
VCC
VF1
_
VB
VO1
2
3
7
6
5
2
3
4
7
6
5
VF
_
_
VO
VO2
VF2
+
N/C 4
GND
GND
6N135M, 6N136M,
HCPL4503M
HCPL2530M,
HCPL2531M
Pin 7 is not connected in
the HCPL4503M
Figure 1. Schematics
SAFETY AND INSULATION RATINGS (As per DIN EN/IEC 60747−5−5, this optocoupler is suitable for “safe electrical insulation”
only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits.)
Parameter
Characteristics
Installation Classifications per DIN VDE 0110/1.89 Table 1, For Rated Mains Voltage
<150 V
<300 V
<450 V
<600 V
I–IV
I–IV
RMS
RMS
RMS
RMS
I–III
I–III
Climatic Classification
40/100/21
2
Pollution Degree (DIN VDE 0110/1.89)
Comparative Tracking Index
175
Symbol
Parameter
Input−to−Output Test Voltage, Method A, V x 1.6 = V
Value
Unit
V
PR
,
1,335
V
peak
IORM
PR
Type and Sample Test with t = 10 s, Partial Discharge < 5 pC
m
Input−to−Output Test Voltage, Method B, V
x 1.875 = V
,
1,669
V
peak
IORM
PR
100% Production Test with t = 1 s, Partial Discharge < 5 pC
m
V
Maximum Working Insulation Voltage
Highest Allowable Over−Voltage
External Creepage
890
6,000
≥8.0
≥7.4
≥10.16
≥0.5
150
V
V
IORM
peak
V
IOTM
peak
mm
mm
mm
mm
°C
External Clearance
External Clearance (for Option TV, 0.4” Lead Spacing)
Distance Through Insulation (Insulation Thickness)
Case Temperature (Note 1)
DTI
T
S
I
Input Current (Note 1)
200
mA
mW
W
S,INPUT
P
Output Power (Duty Factor ≤ 2.7%) (Note 1)
300
S,OUTPUT
9
R
Insulation Resistance at T , V = 500 V (Note 1)
>10
IO
S
IO
1. Safety limit value − maximum values allowed in the event of a failure.
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2
Single−Channel: 6N135M, 6N136M, HCPL4503M Dual−Channel: HCPL2530M,
HCPL2531M
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Test Conditions
Value
Unit
°C
T
Storage Temperature
Operating Temperature
Junction Temperature
Lead Solder Temperature
−40 to +125
−40 to +100
−40 to +125
260 for 10 s
STG
OPR
T
°C
T
J
°C
T
SOL
°C
EMITTER
I (avg)
DC/Average Forward Input Current Each Channel (Note 2)
Peak Forward Input Current Each Channel (Note 3)
Peak Transient Input Current Each Channel
Reverse Input Voltage Each Channel
25
50
1.0
5
mA
mA
A
F
I (pk)
F
50% Duty Cycle, 1 ms P.W.
I (trans)
F
≤1 ms P.W., 300 pps
V
R
P
D
V
Input Power Dissipation Each Channel (Note 4)
45
mW
DETECTOR
(avg)
I
O
Average Output Current Each Channel
Peak Output Current Each Channel
Emitter−Base Reverse Voltage
Supply Voltage
8
mA
mA
V
I
O
(pk)
16
V
EBR
6N135M and 6N136M
6N135M and 6N136M
5
−0.5 to 30
−0.5 to 20
5
V
CC
V
V
O
Output Voltage
V
I
B
Base Current
mA
mW
P
D
Output Power Dissipation Each Channel (Note 5)
100
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. Derate linearly above 70°C free−air temperature at a rate of 0.8 mA/°C.
3. Derate linearly above 70°C free−air temperature at a rate of 1.6 mA/°C.
4. Derate linearly above 70°C free−air temperature at a rate of 0.9 mW/°C.
5. Derate linearly above 70°C free−air temperature at a rate of 2.0 mW/°C.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
4.5
0
Max
20.0
70
Unit
V
V
CC
Supply Voltage
T
A
Ambient Operating Temperature
Input Current, Low Level
°C
I
FL
0
250
20.0
mA
mA
I
FH
Input Current, High Level (Note 6)
6.3
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
6. 6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less.
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Single−Channel: 6N135M, 6N136M, HCPL4503M Dual−Channel: HCPL2530M,
HCPL2531M
ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Device
Test Conditions
Min
Typ
Max
Unit
INDIVIDUAL COMPONENT CHARACTERISTICS (V = 5.0 V, T = 0°C to 70°C unless otherwise specified.)
CC
A
EMITTER
V
Input Forward Voltage
All
All
All
I = 16 mA, T = 25°C
−
−
5
1.45
−
1.70
1.80
−
V
F
F
A
I = 16 mA
F
B
VR
Input Reverse
Breakdown Voltage
I
R
= 10 mA
21
V
Temperature Coefficient
of Forward Voltage
All
I = 16 mA
F
−
−1.7
−
mV/°C
DV /DT
F
A
DETECTOR
Logic High Output
Current
All
I = 0 mA, V = V = 5.5 V, T = 25°C
−
−
0.0007
0.0019
0.5
1
mA
F
O
CC
A
6N135M,
6N136M,
HCPL4503M
I = 0 mA, V = V = 15 V, T = 25°C
F O CC A
I
OH
All
I = 0 mA, V = V = 15 V
−
−
−
50
F
O
CC
Logic Low Supply
Current
6N135M,
6N136M,
HCPL4503M
I = 16 mA, V = Open, V = 15 V
163
200
mA
mA
F
O
CC
I
CCL
HCPL2530M,
HCPL2531M
I
= I = 16 mA, V = Open,
CC
−
−
−
400
2
F1
V
F2
O
= 15 V
I
Logic High Supply
Current
6N135M,
6N136M,
HCPL4503M
I = 0 mA, V = Open, V = 15 V
F
0.0004
CCH
O
CC
HCPL2530M, I = 0 mA, V = Open, V = 15 V
−
−
4
F
O
CC
HCPL2531M
TRANSFER CHARACTERISTICS (T = 0°C to 70°C unless otherwise specified.)
A
COUPLED
CTR
Current Transfer Ratio
(Note 7)
6N135M,
I = 16 mA, V = 0.4 V, V = 4.5 V,
A
7
38
38
50
50
%
%
F
O
CC
HCPL2530M
T = 25°C
6N136M,
19
HCPL4503M,
HCPL2531M
6N135M
I = 16 mA, V = 4.5 V
V
= 0.4 V
= 0.5 V
= 0.4 V
5
−
−
−
−
%
%
F
CC
OL
OL
OL
HCPL2530M
V
V
6N136M,
HCPL4503M
15
HCPL2531M
6N135M
V
= 0.5 V
OL
V
OL
Logic LOW Output
Voltage
I = 16 mA, I = 1.1 mA, V = 4.5 V,
−
−
0.12
0.20
0.4
0.5
0.4
V
F
A
O
CC
T = 25°C
HCPL2530M
6N136M,
HCPL4503M
I = 16 mA, I = 3 mA, V = 4.5 V,
F O CC
T = 25°C
A
HCPL2531M
0.5
0.5
6N135M,
HCPL2530M
I = 16 mA, I = 0.8 mA, V = 4.5 V
−
−
0.11
0.18
F
O
CC
HCPL4503M, I = 16 mA, I = 2.4 mA, V = 4.5 V
HCPL2531M
0.5
F
O
CC
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Single−Channel: 6N135M, 6N136M, HCPL4503M Dual−Channel: HCPL2530M,
HCPL2531M
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Device
Test Conditions
Min
−
Typ
Max
1.5
Unit
ms
SWITCHING CHARACTERISTICS (T = 0°C to 70°C unless otherwise specified.)
A
t
Propagation Delay Time
to Logic LOW
6N135M
T = 25°C, R = 4.1 kW, I = 16 mA
0.23
0.25
0.25
PHL
A
L
F
(Note 8) (Figure 14)
HCPL2530M
6N136M,
HCPL4503M
T = 25°C, R = 1.9 kW, I = 16 mA
−
0.8
ms
A
L
F
(Note 9) (Figure 14)
HCPL2531M
0.28
6N135M,
R = 4.1 kW, I = 16 mA (Note 8)
−
−
−
2.0
1.0
ms
ms
L
F
HCPL2530M
(Figure 14)
6N136M,
HCPL4503M, (Figure 14)
HCPL2531M
R = 1.9 kW, I = 16 mA (Note 9)
−
L
F
t
Propagation Delay Time
to Logic HIGH
6N135M
T = 25°C, R = 4.1 kW, I = 16 mA
−
−
0.45
0.29
0.26
1.5
0.8
ms
ms
PLH
A
L
F
(Note 8) (Figure 14)
HCPL2530M
6N136M,
HCPL4503M
T = 25°C, R = 1.9 kW, I = 16 mA
A
L
F
(Note 9) (Figure 14)
HCPL2531M
0.18
6N135M,
R = 4.1 kW, I = 16 mA (Note 8)
−
−
−
2.0
1.0
ms
ms
L
F
HCPL2530M
(Figure 14)
6N136M,
HCPL4503M, (Figure 14)
HCPL2531M
R = 1.9 kW, I = 16 mA (Note 9)
−
L
F
|CM |
Common Mode
Transient Immunity
at Logic High
6N135M,
−
−
10,000
10,000
−
−
−
V/ms
I = 0 mA, V = 10 V , R = 4.1 kW,
A
H
F
CM
P−P
L
HCPL2530M
T = 25°C (Note 10) (Figure 15)
6N136M,
HCPL2531M
I = 0 mA, V = 10 V , R = 1.9 kW,
F CM P−P L
T = 25°C (Note 10) (Figure 15)
A
I = 0 mA, V = 1,500 V ,
P−P
15,000 50,000
F
CM
R = 4.1 kW, T = 25°C (Note 10)
L
A
HCPL4503M
(Figure 15)
|CM |
Common Mode
Transient Immunity
at Logic Low
6N135M,
−
−
10,000
10,000
−
−
−
V/ms
I = 16 mA, V = 10 V , R = 4.1 kW,
A
L
F
CM
P−P
L
HCPL2530M
T = 25°C (Note 10) (Figure 16)
6N136M,
HCPL2531M
I = 16 mA, V = 10 V , R = 1.9 kW
F CM P−P L
(Note 10) (Figure 15)
I = 16 mA, V = 1,500 V ,
P−P
HCPL4503M
15,000 50,000
F
CM
R = 4.1 kW, T = 25°C (Note 10)
L
A
(Figure 15)
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Single−Channel: 6N135M, 6N136M, HCPL4503M Dual−Channel: HCPL2530M,
HCPL2531M
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Device
Test Conditions
Min
Typ
Max
Unit
ISOLATION CHARACTERISTICS (T = 25°C, unless otherwise noted.)
A
V
ISO
Withstand Isolation Test
Voltage
All
RH ≤ 50%, I
≤ 10 mA
5,000
−
−
VAC
RMS
I−O
t = 1 minute,
f = 50 Hz (Note 11) (Note 13)
11
R
C
I
Resistance
All
All
V
= 500 V (Note 11)
−
−
−
−
−
10
−
−
−
−
−
W
pF
nA
W
I−O
I−O
I−I
I−O
DC
(Input to Output)
Capacitance
(Input to Output)
f = 1 MHz, V
= 0 V (Note 11)
1
I−O
DC
Input−Input Insulation
Leakage Current
HCPL2530M, RH ≤ 45%, V = 500 V , t = 5 s
HCPL2531M
<1
I−I
DC
(Note 12)
12
R
Input−Input Resistance
HCPL2530M,
HCPL2531M
V
I−I
= 500 V (Note 12)
10
I−I
I−I
DC
C
Input−Input
Capacitance
HCPL2530M, f = 1 MHz (Note 12)
HCPL2531M
0.2
pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. Current Transfer Ratio is defined as a ratio of output collector current, I , to the forward LED input current, I , times 100%.
O
F
8. The 4.1 kW load represents 1 LSTTL unit load of 0.36 mA and 6.1 kW pull−up resistor.
9. The 1.9 kW load represents 1 TTL unit load of 1.6 mA and 5.6 kW pull−up resistor.
10.Common mode transient immunity in logic high level is the maximum tolerable (positive) dV /dt on the leading edge of the common mode
cm
pulse signal, V , to assure that the output will remain in a logic high state (i.e., V > 2.0 V).
CM
O
Common mode transient immunity in logic low level is the maximum tolerable (negative) dV /dt on the trailing edge of the common mode
cm
pulse signal, V , to assure that the output will remain in a logic low state (i.e., V < 0.8 V).
CM
O
11. Device is considered a two terminal device: pins 1, 2, 3 and 4 are shorted together and pins 5, 6, 7 and 8 are shorted together.
12.Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
13.5000 V
for 1 minute duration is equivalent to 6000 V
for 1 second duration.
RMS
RMS
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Single−Channel: 6N135M, 6N136M, HCPL4503M Dual−Channel: HCPL2530M,
HCPL2531M
TYPICAL PERFORMANCE CURVES
(For single−channel devices; 6N135M, 6N136M, and HCPL4503M.)
1.6
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
V
V
= 0.4 V
I = 16 mA
F
O
Normalized to:
I = 16 mA
Normalized to:
T = 25°C
= 5 V
V
CC
= 4.5 V
CC
F
A
T = 25°C
A
V = 0.4 V
O
0.1
1
10
100
−40 −20
0
20
40
60
80
100 120
I , FORWARD CURRENT (mA)
F
T , TEMPERATURE (°C)
A
Figure 2. Normalized CTR vs. Forward Current
Figure 3. Normalized CTR vs. Temperature
25
1000
T = 25°C
CC
I = 0 mA
F
A
V
I = 40 mA
F
= 5 V
V
CC
= 5.5 V
20
15
10
5
V
O
= 5.5 V
35 mA
100
10
1
30 mA
25 mA
20 mA
15 mA
10 mA
5 mA
0
0.1
0
2
4
6
8
10 12 14 16 18 20
−40 −20
0
20
40
60
80
100 120
V , OUTPUT VOLTAGE (V)
O
T , TEMPERATURE (°C)
A
Figure 4. Output Current vs. Output Voltage
Figure 5. Logic High Output Current vs. Temperature
800
Frequency = 10 kHz
Duty Cycle = 10%
Frequency = 10 kHz
Duty Cycle = 10%
700
600
500
400
300
200
100
0
R = 4.1 kW (t
)
)
L
PLH
V
CC
= 5 V
V
CC
= 5 V
1000
I = 16 mA (t
)
F
PLH
I = 10 mA (t
)
F
PLH
R = 1.9 kW (t
L
PLH
I = 10 mA (t
)
F
PHL
R = 4.1 kW (t
L
)
PHL
I = 16 mA (t
)
F
PHL
R = 1.9 kW (t
L
)
PHL
100
−40 −20
0
20
40
60
80
100 120
1
10
T , TEMPERATURE (°C)
A
R , LOAD RESISTANCE (kW)
L
Figure 6. Propagation Delay vs. Temperature
Figure 7. Propagation Delay vs. Load Resistance
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Single−Channel: 6N135M, 6N136M, HCPL4503M Dual−Channel: HCPL2530M,
HCPL2531M
TYPICAL PERFORMANCE CURVES
(For dual−channel devices; HCPL2530M and HCPL2531M.)
1.6
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
V
V
= 0.4 V
I = 16 mA
F
O
Normalized to:
I = 16 mA
Normalized to:
T = 25°C
= 5 V
V
CC
= 4.5 V
CC
F
A
T = 25°C
A
V = 0.4 V
O
0.1
1
10
100
−40 −20
0
20
40
60
80
100 120
I , FORWARD CURRENT (mA)
F
T , TEMPERATURE (°C)
A
Figure 8. Normalized CTR vs. Forward Current
Figure 9. Normalized CTR vs. Temperature
20
1000
T = 25°C
CC
I = 0 mA
F
A
V
= 5 V
V
CC
= 5.5 V
V
O
= 5.5 V
15
10
5
100
10
1
I = 40 mA
F
35 mA
30 mA
25 mA
20 mA
15 mA
10 mA
5 mA
0
0.1
0
2
4
6
8
10 12 14 16 18 20
−40 −20
0
20
40
60
80
100 120
V , OUTPUT VOLTAGE (V)
O
T , TEMPERATURE (°C)
A
Figure 10. Output Current vs. Output Voltage
Figure 11. Logic High Output Current vs.
Temperature
600
Frequency = 10 kHz
Duty Cycle = 10%
Frequency = 10 kHz
Duty Cycle = 10%
500
400
300
200
100
0
V
= 5 V
V
= 5 V
CC
CC
R = 4.1 kW (t
)
1000
L
PLH
T = 25°C
A
R = 1.9 kW (t
L
)
PHL
I = 10 mA (t
)
)
F
PHL
I = 16 mA (t
F
PHL
R = 1.9 kW (t
L
)
PLH
R = 4.1 kW (t
)
L
PHL
I = 10 mA (t
)
F
PLH
I = 16 mA (t
)
F
PLH
100
−40 −20
0
20
40
60
80
100 120
1
10
T , TEMPERATURE (°C)
A
R , LOAD RESISTANCE (kW)
L
Figure 12. Propagation Delay vs. Temperature
Figure 13. Propagation Delay vs. Load Resistance
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Single−Channel: 6N135M, 6N136M, HCPL4503M Dual−Channel: HCPL2530M,
HCPL2531M
TEST CIRCUIT
Pulse
Generator
tr = 5 ns
Noise
Shield
Noise
Shield
+
VCC
VCC
IF
+5 V
+5 V
Pulse
Generator
tr = 5 ns IF
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
Z
= 50 W
O
RL
VF1
+
VB
V01
−
10% DUTY CYCLE
I/f < 100 mS
VO
Z
= 50 W
RL
O
10% D.C.
I/f < 100 ms
VF
−
CL = 15 pF
VO
V02
−
VO
IF
VF2
+
0.1 mF
0.1 mF
MONITOR
IF Monitor
GND
Rm
Rm
CL = 15 pF
GND
Test Circuit for 6N135M, 6N136M, and HCPL4503M
Test Circuit for HCPL2530M and HCPL2531M
IF
0
5 V
VO
1.5 V
1.5 V
VOL
TPHL
TPLH
Figure 14. Switching Time Test Circuit
IF
Noise
Shield
Noise
Shield
VCC
VCC
+
+5 V
+5 V
VO
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
IF
RL
VF1
+
VB
V01
−
RL
A
VF
−
A
VO
V02
−
0.1 mF
B
VO
0.1 mF
B
VFF
VF2
+
VFF
GND
GND
–
VCM
+
−
VCM
−
+
Pulse Gen
Pulse Gen
Test Circuit for 6N135M, 6N136M, and HCPL4503M
Test Circuit for HCPL2530M and HCPL2531M
VCM 10 V
90% 90%
10%
tr
10%
tf
0 V
VO
5 V
VOL
Switch at A: I = 0 mA
F
VO
Switch at A: I = 16 mA
F
Figure 15. Common Mode Immunity Test Circuit
www.onsemi.com
9
Single−Channel: 6N135M, 6N136M, HCPL4503M Dual−Channel: HCPL2530M,
HCPL2531M
REFLOW PROFILE
Max. Ramp−up Rate = 3°C/S
Max. Ramp−down Rate = 6°C/S
TP
260
tP
240
TL
220
Tsmax
Tsmin
200
180
160
140
120
100
80
tL
Preheat Area
t s
60
40
20
0
120
240
360
Time 25°C to Peak
Time (seconds)
Profile Freature
Temperature Min. (Tsmin)
Temperature Max. (Tsmax)
Time (t ) from (Tsmin to Tsmax)
Pb−Free Assembly Profile
150°C
200°C
60 to 120 s
S
Ramp−up Rate (t to t )
3°C/second maximum
217°C
L
P
Liquidous Temperature (T )
L
Time (t ) Maintained Above (T )
60 to 150 s
L
L
Peak Body Package Temperature
Time (t ) within 5°C of 260°C
260°C +0°C / –5°C
30 s
P
Ramp−down Rate (T to T )
6°C/s maximum
8 minutes maximum
P
L
Time 25°C to Peak Temperature
Figure 16. Reflow Profile
www.onsemi.com
10
Single−Channel: 6N135M, 6N136M, HCPL4503M Dual−Channel: HCPL2530M,
HCPL2531M
ORDERING INFORMATION
†
Part Number
Package
Shipping
6N135M
PDIP8 9.655x6.61, 2.54P
50 Units / Tube
50 Units / Tube
DIP 8−Pin
6N135SM
PDIP8 GW
SMT 8−Pin (Lead Bend)
6N135SDM
6N135VM
PDIP8 GW
1,000 / Tape and Reel
50 Units / Tube
SMT 8−Pin (Lead Bend)
PDIP8 9.655x6.61, 2.54P
DIP 8−Pin, DIN IEC60747−5−5 Option
6N135SVM
6N135SDVM
6N135TVM
6N135TSVM
6N135TSR2VM
PDIP8 GW
50 Units / Tube
SMT 8−Pin (Lead Bend), DIN EN/IEC 60747−5−5 Option
PDIP8 GW
1,000 / Tape and Reel
50 Units / Tube
SMT 8−Pin (Lead Bend), DIN EN/IEC 60747−5−5 Option
PDIP8 6.6x3.81, 2.54P
DIP 8−Pin, 0.4” Lead Spacing, DIN EN/IEC 60747−5−5 Option
PDIP8 GW
50 Units / Tube
SMT 8−Pin, 0.4” Lead Spacing, DIN EN/IEC 60747−5−5 Option
PDIP8 GW
1,000 / Tape and Reel
SMT 8−Pin, 0.4” Lead Spacing, DIN EN/IEC 60747−5−2 Option
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NOTE: The product orderable part number system listed in this table also applies to the 6N136M, HCPL4503M, HCPL2530M and
HCPL2531M product families.
www.onsemi.com
11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 6.6x3.81, 2.54P
CASE 646BW
ISSUE O
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13445G
PDIP8 6.6X3.81, 2.54P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 9.655x6.6, 2.54P
CASE 646CQ
ISSUE O
DATE 18 SEP 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13446G
PDIP8 9.655X6.6, 2.54P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 GW
CASE 709AC
ISSUE O
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13447G
PDIP8 GW
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 GW
CASE 709AD
ISSUE O
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13448G
PDIP8 GW
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
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Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
ADDITIONAL INFORMATION
TECHNICAL PUBLICATIONS:
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