HCPL2630 [ONSEMI]
8 引脚 DIP 双沟道 10 MB/s 逻辑门极输出光耦合器（不建议用于新设计，新的对等零件编号为 HCPL26xxM）;
| 型号： | HCPL2630 |
| 厂家： | 
ONSEMI |
| 描述： | 8 引脚 DIP 双沟道 10 MB/s 逻辑门极输出光耦合器（不建议用于新设计，新的对等零件编号为 HCPL26xxM） 输出元件 光电 |
| 文件： | 总14页 (文件大小：404K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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High-Speed 10 MBit/s
Logic Gate Optocouplers
PDIP8 6.6x3.81, 2.54P
CASE 646BW
8
1
Single-Channel: 6N137,
HCPL2601, HCPL2611
Dual-Channel: HCPL2630,
HCPL2631
PDIP8 9.655x6.6, 2.54P
CASE 646CQ
8
8
1
1
Description
The 6N137, HCPL2601, HCPL2611 single−channel and
HCPL2630, HCPL2631 dual−channel optocouplers consist of a
850 nm AlGaAS LED, optically coupled to a very high speed
integrated photo−detector logic gate with a strobable output. This
output features an open collector, thereby permitting wired OR
outputs. The coupled parameters are guaranteed over the temperature
range of −40°C to +85°C. A maximum input signal of 5 mA will
provide a minimum output sink current of 13 mA (fan out of 8).
An internal noise shield provides superior common mode rejection
of typically 10 kV/ꢀ s. The HCPL2601 and HCPL2631 has a minimum
CMR of 5 kV/ꢀ s. The HCPL2611 has a minimum CMR of 10 kV/ꢀ s.
PDIP8 GW
CASE 709AC
MARKING DIAGRAM
ON
2601
VXXYYT1
2601
V
= Device Number
Features
= VDE mark (Note: Only Appears on
Parts Ordered with VDE Option – See
Order Entry Table)
= Two−Digit Year Code, e.g., ‘03’
= Two−Digit Work Week, Ranging from
‘01’ to ‘53’
• Very High Speed – 10 MBit/s
• Superior CMR – 10 kV/ꢀ s
• Double working voltage − 480 V
• Fan−out of 8 Over −40°C to +85°C
• Logic Gate Output
• Strobable Output
• Wired OR−open Collector
• U.L. Recognized (File # E90700)
XX
YY
T1
= Assembly Package Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 10 of
this data sheet.
Applications
• Ground Loop Elimination
• LSTTL to TTL, LSTTL or 5−volt CMOS
• Line Receiver, Data Transmission
• Data Multiplexing
• Switching Power Supplies
• Pulse Transformer Replacement
• Computer−peripheral Interface
© Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
August, 2021 − Rev. 3
HCPL2631/D
Single−Channel: 6N137, HCPL2601, HCPL2611 Dual−Channel: HCPL2630, HCPL2631
SCHEMATICS
VCC
N/C
+
+
1
8
1
8
VCC
VF1
_
VE
V01
2
3
4
7
6
5
2
3
4
7
6
5
VF
_
_
VO
V02
VF2
+
N/C
GND
GND
6N137, HCPL2601,
HCPL2611
HCPL2630,
HCPL2631
A 0.1 ꢀ F bypass capacitor must be connected between pins 8 and 5 (Note 1).
Figure 1. Schematics
TRUTH TABLE (Positive Logic)
Input
Enable
Output
H
L
H
H
L
H
H
H
L
H
L
L
L
H
L
NC
NC
H
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2
Single−Channel: 6N137, HCPL2601, HCPL2611 Dual−Channel: HCPL2630, HCPL2631
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Value
Unit
°C
T
Storage Temperature
Operating Temperature
−55 to +125
−40 to +85
260 for 10 s
STG
OPR
T
°C
T
SOL
Lead Solder Temperature (for Wave Soldering Only)*
°C
EMITTER
I
DC/Average Forward Input Current
Single Channel
Dual Channel (Each Channel)
Single Channel
50
30
mA
V
F
V
V
Enable Input Voltage Not to Exceed V by More than
500 mV
5.5
E
CC
Reverse Input Voltage
Power Dissipation
Each Channel
Single Channel
5.0
100
45
V
R
P
mW
I
Dual Channel (Each Channel)
DETECTOR
V
Supply Voltage
Output Current
7.0
V
CC
(1 Minute Max)
I
Single Channel
Dual Channel (Each Channel)
Each Channel
25
50
7.0
85
60
mA
mA
V
O
V
P
Output Voltage
O
Collector Output Power Dissipation
Single Channel
mW
O
Dual Channel (Each Channel)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*For peak soldering reflow, please refer to the Reflow Profile on page 9.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
0
Max
250
15
Unit
ꢀ A
mA
V
I
FL
Input Current, Low Level
Input Current, High Level
Supply Voltage, Output
Enable Voltage, Low Level
Enable Voltage, High Level
Low Level Supply Current
Fan Out (TTL Load)
I
FH
*6.3
4.5
0
V
CC
5.5
0.8
V
EL
V
V
EH
2.0
−40
−
V
CC
V
T
A
+85
8
°C
N
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
*6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less.
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3
Single−Channel: 6N137, HCPL2601, HCPL2611 Dual−Channel: HCPL2630, HCPL2631
ELECTRICAL CHARACTERISTICS (T = 0°C to 70°C unless otherwise specified)
A
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
INDIVIDUAL COMPONENT CHARACTERISTICS
EMITTER
V
Input Forward Voltage
I = 10 mA
−
−
−
1.4
−
1.8
1.75
−
V
V
F
F
T = 25°C
A
B
VR
Input Reverse Breakdown
Voltage
I
R
= 10 ꢀ A
5.0
C
Input Capacitance
V = 0, f = 1 MHz
−
−
60
−
−
pF
IN
F
ꢁ
V
/
ꢁ
T
Input Diode Temperature
Coefficient
I = 10 mA
F
−1.4
mV/°C
F
A
DETECTOR
I
High Level Supply Current
Low Level Supply Current
V
E
= 5.5 V, I = 0 mA,
Single Channel
Dual Channel
−
−
7
10
9
10
15
mA
mA
CCH
CC
F
V = 0.5 V
I
Single Channel
Dual Channel
V
CC
= 5.5 V, I = 10 mA
−
13
CCL
F
V = 0.5 V
E
−
14
−0.8
−0.6
−
21
I
EL
Low Level Enable Current
High Level Enable Current
High Level Enable Voltage
Low Level Enable Voltage
V
CC
V
CC
V
CC
V
CC
= 5.5 V, V = 0.5 V
−
−1.6
−1.6
−
mA
mA
V
E
I
= 5.5 V, V = 2.0 V
−
EH
E
V
= 5.5 V, I = 10 mA
2.0
−
EH
F
V
= 5.5 V, I = 10 mA (Note 3)
−
0.8
V
EL
F
SWITCHING CHARACTERISTICS (T = −40°C to +85°C, V = 5 V, I = 7.5 mA unless otherwise specified)
A
CC
F
T
Propagation Delay Time to
Output HIGH Level
R = 350 ꢂ C = 15 pF
T = 25°C
20
−
45
−
75
100
75
100
35
−
ns
ns
PLH
PHL
L
,
L
A
(Note 4) (Figure 13)
T
Propagation Delay Time to
Output LOW Level
T = 25°C (Note 5)
A
25
−
45
−
R = 350 ꢂ, C = 15 pF (Figure 13)
L
L
|T
–T
|
Pulse Width Distortion
R = 350 ꢂ, C = 15 pF (Figure 13)
−
3
ns
ns
ns
ns
PHL PLH
L
L
t
r
Output Rise Time (10–90%)
Output Rise Time (90–10%)
R = 350 ꢂ, C = 15 pF (Note 6) (Figure 13)
−
50
12
20
L
L
t
f
R = 350 ꢂ, C = 15 pF (Note 7) (Figure 13)
−
−
L
L
t
t
Enable Propagation Delay
Time to Output HIGH Level
I = 7.5 mA, V = 3.5 V, R = 350 ꢂ, C = 15 pF
−
−
ELH
F
EH
L
L
(Note 8) (Figure 14)
Enable Propagation Delay
Time to Output LOW Level
I = 7.5 mA, V = 3.5 V, R = 350 ꢂ, C = 15pF
−
−
20
−
−
−
ns
EHL
F
EH
L
L
(Note 9) (Figure 14)
|CM |
Common Mode Transient
Immunity (at Output HIGH
Level)
T = 25°C, |V | = 50 V 6N137, HCPL2630
10,000
10,000
V/ꢀ s
H
A
CM
(Peak), I = 0 mA,
F
V
OH
(Min.) = 2.0 V,
HCPL2601, HCPL2631
HCPL2611
5000
R = 350 ꢂ (Note 10)
L
(Figure 15)
|V | = 400 V
CM
10,000 15,000
−
−
V/ꢀ s
|CM |
Common Mode Transient
Immunity (at Output LOW
Level)
R = 350 ꢂ, I = 7.5 mA, 6N137, HCPL2630
−
10,000
L
L
OL
F
V
(Max.) = 0.8 V,
T = 25°C (Note 11)
A
HCPL2601, HCPL2631
5000
10,000
−
−
(Figure 15)
|V | = 400 V
CM
HCPL2611
10,000 15,000
TRANSFER CHARACTERISTICS (T = −40°C to +85°C unless otherwise specified)
A
I
HIGH Level Output Current
LOW Level Output Current
Input Threshold Current
V
= 5.5 V, V = 5.5 V, I = 250 ꢀ A, V = 2.0V
−
−
−
−
.35
3
100
0.6
5
ꢀ A
V
OH
CC
O
F
E
(Note 2)
V
V
CC
(Note 2)
= 5.5 V, I = 5 mA, V = 2.0 V, I = 13 mA
OL
F
E
CL
I
V
CC
= 5.5 V, V = 0.6 V, V = 2.0 V, I = 13 mA
mA
FT
O
E
OL
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Single−Channel: 6N137, HCPL2601, HCPL2611 Dual−Channel: HCPL2630, HCPL2631
ELECTRICAL CHARACTERISTICS (T = 0°C to 70°C unless otherwise specified) (continued)
A
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
ISOLATION CHARACTERISTICS (T = −40°C to +85°C unless otherwise specified)
A
I
Input−Output Insulation
Relative Humidity = 45%, T = 25°C, t = 5 s,
I−O
−
−
−
1.0*
ꢀ A
I−O
A
Leakage Current
V
= 3000 VDC (Note 12)
V
Withstand Insulation Test
Voltage
RH < 50%, T = 25°C, I
≤ 2 ꢀ A, t = 1 min.
2500
−
V
RMS
ISO
A
I−O
(Note 12)
12
R
C
Resistance (Input to Output)
V
= 500 V (Note 12)
−
−
10
−
−
ꢂ
I−O
I−O
I−O
Capacitance (Input to Output) f = 1 MHz (Note 12)
0.6
pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
*All Typicals at V = 5 V, T = 25°C
CC
A
1. The V supply to each optoisolator must be bypassed by a 0.1ꢀ F capacitor or larger. This can be either a ceramic or solid tantalum capacitor
CC
with good high frequency characteristic and should be connected as close as possible to the package V and GND pins of each device.
CC
2. Each channel.
3. Enable Input – No pull up resistor required as the device has an internal pull up resistor.
4. t
– Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V level on
PLH
the LOW to HIGH transition of the output voltage pulse.
5. t – Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V level on
PHL
the HIGH to LOW transition of the output voltage pulse.
6. t – Rise time is measured from the 10% to the 90% levels on the LOW to HIGH transition of the output pulse.
r
7. t – Fall time is measured from the 90% to the 10% levels on the HIGH to LOW transition of the output pulse.
f
8. t
– Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input voltage pulse to the 1.5 V
ELH
level on the LOW to HIGH transition of the output voltage pulse.
9. t – Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input voltage pulse to the 1.5 V
EHL
level on the HIGH to LOW transition of the output voltage pulse.
10.CM – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the HIGH state (i.e., V
> 2.0 V).
H
OUT
Measured in volts per microsecond (V/ꢀ s).
11. CM – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the LOW output state (i.e.,
L
OUT
V
< 0.8 V). Measured in volts per microsecond (V/ꢀ s).
12.Device considered a two−terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted together.
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Single−Channel: 6N137, HCPL2601, HCPL2611 Dual−Channel: HCPL2630, HCPL2631
TYPICAL PERFORMANCE CURVES
0.8
Conditions:
30
16
10
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
I = 5 mA
F
V
V
= 2 V
E
= 5.5 V
CC
I
OL
= 12.8 mA
1
0.1
I
OL
= 16 mA
I
OL
= 6.4 mA
I
OL
= 9.6 mA
0.01
0.001
−40
−20
0
20
40
60
80
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
T , AMBIENT TEMPERATURE (°C)
A
V , FORWARD VOLTAGE (V)
F
Figure 2. Low Level Output Voltage vs.
Ambient Temperature
Figure 3. Input Diode Forward Voltage vs.
Forward Current
120
100
80
60
40
20
0
50
V
= 5 V
I = 15 mA
CC
F
45
40
35
30
25
20
I = 10 mA
F
R = 4 kꢂ (T
)
)
L
PLH
I = 5 mA
F
R = 1 kꢂ (T
L
PLH
Conditions:
V
V
V
= 5 V
= 2 V
= 0.6 V
CC
R = 1 k
ꢂ
L
R = 350 ꢂ (t
L
)
PLH
E
R = 4 kꢂ (T
)
L
PHL
OL
R = 350 k
L
ꢂ
5
7
9
11
13
15
−40
−20
0
20
40
60
80
I , FORWARD CURRENT (mA)
F
T , AMBIENT TEMPERATURE (°C)
A
Figure 4. Switching Time vs. Forward Current
Figure 5. Low Level Output vs.
Ambient Temperature
6
5
4
3
2
1
0
4
Conditions:
V
CC
V
OL
= 5.0 V
= 0.6 V
3
2
1
R = 350
ꢂ
R = 1 kꢂ
L
L
R = 1 k
ꢂ
L
R = 4 k
ꢂ
L
R = 4 k
ꢂ
R = 350
ꢂ
L
L
−40
−20
0
20
40
60
80
0
1
2
3
4
5
6
T , AMBIENT TEMPERATURE (°C)
A
I , FORWARD CURRENT (mA)
F
Figure 6. Input Threshold Current vs.
Ambient Temperature
Figure 7. Output Voltage vs. Input Forward Current
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Single−Channel: 6N137, HCPL2601, HCPL2611 Dual−Channel: HCPL2630, HCPL2631
TYPICAL PERFORMANCE CURVES (Continued)
80
60
40
20
0
600
500
400
300
200
100
0
R = 4 kꢂ (tr)
L
R = 4 k
ꢂ
L
Conditions:
I = 7.5 mA
Conditions:
I = 7.5 mA
F
F
V
CC
= 5 V
V
CC
= 5 V
R = 1 k
ꢂ
L
R = 4 k
ꢂ
(tf)
L
]
R = 350
L
ꢂ
R = 1 k
ꢂ
L
R = 1 kꢂ (tr)
L
R = 350 ꢂ (tr)
L
R = 350
L
ꢂ
−60 −40 −20
0
20
40
60
80
100
−60 −40 −20
0
20
40
60
80
100
T , TEMPERATURE (°C)
A
T , TEMPERATURE (°C)
A
Figure 8. Pulse Width Distortion vs. Temperature
Figure 9. Rise and Fall Time vs. Temperature
120
100
120
R = 4 kꢂ TPLH
L
100
80
60
40
20
R = 4 kꢂ (TELH)
L
80
60
40
20
0
R = 1 k
ꢂ
L
R = 4 k
R = 350
L
ꢂ
TPHL
L
]
ꢂ
R = 350
ꢂ
L
R = 1 k
ꢂ
(TEHL)
L
]
R = 4 k
ꢂ
L
R = 1 kꢂ (TELH)
L
R = 1 kꢂ TPLH
L
R = 350 ꢂ (TELH)
L
R = 350 ꢂ TPLH
L
−60 −40 −20
0
20
40
60
80
100
−60 −40 −20
0
20
40
60
80
100
T , TEMPERATURE (°C)
A
T , TEMPERATURE (°C)
A
Figure 10. Enable Propagation Delay vs. Temperature
Figure 11. Switching Time vs. Temperature
20
Conditions:
V
V
V
= 5.5 V
= 5.5 V
= 2.0 V
CC
O
15
10
5
E
I = 250 ꢀ A
F
0
−60 −40 −20
0
20
40
60
80
100
T , TEMPERATURE (°C)
A
Figure 12. High Level Output Current vs. Temperature
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Single−Channel: 6N137, HCPL2601, HCPL2611 Dual−Channel: HCPL2630, HCPL2631
TEST CIRCUITS
Pulse
Generator
tr = 5 ns
+5 V
Z
O
= 50 ꢂ
IF = 7.5 mA
VCC
IF = 3.75 mA
Input
(IF)
1
2
3
4
8
7
6
5
tPHL
tPLH
Output
(VO)
.1 ꢀ F
bypass
RL
CL
1.5 V
Output
(VO)
Input
90%
10%
Monitor
(IF)
Output
(VO)
47
GND
tf
tr
Figure 13. Test Circuit and Waveforms for tPLH, tPHL, tr and tf
Pulse
Generator
tr = 5 ns
Input
Monitor
(V )
E
Z
O
= 50 ꢂ
+5 V
3.0 V
1.5 V
Input
(VE)
VCC
1
2
8
7
tEHL
tELH
7.5 mA
Output
(VO)
RL
CL
.1 ꢀ F
bypass
1.5 V
Output
(VO)
3
4
6
5
GND
Figure 14. Test Circuit tEHL and tELH
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Single−Channel: 6N137, HCPL2601, HCPL2611 Dual−Channel: HCPL2630, HCPL2631
TEST CIRCUITS (Continued)
VCC
1
2
3
4
8
7
6
5
+5 V
IF
.1 ꢀ F
bypass
350
ꢂ
A
B
Output
(VO)
VFF
GND
VCM
Pulse Gen
Peak
VCM
0 V
5 V
VO
CMH
Switching Pos. (A), IF = 0
VO (Min)
V (Max)
O
Switching Pos. (B), IF = 7.5 mA
VO
CML
0.5 V
Figure 15. Test Circuit Common Mode Transient Immunity
REFLOW PROFILE
300
215C, 10–30 s
250
225C peak
200
150
Time above 183C, 60–150 s
Ramp up = 3C/s
100
50
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
Time (Minute)
• Peak reflow temperature: 225C (package surface temperature)
• Time of temperature higher than 183C for 60–150 seconds
• One time soldering reflow is recommended
Figure 16. Reflow Profile
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Single−Channel: 6N137, HCPL2601, HCPL2611 Dual−Channel: HCPL2630, HCPL2631
ORDERING INFORMATION
†
Option
Example Part Number
Description
S
6N137S
PDIP8 GW, CASE 709AC
Surface Mount Lead Bend
SD
W
6N137SD
6N137W
PDIP8 GW, CASE 709AC
Surface Mount; Tape and Reel
PDIP8 6.6x3.81, 2.54P, CASE 646BW
0.4” Lead Spacing
V
6N137V
PDIP8 9.655x6.6, 2.54P, CASE 646CQ
VDE0884
WV
SV
SDV
6N137WV
6N137SV
6N137SDV
PDIP8 6.6x3.81, 2.54P, CASE 646BW
VDE0884; 0.4” Lead Spacing
PDIP8 GW, CASE 709AC
VDE0884; Surface Mount
PDIP8 GW, CASE 709AC
VDE0884; Surface Mount; Tape and Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 6.6x3.81, 2.54P
CASE 646BW
ISSUE O
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13445G
PDIP8 6.6X3.81, 2.54P
PAGE 1 OF 1
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the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
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© Semiconductor Components Industries, LLC, 2019
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 9.655x6.6, 2.54P
CASE 646CQ
ISSUE O
DATE 18 SEP 2017
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DOCUMENT NUMBER:
DESCRIPTION:
98AON13446G
PDIP8 9.655X6.6, 2.54P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 GW
CASE 709AC
ISSUE O
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13447G
PDIP8 GW
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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