HCPL2731M [ONSEMI]
8 引脚 DIP 双沟道低输入电流、高增益分割达林顿输出光耦合器;
| 型号： | HCPL2731M |
| 厂家： | 
ONSEMI |
| 描述： | 8 引脚 DIP 双沟道低输入电流、高增益分割达林顿输出光耦合器 PC 输出元件 光电 |
| 文件： | 总15页 (文件大小：344K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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8-Pin DIP Low Input Current
High Gain Split Darlington
Optocouplers
PDIP8 6.6x3.81, 2.54P
CASE 646BW
8
1
Single-Channel: 6N138M,
6N139M
Dual-Channel: HCPL2730M,
HCPL2731M
PDIP8 9.655x6.6, 2.54P
CASE 646CQ
8
8
1
1
Description
The single−channel, 6N138M, 6N139M and dual−channel
HCPL2730M, HCPL2731M optocouplers consist of an AlGaAs LED
optically coupled to a high gain split darlington photodetector.
The split darlington configuration separating the input photodiode
and the first stage gain from the output transistor permits lower output
saturation voltage and higher speed operation than possible with
conventional darlington phototransistor optocoupler. In the dual
channel devices, HCPL2730M and HCPL2731M, an integrated
emitter−base resistor provides superior stability over temperature.
The combination of a very low input current of 0.5 mA and a high
current transfer ratio of 2000% makes this family particularly useful
for input interface to MOS, CMOS, LSTTL and EIA RS232C, while
output compatibility is ensured to CMOS as well as high fan−out TTL
requirements. An internal noise shield provides exceptional common
mode rejection of 10 kV/ms.
PDIP8 GW
CASE 709AC
MARKING DIAGRAM
6N138
VXXYYB
6N138
V
= Device Number
= DIN EN/IEC60747−5−5 Option (only
appears on component ordered with
this option)
= Two−Digit Year Code, e.g., ‘16’
= Two−Digit Work Week, Ranging from
‘01’ to ‘53’
XX
YY
Features
• Low Current – 0.5 mA
• Superior CTR – 2000%
B
= Assembly Package Code
• Superior CMR – 10 kV/ms
• CTR Guaranteed 0 to 70°C
• Dual Channel – HCPL2730M, HCPL2731M
• Safety and Regulatory Approvals
ORDERING INFORMATION
See detailed ordering and shipping information on page 11 of
this data sheet.
• UL1577, 5,000 VAC
for 1 Minute
RMS
• DIN EN/IEC60747−5−5
• These are Pb−Free Devices
Applications
Related Resources
• Digital Logic Ground Isolation
• Telephone Ring Detector
• EIA−RS−232C Line Receiver
• High Common Mode Noise Line Receiver
• mP Bus Isolation
• https://www.onsemi.com/products/interfaces/
high−performance−optocouplers/high−per-
formance−transistor−optocouplers
• https://www.onsemi.com/products/interfaces/
high−performance−optocouplers/high−per-
formance−transistor−optocouplers/hcpl0700
• Current Loop Receiver
• https://www.onsemi.com/products/interfaces/
high−performance−optocouplers/high−per-
formance−transistor−optocouplers/hcpl0731
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
October, 2022 − Rev. 2
HCPL2731/D
Single−Channel: 6N138M, 6N139M Dual−Channel: HCPL2730M, HCPL2731M
1
8
V
N/C
+
VCC
8
1
CC
VF1
_
+
2
3
4
7 VB
2
3
7 VO1
VF
_
_
VO
6
6 VO2
VF2
+
5 GND
N/C
4
5
GND
HCPL2730M / HCPL2731M
6N138M / 6N139M
Figure 1. Schematics
SAFETY AND INSULATION RATINGS (As per DIN EN/IEC 60747−5−5, this optocoupler is suitable for “safe electrical insulation”
only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits.)
Parameter
Characteristics
Installation Classifications per DIN VDE 0110/1.89 Table 1, For Rated
Mains Voltage
<150 V
<300 V
<450 V
<600 V
I–IV
I–IV
RMS
RMS
RMS
RMS
I–III
I–III
<1,000 V
(Option T, TS)
I−III
RMS
Climatic Classification
40/100/21
2
Pollution Degree (DIN VDE 0110/1.89)
Comparative Tracking Index
175
Symbol
Parameter
Value
Unit
V
PR
Input−to−Output Test Voltage, Method A, V
x 1.6 = V , Type and Sample Test with
2,262
V
peak
IORM
PR
t
m
= 10 s, Partial Discharge < 5 pC
Input−to−Output Test Voltage, Method B, V
= 1 s, Partial Discharge < 5 pC
x 1.875 = V , 100% Production Test with
2,651
V
peak
IORM
PR
t
m
V
Maximum Working Insulation Voltage
Highest Allowable Over−Voltage
External Creepage
1,414
6,000
≥8.0
V
V
IORM
peak
V
IOTM
peak
mm
mm
mm
mm
°C
External Clearance
≥7.4
External Clearance (for Option TV, 0.4” Lead Spacing)
Distance Through Insulation (Insulation Thickness)
Case Temperature (Note 1)
≥10.16
≥0.5
DTI
T
S
150
I
Input Current (Note 1)
200
mA
mW
W
S,INPUT
P
Output Power (Duty Factor ≤ 2.7%) (Note 1)
300
S,OUTPUT
9
R
Insulation Resistance at T , V = 500 V (Note 1)
>10
IO
S
IO
1. Safety limit value − maximum values allowed in the event of a failure.
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2
Single−Channel: 6N138M, 6N139M Dual−Channel: HCPL2730M, HCPL2731M
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Device
Value
Unit
°C
T
STG
Storage Temperature
Operating Temperature
Junction Temperature
Lead Solder Temperature
−40 to +125
−40 to +100
−40 to +125
260 for 10 s
T
OPR
°C
T
J
°C
T
SOL
°C
EMITTER
I (avg)
DC/Average Forward Input Current Per Channel
Peak Forward Input Current Per Channel (50% Duty Cycle, 1 ms P.W.)
Peak Transient Input Current Per Channel (≤1 ms P.W., 300 pps)
Reverse Input Voltage Per Channel
All
All
All
All
All
20
40
1
mA
mA
A
F
I (pk)
F
I (trans)
F
V
R
P
D
5
V
Input Power Dissipation Per Channel (Note 2)
35
mW
DETECTOR
(avg)
I
O
Average Output Current Per Channel
Emitter−Base Reverse Voltage
Supply Voltage, Output Voltage
All
60
0.5
mA
V
V
ER
6N138M, 6N139M
6N138M, HCPL2730M
6N139M, HCPL2731M
All
V
CC
, V
O
−0.5 to 7.0
−0.5 to 18.0
100
V
P
O
Output Power Dissipation Per Channel
mW
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. No derating required for devices operated within the T
specification (6N138M and 6N139M only).
OPR
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Single−Channel: 6N138M, 6N139M Dual−Channel: HCPL2730M, HCPL2731M
ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Device
Test Conditions
Min
Typ
Max
Unit
INDIVIDUAL COMPONENT CHARACTERISTICS (V = 5.0 V, T = 0°C to 70°C unless otherwise specified. Typical value is measured
CC
A
at T = 25°C.)
A
EMITTER
V
Input Forward Voltage
All
I = 1.6 mA, T = 25°C
−
−
1.30
−
1.70
1.75
−
V
F
F
A
I = 1.6 mA
F
BV
Input Reverse Breakdown
Voltage
All
All
I
R
= 10 mA, T = 25°C
5.0
19.0
V
R
A
DV /
DT
Temperature Coefficient of
Forward Voltage
I = 1.6 mA
F
−
−1.94
−
mV/°C
F
A
DETECTOR
I
Logic Low Supply Current
6N138M,
6N139M
I = 1.6 mA, V = Open,
−
−
0.4
1.5
3
mA
CCL
F
O
V
CC
V
CC
V
CC
= 18 V
HCPL2730M
HCPL2731M
= 7 V
I
V
= I = 1.6 mA,
1.25
F1
F2
= V = Open
O1
O2
= 18 V
I
Logic High Supply Current
6N138M,
6N139M
I = 0 mA, V = Open, V = 18 V
−
−
0.0003
0.0003
10
20
mA
CCH
F
O
CC
HCPL2730M
HCPL2731M
V
V
= 7 V
I
= I = 0 mA,
= V = Open
O2
CC
F1 F2
V
O1
= 18 V
CC
TRANSFER CHARACTERISTICS
COUPLED
CTR
Current Transfer Ratio (Note 3)
(Note 4)
6N138M
HCPL2730M
6N139M
I = 1.6 mA, V = 0.4 V,
300
400
500
−
1600
2400
2000
3500
1600
2400
0.001
−
−
%
F
O
V
CC
= 4.5 V
I = 0.5 mA, V = 0.4 V,
F
O
V
CC
= 4.5 V
HCPL2731M
6N139M
I = 1.6 mA, V = 0.4 V,
−
F
O
V
CC
= 4.5 V
HCPL2731M
6N138M
I
Logic High Output Current
I = 0 mA, V = V = 7 V
250
100
0.4
mA
OH
F
O
CC
HCPL2730M
6N139M
I = 0 mA, V = V = 18 V
−
0.0036
F
O
CC
HCPL2731M
6N138M
V
OL
Logic Low Output Voltage
(Note 4)
I = 1.6 mA, I = 4.8 mA,
−
0.06
0.05
0.05
V
F
O
V
CC
= 4.5 V
HCPL2730M
6N139M
I = 0.5 mA, I = 2 mA,
−
−
0.4
0.4
F
O
V
CC
= 4.5 V
6N139M
HCPL2731M
6N139M
I = 1.6 mA, I = 8 mA,
0.093
0.08
0.13
0.12
0.18
0.17
F
O
V
CC
= 4.5 V
I = 5 mA, I = 15 mA,
−
−
0.4
0.4
F
O
V
CC
= 4.5 V
HCPL2731M
6N139M
I = 12 mA, I = 24 mA,
F
O
V
CC
= 4.5 V
HCPL2731M
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Single−Channel: 6N138M, 6N139M Dual−Channel: HCPL2730M, HCPL2731M
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Device
Test Conditions
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (V = 5.0 V, T = 0°C to 70°C unless otherwise specified. Typical value is measured at T = 25°C.)
CC
A
A
t
Propagation Delay Time to
Logic LOW (Note 4) (Figure 14)
6N139M
−
−
0.2
0.5
2
ms
R = 270 W, I = 12 mA
PHL
L
F
HCPL2730M, R = 270 W, I = 12 mA
3
L
F
HCPL2731M
6N138M
R = 2.2 kW, I = 1.6 mA
−
−
1.0
2.5
15
25
L
F
HCPL2730M, R = 2.2 kW, I = 1.6 mA
L
F
HCPL2731M
6N139M
R = 4.7 kW, I = 0.5 mA
−
−
−
−
2.5
8.4
1.3
1.0
30
120
10
L
F
HCPL2731M R = 4.7 kW, I = 0.5 mA
L
F
t
Propagation Delay Time to
Logic HIGH (Note 4) (Figure 14)
6N139M
ms
R = 270 W, I = 12 mA
PLH
L
F
HCPL2730M, R = 270 W, I = 12 mA
15
L
F
HCPL2731M
6N138M,
R = 2.2 kW, I = 1.6 mA
−
L
F
HCPL2730M,
HCPL2731M
7.3
50
90
6N139M,
R = 4.7 kW, I = 0.5 mA
−
13.6
L
F
HCPL2731M
|CM |
Common Mode Transient
Immunity at Logic High (Note 5)
(Figure 15)
All
I = 0 mA, lV l = 10 V ,
P−P
1,000
10,000
10,000
−
−
V/ms
V/ms
H
F
CM
R = 2.2 kW, T = 25°C
L
A
|CM |
Common Mode Transient
Immunity at Logic Low (Note 5)
(Figure 15)
All
I = 1.6 mA, lV l = 10 V ,
P−P
1,000
L
F
CM
R = 2.2 kW, T = 25°C
L
A
ISOLATION CHARACTERISTICS (T = 25°C unless otherwise specified.)
A
V
Withstand Insulation Test
Voltage (Note 6) (Note 7)
All
All
All
RH ≤ 50%, T = 25°C,
I−O
5,000
−
−
−
−
−
−
−
VAC
RMS
ISO
A
I
≤ 10 mA, t = 1 min, f = 50 Hz
11
R
C
I
Resistance (Input to Output)
(Note 6)
V
I−O
= 500 V
−
−
−
−
−
10
W
pF
mA
W
I−O
I−O
I−I
DC
Capacitance (Input to Output)
(Note 6) (Note 8)
f = 1 MHz, V
= 0 V
1
I−O
Input−Input Insulation Leakage
Current (Note 9)
HCPL2730M, RH ≤ 45%, V = 500 V , t = 5 s
HCPL2731M
0.005
I−I
DC
11
R
Input−Input Resistance (Note 9) HCPL2730M,
HCPL2731M
V
I−I
= 500 V
10
I−I
I−I
DC
C
Input−Input Capacitance
(Note 9)
HCPL2730M, f = 1 MHz
HCPL2731M
0.03
pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Current Transfer Ratio is defined as a ratio of output collector current, I , to the forward LED input current, I , times 100%.
O
F
4. Pin 7 open. (6N138M and 6N139M only)
5. Common mode transient immunity in logic HIGH level is the maximum tolerable (positive) dV /dt on the leading edge of the common mode
cm
pulse signal V , to assure that the output will remain in a logic HIGH state (i.e., V > 2.0 V). Common mode transient immunity in logic LOW
CM
O
level is the maximum tolerable (negative) dV /dt on the trailing edge of the common mode pulse signal, V , to assure that the output will
cm
CM
remain in a logic LOW state (i.e., V < 0.8 V).
O
6. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
7. 5000 VAC for 1 minute duration is equivalent to 6000 VAC for 1 second duration.
RMS
RMS
8. For dual channel devices, C
is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shorted together.
I−O
9. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
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Single−Channel: 6N138M, 6N139M Dual−Channel: HCPL2730M, HCPL2731M
ELECTRICAL CHARACTERISTICS (continued)
(T = 25°C unless otherwise specified.)
A
Current Limiting Resistor Calculations:
Where:
V
V
V
V
V
= Input Supply Voltage
= Output Supply Voltage
= Diode Forward Voltage
= Logic “0” Voltage of Driver
= Logic “1” Voltage of Driver
CC1
CC2
VCC1 * VDF * VOL1
R1 (Non−Invert) +
(eq. 1)
(eq. 2)
(eq. 3)
IF
DF
OL1
VCC1 * VOH1 * VDF
OH1
R1 (Invert) +
I = Diode Forward Current
IF
F
V
OLX
= Saturation Voltage of Output Transistor
VCC2 * VOLX (@ IL * I2)
I = Load Current Through Resistor R
L
2
R2
+
I = Input Current of Output Gate
2
IL
R (W) @ OUTPUT CONFIGURATION
2
INPUT
CONFIGURATION
CMOS @ 5 V CMOS @ 10 V
1000 2200
74XX
74LXX
74SXX
74LSXX
74HXX
R (W)
1
CMOS @
5 V
NON−INV.
INV.
2000
510
750
1000
1000
1000
560
CMOS @ NON−INV.
5100
4700
2200
180
10 V
INV.
74XX
74LXX
74SXX
74LSXX
74HXX
NON−INV.
INV.
NON−INV.
INV.
1800
100
NON−INV.
INV.
2000
360
NON−INV.
INV.
2000
180
NON−INV.
INV.
2000
180
Figure 2. Resistor Values for Logic Interface
VCC1
VCC2
VCC2
1
8
1
2
3
4
8
7
6
5
R2
R2
IN
2
3
4
7
6
5
OUT
IN
R1
R1
OUT
Figure 3. Non−Inverting Logic Interface
Figure 4. Inverting Logic Interface
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Single−Channel: 6N138M, 6N139M Dual−Channel: HCPL2730M, HCPL2731M
TYPICAL PERFORMANCE CURVES
100
1.5
I = 1.6 mA
F
T = 110°C
A
10
1
T = 100°C
1.4
A
T = 85°C
A
1.3
1.2
T = 70°C
A
T = 25°C
0.1
A
T = 0°C
A
0.01
0.001
T = −40°C
A
1.1
1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9
−40 −20
0
20 40 60 80 100
V , FORWARD VOLTAGE (V)
F
T , TEMPERATURE (°C)
A
Figure 5. LED Forward Current vs. Forward Voltage
Figure 6. LED Forward Current vs. Temperature
1.4
3500
V
V
= 5 V
= 0.4 V
I = 1.6 mA
F
CC
T = 85°C
A
V = 4.5 V
CC
O
3000
2500
2000
1500
1000
500
T = 100°C
V
= 0.4 V
A
O
1.2
1.0
0.8
0.6
T = 70°C
A
Normalized to TA = 25°C
T = 110°C
A
T = 25°C
A
T = 0°C
A
T = −40°C
A
0
0.01
0.4
0.1
1
10
100
−40 −20
0
20 40 60 80 100
I , FORWARD CURRENT (mA)
F
T , TEMPERATURE (°C)
A
Figure 7. Current Transfer Ratio vs. Forward Current
(6N138M / 6N139M Only)
Figure 8. Normalized Current Transfer Ratio vs.
Ambient Temperature (6N138M / 6N139M Only)
100
2400
2000
1600
1200
800
T = 70° C / 85° C /
A
100° C / 110° C
10
T = 25° C
A
1
T = 0° C
A
T = −40° C
A
0
I = 1.6 mA
F
400
0
V
V
= 5 V
= 0.4 V
V = 5 V
CC
CC
V
O
= 0.4 V
O
0
1
10
100
1000
0.01
0.1
1
10
R
, BASE RESISTANCE (kW)
I , INPUT FORWARD CURRENT (mA)
F
BE
Figure 9. Current Transfer Ratio vs. Base−Emitter
Resistance (6N138M / 6N139M Only)
Figure 10. Output Current vs. Input Diode Forward
Current (6N138M / 6N139M Only)
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Single−Channel: 6N138M, 6N139M Dual−Channel: HCPL2730M, HCPL2731M
TYPICAL PERFORMANCE CURVES (continued)
100
80
60
40
20
0
7
6
5
4
3
2
1
0
V
= 5 V
CC
Limit of safe
operating region
5 mA
4.5 mA
4 mA
3.5 mA
3 mA
T = 25° C
A
2.5 mA
V
= 18 V
CC
2 mA
1.5 mA
1 mA
V
= 5 V
CC
0.5 mA
0
1
2
0
2
4
6
8
10 12 14 16
V , OUTPUT VOLTAGE (V)
O
I , FORWARD CURRENT (mA)
F
Figure 11. Output Current vs Output Voltage
(6N138M / 6N139M Only)
Figure 12. Logic Low Supply Current vs. Input
Diode Forward Current (6N138M / 6N139M Only)
50
V
CC
= 5 V
t
(I = 0.5 mA,
F
PLH
R = 4.7 kW)
(I = 1.6 mA,
F
R = 2.2 kW)
L
40
30
20
10
0
t
PLH
L
t
(I = 1.6 mA,
F
R = 2.2 kW)
PHL
L
t
(I = 0.5 mA,
F
PHL
R = 4.7 kW)
L
−40 −40
0
20 40 60 80 100
T , TEMPERATURE (°C)
A
Figure 13. Propagation Delay vs. Temperature
(6N138M / 6N139M Only)
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Single−Channel: 6N138M, 6N139M Dual−Channel: HCPL2730M, HCPL2731M
TEST CIRCUITS
Pulse
Generator
tr = 5 ns
Noise
Shield
Noise
Shield
+
IF
VCC
VCC
Pulse
Generator
tr = 5 ns
+5 V
1
2
3
4
8
7
6
5
+5 V
1
2
3
4
8
7
6
5
Z
O
= 50 W
10% Duty
Cycle
/ < tr =100 ms
VF1
−
RL
V01
0.1 mF
IF
VB
Z
= 50 W
I
O
RL
f
10% Duty
Cycle
/ < tr =100 ms
VF
C
= 15 pF*
L
VO
I
V02
f
VO
−
IF
VF2
0.1 mF
MONITOR
IF Monitor
GND
Rm
+
Rm
C
= 15 pF*
L
GND
Test Circuit for 6N138M, 6N139M
Test Circuit for HCPL2730M and HCPL2731M
IF
5 V
VO
1.5 V
1.5 V
VOL
TPHL
TPLH
Figure 14. Switching Time Test Circuit
IF
Noise
Shield
Noise
Shield
VCC
VCC
+
+5 V
+5 V
VO
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
IF
VF1
−
RL
VB
V01
RL
A
VF
0.1 mF
A
B
VO
V02
−
VO
−
B
V
FF
0.1 mF
VF2
+
VFF
GND
GND
VCM
−
+
VCM
+
−
Pulse Gen
Pulse Gen
Test Circuit for 6N138M and 6N139M
Test Circuit for HCPL2730M and HCPL2731M
VCM 10 V
0 V
90% 90%
10%
tr
10%
tf
VO
5 V
VOL
Switch at A : IF = 0 mA
VO
Switch at B : IF = 1.6 mA
Figure 15. Common Mode Immunity Test Circuit
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9
Single−Channel: 6N138M, 6N139M Dual−Channel: HCPL2730M, HCPL2731M
REFLOW PROFILE
Max. Ramp−up Rate = 3°C/S
Max. Ramp−down Rate = 6°C/S
TP
TL
260
240
220
200
180
160
140
120
100
80
tP
Tsmax
tL
Preheat Area
Tsmin
ts
60
40
20
0
120
240
360
Time 25°C to Peak
Time (seconds)
Profile Freature
Pb−Free Assembly Profile
150°C
Temperature Min. (Tsmin)
Temperature Max. (Tsmax)
200°C
Time (t ) from (Tsmin to Tsmax)
60 − 120 seconds
3°C/second max.
217°C
S
Ramp−up Rate (t to t )
L
P
Liquidous Temperature (T )
L
Time (t ) Maintained Above (T )
60 – 150 seconds
260°C +0°C / –5°C
30 seconds
L
L
Peak Body Package Temperature
Time (t ) within 5°C of 260°C
P
Ramp−down Rate (T to T )
6°C/second max.
8 minutes max.
P
L
Time 25°C to Peak Temperature
Figure 16. Reflow Profile
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10
Single−Channel: 6N138M, 6N139M Dual−Channel: HCPL2730M, HCPL2731M
ORDERING INFORMATION
†
Part Number
6N138M
Package
Shipping
DIP 8−Pin
(Pb−Free)
50 Units / Tube
50 Units / Tube
6N138SM
SMT 8−Pin (Lead Bend)
(Pb−Free)
6N138SDM
6N139M
SMT 8−Pin (Lead Bend)
(Pb−Free)
1,000 Units / Tape & Reel
50 Units / Tube
DIP 8−Pin
(Pb−Free)
6N139SM
SMT 8−Pin (Lead Bend)
(Pb−Free)
50 Units / Tube
6N139SDM
6N139VM
SMT 8−Pin (Lead Bend)
(Pb−Free)
1,000 Units / Tape & Reel
50 Units / Tube
DIP 8−Pin, DIN EN/IEC 60747−5−5 Option
(Pb−Free)
6N139SVM
6N139SDVM
6N139TVM
HCPL2730M
HCPL2730SM
HCPL2730SDM
HCPL2731M
HCPL2731SM
HCPL2731SDM
HCPL2731VM
SMT 8−Pin (Lead Bend), DIN EN/IEC 60747−5−5 Option
(Pb−Free)
50 Units / Tube
SMT 8−Pin (Lead Bend), DIN EN/IEC 60747−5−5 Option
(Pb−Free)
1,000 Units / Tape & Reel
50 Units / Tube
DIP 8−Pin, 0.4” Lead Spacing, DIN EN/IEC 60747−5−5 Option
(Pb−Free)
DIP 8−Pin
(Pb−Free)
50 Units / Tube
SMT 8−Pin (Lead Bend)
(Pb−Free)
50 Units / Tube
SMT 8−Pin (Lead Bend)
(Pb−Free)
1,000 Units / Tape & Reel
50 Units / Tube
DIP 8−Pin
(Pb−Free)
SMT 8−Pin (Lead Bend)
(Pb−Free)
50 Units / Tube
SMT 8−Pin (Lead Bend)
(Pb−Free)
1,000 Units / Tape & Reel
50 Units / Tube
DIP 8−Pin, DIN EN/IEC 60747−5−5 Option
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 6.6x3.81, 2.54P
CASE 646BW
ISSUE O
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13445G
PDIP8 6.6X3.81, 2.54P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 9.655x6.6, 2.54P
CASE 646CQ
ISSUE O
DATE 18 SEP 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13446G
PDIP8 9.655X6.6, 2.54P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 GW
CASE 709AC
ISSUE O
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13447G
PDIP8 GW
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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