HCPL3700V [ONSEMI]
8 引脚 DIP 交流/直流与逻辑接口光耦合器;
| 型号： | HCPL3700V |
| 厂家： | 
ONSEMI |
| 描述： | 8 引脚 DIP 交流/直流与逻辑接口光耦合器 光电 |
| 文件： | 总13页 (文件大小：419K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON
Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
August 2008
HCPL3700
AC/DC to Logic Interface Optocoupler
Features
Description
■ AC or DC input
The HCPL-3700 voltage/current threshold detection
optocoupler consists of an AlGaAs LED connected to a
threshold sensing input buffer IC which are optically cou-
pled to a high gain darlington output. The input buffer
chip is capable of controlling threshold levels over a wide
range of input voltages with a single resistor. The output
is TTL and CMOS compatible.
■ Programmable sense voltage
■ Logic level compatibility
■ Threshold guaranteed over temperature (0°C to 70°C)
■ Optoplanar™ construction for high common mode
immunity
■ UL recognized (file # E90700)
■ VDE certified – ordering option ‘V’, e.g., HCPL3700V
Applications
■ Low voltage detection
■ 5 V to 240 V AC/DC voltage sensing
■ Relay contact monitor
■ Current sensing
■ Microprocessor Interface
■ Industrial controls
Schematics
Package Outlines
AC
DC+
DC-
AC
1
2
3
4
8
7
6
5
VCC
NC
8
1
VO
GND
8
8
1
1
TRUTH TABLE
(Positive Logic)
RX
AC/DC
POWER
LOGIC
HCPL-3700
Input
Output
H
L
L
H
A 0.1µF bypass capacitor must be connected
between pins 8 and 5.
GND 1
GND 2
©2005 Fairchild Semiconductor Corporation
HCPL3700 Rev. 1.0.3
www.fairchildsemi.com
Absolute Maximum Ratings (No derating required up to 70°C)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Value
Units
°C
T
Storage Temperature
Operating Temperature
Lead Solder Temperature
-55 to +125
-40 to +85
STG
T
°C
OPR
T
260 for 10 sec
°C
SOL
EMITTER
I
Input Current
Average
50 (Max.)
140 (Max.)
500 (Max.)
-0.5 (Max.)
230 (Max.)
305 (Max.)
mA
IN
Surge, 3ms, 120Hz Pulse Rate
Transient, 10µs, 120Hz Pulse Rate
V
P
Input Voltage (Pins 2-3)
V
IN
(1)
Input Power Dissipation
mW
mW
IN
(2)
P
Total Package Power Dissipation
T
DETECTOR
(3)
I
Output Current (Average)
30 (Max.)
-0.5 to 20
-0.5 to 20
210 (Max.)
mA
V
O
V
Supply Voltage (Pins 8-5)
Output Voltage (Pins 6-5)
CC
V
V
O
O
(4)
P
Output Power Dissipation
mW
Notes:
1. Derate linearly above 70°C free-air temperature at a rate of 1.8 mW/°C.
2. Derate linearly above 70°C free-air temperature at a rate of 2.5 mW/°C.
3. Derate linearly above 70°C free-air temperature at a rate of 0.6 mA/°C.
4. Derate linearly above 70°C free-air temperature at a rate of 1.9 mW/°C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Min.
Max.
18
Units
V
V
Supply Voltage
2
0
0
CC
T
Operating Temperature
Operating Frequency
70
°C
A
f
4
kHz
©2005 Fairchild Semiconductor Corporation
HCPL3700 Rev. 1.0.3
www.fairchildsemi.com
2
Electrical Characteristics (T = 0°C to 70°C Unless otherwise specified)
A
Symbol
Parameter
Test Conditions
Min.
1.96
1.00
3.35
Typ.
2.4
Max.
3.11
1.62
4.05
Unit
mA
mA
V
I
Input Threshold Current
V
= V
, V = 4.5 V
TH+
IN
TH+ CC
(5)
I
V = 0.4 V, I ≥ 4.2mA
1.2
TH-
O
O
V
Input Threshold
Voltage
DC
(Pins 2,3)
V
V
= V – V (Pins 1 & 4 Open)
3.8
TH+
IN
2
3
(5)
= 4.5 V, V = 0.4V
CC
O
I
≥ 4.2mA
O
V
V
V
= V - V (Pins 1 & 4 Open)
2.01
4.23
2.5
5.0
3.7
2.86
5.50
4.20
V
V
V
TH-
IN
2
3
(5)
= 4.5 V, V = 2.4 V
CC
O
I
≥ 100µA
O
V
AC
(Pins 1,4)
|V = V – V | (Pins 2 & 3 Open)
TH+
IN
1
4
(5)
V
= 4.5 V, V = 0.4 V
CC O
I
≥ 4.2 mA
O
V
|V = |V - V | (Pins 2 & 3 Open) 2.87
TH-
IN
1
4
(5)
V
= 4.5 V, V = 2.4 V
CC
O
I
≤ 100µA
O
I
Hysteresis
I
= I
– I
TH-
1.2
1.3
6.3
mA
V
HYS
HYS
TH+
V
V
V
= V
– V
HYS
HYS
TH+ TH-
V
Input Clamp Voltage
= V - V , V = GND
5.4
6.1
6.6
V
IHC1
IHC1
2
3
3
I
= 10 mA,
IN
Pins 1 & 4 connected to Pin 3
V
V
V
= |V – V |, |I | = 10mA
7.0
12.5
-0.75
3.7
7.3
V
V
IHC2
IHC3
IHC2
1
4
IN
(Pins 2 & 3 Open)
V
= V – V , V = GND,
13.4
IHC3
2
3
3
I
= 15mA (Pins 1 & 4 Open)
IN
V
V
= V – V , V = GND,
= -10mA
V
ILC
ILC
2
3
3
I
IN
I
Input Current
V
= V – V = 5.0V
3.0
4.4
mA
IN
IN
2
3
(Pins 1 & 4 Open)
V
V
Bridge Diode
Forward Voltage
I
I
= 3mA
= 3mA
0.65
0.65
0.04
V
V
D1,2
IN
IN
D3,4
(5)
V
Logic LOW Output Voltage
Logic HIGH Output Current
Logic LOW Supply Current
V
= 4.5 V, I = 4.2mA
0.4
100
4
V
OL
CC
OL
(5)
I
V
= V = 18V
µA
mA
OH
OH
CC
I
V – V = 5.0V, V = Open,
1.0
CCL
2
3
O
V
= 5V
CC
I
Logic HIGH Supply Current
Input Capacitance
V
= 18V, V = Open
0.01
50
4
µA
pF
CCH
CC
O
C
f = 1MHz, V = 0V
IN
IN
(Pins 2 & 3, Pins 1 & 4 Open)
Note:
5. Logic LOW output level at pin 6 occurs when V ≥ V
and when V > V
once V exceeds V
.
IN
TH+
IN
TH-
IN
TH+
Logic HIGH output level at pin 6 occurs when V ≤ V
and when V < V
once V decreases below V
.
IN
TH-
IN
TH+
IN
TH-
©2005 Fairchild Semiconductor Corporation
HCPL3700 Rev. 1.0.3
www.fairchildsemi.com
3
Switching Characteristics (T = 25°C, V = 5 V Unless otherwise specified)
A
CC
Symbol
AC Characteristics
Test Conditions
Min.
Typ.
Max.
Unit
(6)
T
Propagation Delay Time
(to Output Low Level)
R = 4.7kΩ, C = 30pF
6.0
15
µs
PHL
L
L
(6)
T
Propagation Delay Time
(to Output High Level)
R = 4.7kΩ, C = 30pF
25.0
40
µs
PLH
L
L
t
Output Rise Time (10–90%)
Output Fall Time (90–10%)
R = 4.7kΩ, C = 30pF
45
0.5
µs
µs
r
L
L
t
R = 4.7kΩ, C = 30pF
f
L
L
|CM |
Common Mode Transient
Immunity (at Output High Level)
I
V
= 0 mA, R = 4.7kΩ,
4000
V/µs
H
IN
L
(7)(8)
= 2.0 V, V
= 1400V
O min
CM
|CM |
Common Mode Transient
Immunity (at Output Low Level)
I = 3.11mA, R = 4.7kΩ,
600
V/µs
L
N
L
(7)(8)
V
= 0.8V, V
= 140V
O max
CM
Package Characteristics (T = 0°C to 70°C Unless otherwise specified)
A
Symbol
Characteristics
Test Conditions
Min.
Typ.
Max.
Unit
V
Withstand Insulation Voltage
Relative humidity < 50%,
2500
V
RMS
ISO
T = 25°C, t = 1 min,
A
(9)(10)
I
≤ 2µA
I-O
(9)
12
R
C
Resistance (input to output)
Capacitance (input to output)
V
= 500Vdc
10
Ω
I-O
IO
f = 1MHz, V = 0Vdc
0.6
pF
I-O
IO
Notes:
6.
T
propagation delay is measured from the 2.5V level of the leading edge of a 5.0V input pulse (1µs rise time) to
PHL
the 1.5 V level on the leading edge of the output pulse. T
of the input and output pulse. (Refer to Fig. 9)
propagation delay is measured on the trailing edges
PLH
7. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV /dt on the leading
cm
edge of the common mode pulse signal V , to assure that the output will remain in a logic high state (i.e., V >
CM
O
2.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dV /dt on the
cm
trailing edge of the common mode pulse signal, V , to assure that the output will remain in a logic low state
CM
(i.e., V < 0.8 V). Refer to Fig. 10.
O
8. In applications where dV /dt may exceed 50,000 V/µs (Such as static discharge), a series resistor, R
,
cm
CC
should be included to protect the detector chip from destructive surge currents. The recommended value for
is 240V per volt of allowable drop in V (between pin 8 and V ) with a minimum value of 240Ω.
R
CC
CC
CC
9. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are
shorted together.
10. The 2500 V
/1 min. capability is validated by a 3.0 kV
/1 sec. dielectric voltage withstand test.
RMS
RMS
11. AC voltage is instantaneous voltage for V
& V
.
TH+
TH-
12. All typicals at T = 25°C, V = 5V unless otherwise specified.
A
CC
©2005 Fairchild Semiconductor Corporation
HCPL3700 Rev. 1.0.3
www.fairchildsemi.com
4
Typical Performance Curves
Fig. 1 Logic Low Supply Current vs. Operating Supply Voltage
Fig. 2 Input Current vs. Input Voltage
4.0
50
45
40
35
30
25
20
15
10
5
DC (Pins 1,2 shorted together
pins 3,4 shorted together)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
DC (Pins 1 & 4 Open)
0
AC (pins 2 & 3 Open)
-5
-10
4
6
8
10
12
14
16
18
20
0
2
4
6
8
10
12
14
V
CC
– OPERATING SUPPLY VOLTAGE (V)
V
IN
– INPUT VOLTAGE (V)
Fig. 4 Current Threshold/Voltage Threshold
vs.Temperature
Fig. 3 Input Current/Low Level Output Voltage
vs.Temperature
4.2
3.2
4.2
4.0
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
120
4.0
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
110
100
90
80
70
60
50
40
30
20
10
0
VTH+
I
V
IN
= 5.0 V
IN
I
TH
+
(PINS 2 and 3)
V
CC
= 5.0 V
VTH-
V
OL
V
CC
= 5.0 V
I
OL
= 4.2 mA
ITH-
-40
-20
0
25
45
65
85
-40
-20
0
25
45
65
85
T
– TEMPERATURE (°C)
T
– TEMPERATURE (°C)
A
A
Fig. 5 Propagation Delay vs.Temperature
Fig. 6 Rise and Fall Time vs.Temperature
70
100
90
80
70
60
50
40
30
20
10
0
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
60
50
40
30
20
10
0
Tf
T
PLH
Tr
T
PHL
-60
-40
-20
0
20
40
60
80
100
-40
-20
0
25
45
65
T
– TEMPERATURE (°C)
T
– TEMPERATURE (°C)
A
A
©2005 Fairchild Semiconductor Corporation
HCPL3700 Rev. 1.0.3
www.fairchildsemi.com
5
Typical Performance Curves (Continued)
Fig. 7 Logic High Supply Current vs.Temperature
Fig. 8 External Threshold Characteristics V+/V- vs. Rx
300
1000
V
= 18V
= OPEN
= 0mA
CC
250
200
150
100
50
V
O
I
IN
V- (AC)
100
10
V- (DC)
V+ (AC)
V+ (DC)
0
1
0
40
80
120
160
200
240
-60
-40
-20
0
20
40
60
80
100
R
X
– EXTERNAL SERIES RESISTOR (kΩ)
T
– TEMPERATURE (°C)
A
©2005 Fairchild Semiconductor Corporation
HCPL3700 Rev. 1.0.3
www.fairchildsemi.com
6
Test Circuits
+5V
5V
2.5V
0V
1
2
3
4
AC
VCC
8
7
6
5
Input
(VIN
)
Pulse
.1µF
bypass
RL
DC+
DC-
AC
Generator
tr = 5ns
ZO= 50Ω
tPHL
tPLH
Output
(VO
VO
)
VO
Output
(VO
90%
10%
90%
GND
)
1.5 V
VOL
10%
tf
tr
VIN
Pulse Amplitude = 50V
Pulse Width = 1ms
f = 100Hz
T = Tf = 1.0µs (10%–90%)
r
Fig. 9. Switching Test Circuit
VC
VC
IIN
RCC*
+5V
1
2
3
4
AC
VCC
8
7
6
5
A
B
.1µF
bypass
RL
DC+
DC-
AC
VCM
5V
5V
Output
VO
(VO
)
VFF
GND
VO
CL**
Switching Pos. (A)
IIN = 0 mA
VO (Min)
VCM
-
+
* SEE NOTE 8
Pulse Gen
VO (Max)
** CL IS 30 pF, WHICH INCLUDES PROBE
AND STRAY WIRING CAPACITANCE
Switching Pos. (B)
IIN = 3.11 mA
VO
V
Fig. 10.Test Circuit for Common Mode Transient Immunity and Typical Waveforms
©2005 Fairchild Semiconductor Corporation
HCPL3700 Rev. 1.0.3
www.fairchildsemi.com
7
Ordering Information
Option
Example Part Number
HCPL3700
Description
No Suffix
Shipped in Tubes
S
SD
W
HCPL3700S
Surface Mount Lead Bend
Surface Mount; Tape and Reel
0.4" Lead Spacing
HCPL3700SD
HCPL3700W
V
HCPL3700V
VDE0884
WV
SV
SDV
HCPL3700WV
HCPL3700SV
HCPL3700SDV
VDE0884; 0.4” Lead Spacing
VDE0884; Surface Mount
VDE0884; Surface Mount; Tape and Reel
Marking Information
1
2
3700
6
V XX YY T1
5
3
4
Definitions
1
Fairchild logo
2
Device number
VDE mark (Note: Only appears on parts ordered with VDE
option – See order entry table)
3
4
5
6
Two digit year code, e.g., ‘07’
Two digit work week ranging from ‘01’ to ‘53’
Assembly package code
©2005 Fairchild Semiconductor Corporation
HCPL3700 Rev. 1.0.3
www.fairchildsemi.com
8
Carrier Tape Specifications
12.0 ± 0.1
4.0 ± 0.1
4.90 ± 0.20
0.30 ± 0.05
Ø1.55 ± 0.05
1.75 ± 0.10
4.0 ± 0.1
7.5 ± 0.1
16.0 ± 0.3
10.30 ± 0.20
13.2 ± 0.2
Ø1.6 ± 0.1
10.30 ± 0.20
0.1 MAX
User Direction of Feed
Note:
All dimensions are in inches (millimeters)
Reflow Profile
300
250
200
150
100
50
215C, 10–30 s
225C peak
Time above 183C, 60–150 sec
Ramp up = 3C/sec
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
Time (Minute)
• Peak reflow temperature: 225C (package surface temperature)
• Time of temperature higher than 183C for 60–150 seconds
• One time soldering reflow is recommended
©2005 Fairchild Semiconductor Corporation
HCPL3700 Rev. 1.0.3
www.fairchildsemi.com
9
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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相关型号：
HCPL3700WV
8-pin DIP AC/DC To Logic Interface Optocoupler, 8LD,MDIP,OPTO, .4" LEAD SPACING, BLACK, 1000/BULK
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