HUF76633P3-F085 [ONSEMI]
N 沟道，逻辑电平，UltraFET 功率 MOSFET，100V，38A，36mΩ;
| 型号： | HUF76633P3-F085 |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，逻辑电平，UltraFET 功率 MOSFET，100V，38A，36mΩ 局域网 开关 晶体管 |
| 文件： | 总11页 (文件大小：563K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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HUF76633P3-F085
Data Sheet
April 2012
38A, 100V, 0.036 Ohm, N-Channel, Logic
Level UltraFET® Power MOSFET
Packaging
Features
• Ultra Low On-Resistance
JEDEC TO-220AB
- r
- r
= 0.035Ω, VGS = 10V
= 0.036Ω, VGS = 5V
DS(ON)
SOURCE
DRAIN
GATE
DS(ON)
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- Spice and SABER Thermal Impedance Models
• Peak Current vs Pulse Width Curve
DRAIN
(FLANGE)
• UIS Rating Curve
• Switching Time vs R
GS
Curves
Symbol
• Qualified to AEC Q101
• RoHS Compliant
D
G
Ordering Information
PART NUMBER
PACKAGE
BRAND
S
HUF76633P3-F085
TO-220AB
76633P
o
Absolute Maximum Ratings
T
= 25 C, Unless Otherwise Specified
C
Ratings
100
Units
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . V
V
V
V
DSS
Drain to Gate Voltage (R
GS
= 20kΩ) (Note 1) . . . . . . . . . . . . .V
100
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
±16
GS
Drain Current
o
Continuous (T = 25 C, V
C
= 5V) . . . . . . . . . . . . . . . . . . . . . . I
= 10V) (Figure 2) . . . . . . . . . . . . . I
38
39
27
A
A
A
A
GS
GS
D
D
o
Continuous (T = 25 C, V
C
o
Continuous (T = 100 C, V
= 5V) . . . . . . . . . . . . . . . . . . . . . I
= 4.5V) (Figure 2) . . . . . . . . . . . I
C
GS
GS
D
o
Continuous (T = 100 C, V
27
C
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Figure 4
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS
Figures 6, 17, 18
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Derate Above 25 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
145
0.97
W
W/ C
D
o
o
o
Operating and Storage Temperature . . . . . . . . . . . . . . . . . T , T
J
-55 to 175
C
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . T
o
300
260
C
C
L
o
pkg
NOTES:
o
o
1. T = 25 C to 150 C.
J
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
All ON semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2012 Semiconductor Components Industries, LLC.
September-2017, Rev. 3
1
Publication Order Number:
HUF76633P3-F085/D
HUF76633P3-F085
o
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
T = 25 C, Unless Otherwise Specified
C
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
BV
I
I
= 250µA, V
= 250µA, V
= 0V (Figure 12)
o
100
-
-
-
-
-
-
-
V
DSS
D
D
GS
GS
GS
GS
= 0V , T = -40 C (Figure 12)
C
90
-
V
Zero Gate Voltage Drain Current
I
V
V
V
= 95V, V
= 90V, V
= ±16V
= 0V
= 0V, T = 150 C
1
µA
µA
nA
DSS
DS
DS
GS
o
-
250
±100
C
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
I
-
GSS
V
V
= V , I = 250µA (Figure 11)
1
-
-
3
V
Ω
Ω
Ω
GS(TH)
GS
DS
D
GS
GS
GS
r
I
I
I
= 39A, V
= 27A, V
= 27A, V
= 10V (Figures 9, 10)
= 5V (Figure 9)
0.029
0.030
0.031
0.035
0.036
0.037
DS(ON)
D
D
D
-
= 4.5V (Figure 9)
-
THERMAL SPECIFICATIONS
o
Thermal Resistance Junction to Case
R
R
TO-220 and TO-263
-
-
-
-
1.03
62
C/W
θJC
o
Thermal Resistance Junction to
Ambient
C/W
θJA
SWITCHING SPECIFICATIONS (V
= 4.5V)
GS
Turn-On Time
t
V
V
= 50V, I = 27A
-
-
-
-
-
-
-
12
110
43
58
-
185
ns
ns
ns
ns
ns
ns
ON
DD
GS
D
= 4.5V, R
= 4.7Ω
GS
Turn-On Delay Time
Rise Time
t
-
d(ON)
(Figures 15, 21, 22)
t
-
r
Turn-Off Delay Time
Fall Time
t
-
-
d(OFF)
t
f
Turn-Off Time
t
150
OFF
SWITCHING SPECIFICATIONS (V
Turn-On Time
= 10V)
t
GS
V
V
R
= 50V, I = 39A
D
= 10V,
= 5.1Ω
-
-
-
-
-
-
-
95
ns
ns
ns
ns
ns
ns
ON
DD
GS
Turn-On Delay Time
Rise Time
t
7.5
55
63
83
-
-
d(ON)
GS
t
-
r
(Figures 16, 21, 22)
Turn-Off Delay Time
Fall Time
t
-
-
d(OFF)
t
f
Turn-Off Time
t
220
OFF
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Q
V
V
V
= 0V to 10V
= 0V to 5V
= 0V to 1V
V
= 50V,
-
-
-
-
-
56
30
2
67
37
2.4
-
nC
nC
nC
nC
nC
g(TOT)
GS
GS
GS
DD
= 27A,
I
I
D
Gate Charge at 5V
Q
g(5)
= 1.0mA
g(REF)
Threshold Gate Charge
Q
g(TH)
(Figures 14, 19, 20)
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Input Capacitance
Q
6
gs
gd
Q
15
-
C
V
= 25V, V
GS
= 0V,
-
-
-
1820
415
-
-
-
pF
pF
pF
ISS
DS
f = 1MHz
(Figure 13)
Output Capacitance
C
OSS
RSS
Reverse Transfer Capacitance
C
115
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
1.25
1.0
UNITS
Source to Drain Diode Voltage
V
I
I
I
I
= 27A
= 13A
-
-
-
-
-
-
-
-
V
V
SD
SD
SD
SD
SD
Reverse Recovery Time
t
= 27A, dI /dt = 100A/µs
SD
113
425
ns
nC
rr
Reverse Recovered Charge
Q
= 27A, dI /dt = 100A/µs
RR
SD
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2
HUF76633P3-F085
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
0
50
40
30
20
10
0
V
= 10V
GS
V
= 4.5V
GS
0
25
50
75
100
150
175
125
o
25
50
75
100
125
150
175
o
T
, CASE TEMPERATURE ( C)
T , CASE TEMPERATURE ( C)
C
C
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
2
DUTY CYCLE - DESCENDING ORDER
0.5
1
0.2
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
1
2
SINGLE PULSE
PEAK T = P
x Z
x R + T
J
DM
θJC
θJC C
0.01
-5
-4
10
-3
-2
10
-1
0
1
10
10
10
10
10
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
500
o
T
= 25 C
C
FOR TEMPERATURES
o
ABOVE 25 C DERATE PEAK
CURRENT AS FOLLOWS:
175 - T
150
C
I = I
25
V
= 10V
GS
100
30
V
= 5V
GS
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
-5
10
-4
-3
10
-2
-1
10
0
1
10
10
t, PULSE WIDTH (s)
10
10
FIGURE 4. PEAK CURRENT CAPABILITY
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3
HUF76633P3-F085
Typical Performance Curves (Continued)
200
100
500
100
If R = 0
= (L)(I )/(1.3*RATED BV
t
- V
)
DD
AV
If R
AS
DSS
≠
0
t
= (L/R)ln[(I *R)/(1.3*RATED BV
AS DSS
- V ) +1]
DD
AV
100µs
o
STARTING T = 25 C
J
10
OPERATION IN THIS
10
AREA MAY BE
LIMITED BY r
1ms
DS(ON)
o
STARTING T = 150 C
J
SINGLE PULSE
= MAX RATED
10ms
o
T
= 25 C
T
C
J
1
1
1
10
100
300
0.001
0.01
0.1
1
10
t
, TIME IN AVALANCHE (ms)
V
, DRAIN TO SOURCE VOLTAGE (V)
AV
DS
NOTE: Refer to ON Semiconductor Application Notes AN9321
and AN9322.
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
80
80
PULSE DURATION = 80
DUTY CYCLE = 0.5% MAX
= 15V
µ
s
V
= 10V
= 5V
GS
V
GS
V
DD
V
= 3.5V
GS
V
= 4V
GS
60
40
20
0
60
40
20
0
V
= 3V
GS
o
T
= 175 C
J
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
o
T
= 25 C
J
o
T
= -55 C
o
J
T
= 25 C
C
1.5
2.0
2.5
3.0
3.5
4.0
0
1
2
3
4
5
V
, GATE TO SOURCE VOLTAGE (V)
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
GS
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
50
3.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
= 10V, I = 39A
D
I
= 39A
GS
D
o
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T
= 25 C
C
45
40
35
30
25
2.5
2.0
1.5
1.0
0.5
I
= 27A
D
I
= 15A
D
-80
-40
0
40
80
120
160
200
2
4
6
8
10
o
V
, GATE TO SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE ( C)
GS
J
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
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4
HUF76633P3-F085
Typical Performance Curves (Continued)
1.2
1.2
1.1
1.0
0.9
V
= V , I = 250µA
DS
I
= 250µA
GS
D
D
1.0
0.8
0.6
0.4
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
o
o
T , JUNCTION TEMPERATURE ( C)
T , JUNCTION TEMPERATURE ( C)
J
J
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
5000
V
= 50V
C
=
C
+ C
GS GD
DD
ISS
8
6
4
2
0
C
C
+ C
OSS
DS GD
1000
100
10
C
= C
GD
RSS
WAVEFORMS IN
DESCENDING ORDER:
I
I
I
= 39A
= 27A
= 15A
D
D
D
V
= 0V, f = 1MHz
1
GS
0
10
20
30
40
50
60
0.1
10
100
Q , GATE CHARGE (nC)
V
, DRAIN TO SOURCE VOLTAGE (V)
g
DS
NOTE: Refer to ON Semiconductor Application Notes AN7254
and AN7260.
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
400
500
V
= 4.5V, V = 50V, I = 27A
DD D
V
= 10V, V
= 50V, I = 39A
DD D
GS
GS
400
300
200
100
0
t
300
200
100
0
d(OFF)
t
r
t
f
t
d(OFF)
t
f
t
r
t
t
d(ON)
d(ON)
0
10
20
30
40
50
0
10
20
30
40
50
R
, GATE TO SOURCE RESISTANCE (Ω)
R
, GATE TO SOURCE RESISTANCE (Ω)
GS
GS
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
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5
HUF76633P3 -F085
Test Circuits and Waveforms
V
DS
BV
DSS
L
t
P
V
DS
I
VARY t TO OBTAIN
P
AS
+
V
DD
R
REQUIRED PEAK I
AS
G
V
DD
-
V
GS
DUT
t
P
I
0V
AS
0
0.01Ω
t
AV
FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 18. UNCLAMPED ENERGY WAVEFORMS
V
DS
V
Q
DD
R
g(TOT)
L
V
DS
V
= 10V
GS
V
Q
GS
g(5)
+
-
V
DD
V
= 5V
V
GS
GS
DUT
V
= 1V
GS
I
0
g(REF)
Q
g(TH)
Q
Q
gd
gs
I
g(REF)
0
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
V
t
t
DS
ON
OFF
t
d(OFF)
t
d(ON)
t
t
f
R
L
r
V
DS
90%
90%
+
V
GS
V
DD
10%
10%
0
-
DUT
90%
50%
R
GS
V
GS
50%
PULSE WIDTH
10%
V
GS
0
FIGURE 21. SWITCHING TIME TEST CIRCUIT
FIGURE 22. SWITCHING TIME WAVEFORM
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6
HUF76633P3-F085
PSPICE Electrical Model
.SUBCKT HUF76633 2 1 3 ;
rev 10 September1999
CA 12 8 3.50e-9
CB 15 14 3.50e-9
CIN 6 8 1.70e-9
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
LDRAIN
DPLCAP
5
DRAIN
2
10
RLDRAIN
RSLC1
51
EBREAK 11 7 17 18 120.7
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
DBREAK
+
RSLC2
5
ESLC
11
51
-
50
+
-
17
18
-
DBODY
RDRAIN
6
8
EBREAK
ESG
IT 8 17 1
EVTHRES
+
16
21
+
-
19
8
MWEAK
LDRAIN 2 5 1.00e-9
LGATE 1 9 5.17e-9
LSOURCE 3 7 2.13e-9
LGATE
EVTEMP
+
RGATE
GATE
1
6
-
18
22
MMED
9
20
MSTRO
8
RLGATE
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
LSOURCE
CIN
SOURCE
3
7
RSOURCE
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 2.04e-2
RGATE 9 20 2.15
RLDRAIN 2 5 10
RLGATE 1 9 51.7
RLSOURCE 3 7 21.3
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 4.85e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
RLSOURCE
S1A
S2A
S2B
RBREAK
12
15
13
14
13
17
18
8
RVTEMP
19
S1B
13
CB
CA
IT
14
-
+
+
VBAT
6
8
5
8
EGS
EDS
+
-
-
8
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
22
RVTHRES
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*79),3.5))}
.MODEL DBODYMOD D (IS = 1.96e-12 RS = 3.87e-3 TRS1 = 9.93e-4 TRS2 = 4.97e-6 CJO = 1.53e-9 TT = 7.41e-8 M = 0.50)
.MODEL DBREAKMOD D (RS = 3.12e- 1TRS1 = 1.07e- 3TRS2 = 0)
.MODEL DPLCAPMOD D (CJO = 1.97e- 9IS = 1e-3 0M = 0.87)
.MODEL MMEDMOD NMOS (VTO = 1.73 KP = 2.80 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 2.15)
.MODEL MSTROMOD NMOS (VTO = 2.04 KP = 80 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 1.50 KP = 0.10 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 21.5 RS = 0.1)
.MODEL RBREAKMOD RES (TC1 = 9.74e- 4TC2 = -3.71e-7)
.MODEL RDRAINMOD RES (TC1 = 9.71e-3 TC2 = 2.90e-5)
.MODEL RSLCMOD RES (TC1 = 2.17e-3 TC2 = 1.27e-6)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 0)
.MODEL RVTHRESMOD RES (TC1 = -2.08e-3 TC2 = -6.82e-6)
.MODEL RVTEMPMOD RES (TC1 = -1.52e- 3TC2 = -1.21e-7)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.00 VOFF= -1.50)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.50 VOFF= -6.00)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.50 VOFF= 0.0)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.0 VOFF= -0.50)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEEPower Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
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7
HUF76633P3-F085
SABER Electrical Model
REV 10 September 1999
template huf76633 n2,n1,n3
electrical n2,n1,n3
{
var i iscl
d..model dbodymod = (is = 1.96e-12, cjo = 1.53e-9, tt = 7.41e-8, m = 0.50)
d..model dbreakmod = ()
d..model dplcapmod = (cjo = 1.97e-9, is = 1e-30, m = 0.87 )
m..model mmedmod = (type=_n, vto = 1.73, kp = 2.8, is = 1e-30, tox = 1)
m..model mstrongmod = (type=_n, vto = 2.04, kp = 80, is = 1e-30, tox = 1)
m..model mweakmod = (type=_n, vto = 1.50, kp = 0.1, is = 1e-30, tox = 1)
sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -6.00, voff = -1.50)
sw_vcsp..model s1bmod = (ron =1e-5, roff = 0.1, von = -1.50, voff = -6.00)
sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -0.50, voff = 0.0)
sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0.0, voff = -0.50)
LDRAIN
RLDRAIN
RDBODY
DPLCAP
DRAIN
2
5
10
RSLC1
51
RDBREAK
72
DBREAK
11
c.ca n12 n8 = 3.50e-9
c.cb n15 n14 = 3.50e-9
c.cin n6 n8 = 1.70e-9
RSLC2
ISCL
50
-
d.dbody n7 n71 = model=dbodymod
d.dbreak n72 n11 = model=dbreakmod
d.dplcap n10 n5 = model=dplcapmod
71
RDRAIN
6
8
ESG
EVTHRES
+
+
16
21
-
19
8
MWEAK
i.it n8 n17 = 1
LGATE
EVTEMP
+
DBODY
RGATE
GATE
1
6
-
18
22
EBREAK
+
l.ldrain n2 n5 = 1e-9
l.lgate n1 n9 = 5.17e-9
l.lsource n3 n7 = 2.13e-9
MMED
9
20
MSTRO
8
17
18
-
RLGATE
LSOURCE
CIN
SOURCE
3
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
7
RSOURCE
RLSOURCE
S1A
S2A
res.rbreak n17 n18 = 1, tc1 = 9.74e-4, tc2 = -3.71e-7
res.rdbody n71 n5 = 3.87e-3, tc1 = 9.93e-4, tc2 = 4.97e-6
res.rdbreak n72 n5 = 3.12e-1, tc1 = 1.07e-3, tc2 = 0
res.rdrain n50 n16 = 20.40e-3, tc1 = 9.71e-3, tc2 = 2.90e-5
res.rgate n9 n20 = 2.15
res.rldrain n2 n5 = 10
res.rlgate n1 n9 = 51.7
res.rlsource n3 n7 = 21.3
res.rslc1 n5 n51 = 1e-6, tc1 = 2.17e-3, tc2 = 1.27e-6
res.rslc2 n5 n50 = 1e3
RBREAK
12
15
13
14
13
17
18
8
RVTEMP
19
S1B
S2B
13
CB
CA
IT
14
-
+
+
VBAT
6
8
5
8
EGS
EDS
+
-
-
8
22
res.rsource n8 n7 = 4.85e-3, tc1 = 1.00e-3, tc2 = 0
res.rvtemp n18 n19 = 1, tc1 = -1.52e-3, tc2 = 1.21e-7
res.rvthres n22 n8 = 1, tc1 = -2.08e-3, tc2 = -6.82e-6
RVTHRES
spe.ebreak n11 n7 n17 n18 = 120.7
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
spe.esg n6 n10 n6 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
spe.evthres n6 n21 n19 n8 = 1
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
v.vbat n22 n19 = dc=1
equations {
i (n51->n50) +=iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/79))** 3.5))
}
}
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8
HUF76633P3-F085
SPICE Thermal Model
JUNCTION
th
REV 9 September1999
HUF76633T
RTHERM1
RTHERM2
RTHERM3
RTHERM4
RTHERM5
RTHERM6
CTHERM1
CTHERM1 th 6 2.90e-3
CTHERM2 6 5 1.25e-2
CTHERM3 5 4 1.00e-2
CTHERM4 4 3 6.50e-3
CTHERM5 3 2 2.75e-2
CTHERM6 2 tl 12.55
6
CTHERM2
CTHERM3
CTHERM4
CTHERM5
CTHERM6
RTHERM1 th 6 7.04e-3
RTHERM2 6 5 1.75e-2
RTHERM3 5 4 4.94e-2
RTHERM4 4 3 2.77e-1
RTHERM5 3 2 4.18e-1
RTHERM6 2 tl 5.54e-2
5
SABER Thermal Model
SABER thermal model HUF76633T
4
3
2
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 6 = 2.90e-3
ctherm.ctherm2 6 5 = 1.25e-2
ctherm.ctherm3 5 4 = 1.00e-2
ctherm.ctherm4 4 3 = 6.50e-3
ctherm.ctherm5 3 2 = 2.75e-2
ctherm.ctherm6 2 tl = 12.55
rtherm.rtherm1 th 6 = 7.04e-3
rtherm.rtherm2 6 5 = 1.75e-2
rtherm.rtherm3 5 4 = 4.94e-2
rtherm.rtherm4 4 3 = 2.77e-1
rtherm.rtherm5 3 2 = 4.18e-1
rtherm.rtherm6 2 tl = 5.54e-2
}
tl
CASE
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9
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