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J112_D27Z [ONSEMI]

Small Signal Field-Effect Transistor, 1-Element, N-Channel, Silicon, Junction FET, TO-92;
J112_D27Z
型号： J112_D27Z
厂家： ONSEMI    ONSEMI
描述：

Small Signal Field-Effect Transistor, 1-Element, N-Channel, Silicon, Junction FET, TO-92

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January 2015  
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 /  
MMBFJ113  
N-Channel Switch  
Features  
• This device is designed for low level analog switching,  
sample and hold circuits and chopper stabilized amplifiers.  
• Sourced from process 51  
• Source & Drain are interchangeable.  
G
S
TO-92  
G
Note: Source & Drain  
are interchangeable  
SOT-23  
S
D
D
Figure 1. J111 / J112 / J113 Device Package  
Figure 2. MMBFJ111 / MMBFJ112 / MMBFJ113  
Device Package  
Ordering Information  
Part Number  
J111  
Top Mark  
J111  
J111  
J111  
J112  
J112  
J112  
J112  
J113  
J113  
J113  
6P  
Package  
TO-92 3L  
TO-92 3L  
TO-92 3L  
TO-92 3L  
TO-92 3L  
TO-92 3L  
TO-92 3L  
TO-92 3L  
TO-92 3L  
TO-92 3L  
SOT-23 3L  
SOT-23 3L  
SOT-23 3L  
Packing Method  
Bulk  
J111_D26Z  
J111_D74Z  
J112  
Tape and Reel  
Ammo  
Bulk  
J112_D26Z  
J112_D27Z  
J112_D74Z  
J113  
Tape and Reel  
Tape and Reel  
Ammo  
Bulk  
J113_D74Z  
J113_D75Z  
MMBFJ111  
MMBFJ112  
MMBFJ113  
Ammo  
Ammo  
Tape and Reel  
Tape and Reel  
Tape and Reel  
6R  
6S  
© 1997 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 / MMBFJ113 Rev. 1.5  
Absolute Maximum Ratings(1), (2)  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-  
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-  
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The  
absolute maximum ratings are stress ratings only. Values are at TA = 25°C unless otherwise noted.  
Symbol  
VDG  
Parameter  
Value  
35  
Unit  
V
Drain-Gate Voltage  
Gate-Source Voltage  
Forward Gate Current  
VGS  
-35  
V
IGF  
50  
mA  
°C  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to 150  
Notes:  
1. These ratings are based on a maximum junction temperature of 150°C.  
2. These are steady-state limits. Fairchild Semiconductor should be consulted on applications involving pulsed or  
low-duty-cycle operations.  
Thermal Characteristics  
Values are at TA = 25°C unless otherwise noted.  
Max.  
MMBFJ111 /  
Symbol  
Parameter  
Unit  
J111 / J112 /  
J113(3)  
MMBFJ112 /  
MMBFJ113(4)  
Total Device Dissipation  
625  
5.0  
350  
2.8  
mW  
mW/°C  
°C/W  
PD  
Derate Above 25°C  
RθJC  
RθJA  
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient  
125  
200  
357  
°C/W  
Notes:  
3. PCB size: FR-4, 76 mm x 114 mm x 1.57 mm (3.0 inch x 4.5 inch x 0.062 inch) with minimum land pattern size.  
4. Device mounted on FR-4 PCB 36mm × 18mm × 1.5mm; mounting pad for the collector lead minimum 6cm2.  
© 1997 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 / MMBFJ113 Rev. 1.5  
2
Electrical Characteristics  
Values are at TA = 25°C unless otherwise noted.  
Symbol  
Parameter  
Conditions  
Min.  
Max.  
Unit  
Off Characteristics  
V(BR)GSS Gate-Source Breakdown Voltage  
IGSS Gate Reverse Current  
IG = -1.0 μA, VDS = 0  
-35  
V
VGS = -15 V, VDS = 0  
-1.0  
-10.0  
-5.0  
-3.0  
1.0  
nA  
111  
112  
113  
-3.0  
-1.0  
-0.5  
VGS(off) Gate-Source Cut-Off Voltage  
VDS = 15 V, ID = 1.0 μA  
VDS = 5.0 V, VGS = -10 V  
V
ID(off)  
Drain Cutoff Leakage Current  
nA  
On Characteristics  
111  
112  
113  
111  
112  
113  
20  
5.0  
2.0  
IDSS  
Zero-Gate Voltage Drain Current(5) VDS = 15 V, VGS = 0  
mA  
30  
50  
rDS(on) Drain-Source On Resistance  
VDS ≤ 0.1 V, VGS = 0  
Ω
100  
Small Signal Characteristics  
Cdg(on) Drain-Gate &Source-Gate On  
Csg(on) Capacitance  
VDS = 0, VGS = 0, f = 1.0 MHz  
28  
pF  
C
dg(off) Drain-Gate Off Capacitance  
Csg(off) Source-Gate Off Capacitance  
Note:  
VDS = 0, VGS = -10 V, f = 1.0 MHz  
VDS = 0, VGS = -10 V, f = 1.0 MHz  
5.0  
5.0  
pF  
pF  
5. Pulse test: pulse width ≤ 300 μs, duty cycle ≤ 2%.  
© 1997 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 / MMBFJ113 Rev. 1.5  
3
Typical Performance Characteristics  
10  
100  
50  
100  
50  
T
V
= 25°C  
GS(off)  
A
V GS = 0 V  
TYP  
= - 2.0 V  
- 0.2 V  
rDS  
8
6
4
2
0
- 0.4 V  
- 0.6 V  
g
20  
10  
5
20  
10  
5
fs  
- 0.8 V  
IDSS , gfs @ VDS = 15V,  
V GS= 0 PULSED  
- 1.0 V  
- 1.2 V  
rDS @ 1.0 mA, VGS = 0  
VGS(off) @ VDS = 15V,  
- 1.4 V  
I
= 1.0 nA  
I DSS  
D
_0.5  
_1  
_ 2  
_ 5  
_ 10  
0
0.4  
0.8  
1.2  
1.6  
2
VGS (OFF) - GATE CUTOFF VOLTAGE (V)  
VDS - DRAIN-SOURCE VOLTAGE (V)  
Figure 3. Common Drain-Source  
Figure 4. Parameter Interactions  
16  
12  
8
40  
30  
20  
10  
0
V
= - 3.0 V  
V
= - 1.6 V  
GS(off)  
- 55°C  
GS(off)  
- 55°C  
V DS = 15 V  
25°C  
125°C  
25°C  
125°C  
V
= - 2.0 V  
GS(off)  
125°C  
25°C  
- 55°C  
V
= - 1.1 V  
GS(off)  
125°C  
25°C  
- 55°C  
V DS = 15 V  
4
0
0
-1  
-2  
-3  
0
-0.5  
-1  
-1.5  
VGS- GATE-SOURCE VOLTAGE (V)  
VGS- GATE-SOURCE VOLTAGE (V)  
Figure 6. Transfer Characteristics  
Figure 5. Transfer Characteristics  
30  
20  
10  
0
30  
20  
10  
0
V
= - 3.0 V  
GS(off)  
- 55°C  
V
= - 1.6 V  
GS(off)  
- 55°C  
25°C  
125°C  
25°C  
125°C  
V
= - 2.0 V  
GS(off)  
- 55°C  
25°C  
125°C  
V
= - 1.1 V  
GS(off)  
- 55°C  
25°C  
125°C  
VDS = 15 V  
V DS = 15 V  
-0.5  
0
-1  
-2  
-3  
0
-1  
-1.5  
VGS- GATE-SOURCE VOLTAGE (V)  
VGS- GATE-SOURCE VOLTAGE (V)  
Figure 7. Transfer Characteristics  
Figure 8. Transfer Characteristics  
© 1997 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 / MMBFJ113 Rev. 1.5  
4
Typical Performance Characteristics (Continued)  
100  
100  
50  
125°C  
V
GS(off)  
TYP = - 2.0V  
V
@ 5.0V, 10 μA  
GS(off)  
50  
rDS  
25°C  
125°C  
- 55°C  
20  
10  
5
rDS  
=
VGS  
V
______  
GS(off)  
1 -  
VGS(off)  
TYP = - 7.0V  
20  
10  
25°C  
r
@ V  
= 0  
GS  
DS  
2
1
- 55°C  
0
0.2  
0.4  
0.6  
0.8  
1
1
2
5
10  
20  
50  
100  
VGS /VGS(off) - NORMALIZED GATE-SOURCE VOLTAGE (V)  
I D - DRAIN CURRENT (mA)  
Figure 9. On Resistance vs. Drain Current  
Figure 10. Normalized Drain Resistance vs.  
Bias Voltage  
100  
100  
T
= 25°C  
= 15V  
A
T
= 25°C  
V
= 5.0V  
A
DG  
5.0V  
V
DG  
10V  
15V  
20V  
f = 1.0 kHz  
5.0V  
10V  
15V  
f = 1.0 kHz  
10V  
15V  
20V  
10  
1
V
= - 5.0V  
GS(off)  
20V  
V
= - 1.4V  
10  
GS(off)  
V
= - 2.0V  
V
= - 3.0V  
GS(off)  
GS(off)  
V
= - 0.85V  
GS(off)  
0.1  
1
0.01  
0.1  
I D - DRAIN CURRENT (mA)  
10  
0.1  
1
10  
I D - DRAIN CURRENT (mA)  
Figure 12. Output Conductance vs. Drain Current  
Figure 11. Transconductance vs. Drain Current  
100  
100  
V
= 15V  
DG  
50  
BW = 6.0 Hz @ f = 10 Hz, 100 Hz  
= 0.21 @ f ≥ 1.0 kHz  
f
= 0.1 - 1.0 MHz  
10  
10  
5
C
(V  
= 0)  
DS  
is  
I
= 1.0 mA  
D
C
(V  
= 20)  
DS  
is  
I
= 10 mA  
D
C
(V  
= 0)  
DS  
rs  
1
1
0
-4  
-8  
-12  
-16  
-20  
0.01  
1
10  
100  
VGS - GATE-SOURCE VOLTAGE (V)  
f - FREQUENCY (kHz)  
Figure 13. Capacitance vs. Voltage  
Figure 14. Noise Voltage vs. Frequency  
© 1997 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 / MMBFJ113 Rev. 1.5  
5
Typical Performance Characteristics (Continued)  
100  
700  
600  
500  
400  
300  
200  
100  
0
V
= 15V  
DG  
TO-92  
f = 10 Hz  
f = 100 Hz  
f = 1.0 kHz  
SOT-23  
10  
f = 10 kHz  
f = 100 kHz  
1
0.01  
0
25  
50  
75  
100  
125  
150  
0.1  
1
10  
TEMPERATURE (oC)  
I
- DRAIN CURRENT (mA)  
D
Figure 15. Noise Voltage vs. Current  
Figure 16. Power Dissipation vs.  
Ambient Temperature  
100  
80  
60  
40  
20  
0
25  
20  
15  
10  
5
T
V
V
= 25°C  
= 3.0V  
= -12V  
V
t
= 3.0V  
A
DD  
t
r (ON)  
V
= -2.2V  
GS(off)  
APPROX. I INDEPENDENT  
D
DD  
GS  
r
V
= 3.0V  
GS(off)  
- 4.0V  
- 7.5V  
t
(off)  
T
= 25°C  
A
t
DEVICE  
d(off)  
I
= 6.6 mA  
V
INDEPENDENT  
GS(off)  
D
2.5 mA  
- 6.0V  
t
d (ON)  
V
= -12V  
GS  
t
d(off)  
0
0
-2  
-4  
-6  
-8  
-10  
0
2
4
6
8
10  
VGS(off) - GATE-SOURCE CUTOFF VOLTAGE (V)  
I D - DRAIN CURRENT (mA)  
Figure 18. Switching Turn-Off Time vs. Drain Current  
Figure 17. Switching Turn-On Time vs.  
Gate-Source Voltage  
© 1997 Fairchild Semiconductor Corporation  
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 / MMBFJ113 Rev. 1.5  
www.fairchildsemi.com  
6
Physical Dimensions  
D
Figure 19. 3-Lead, TO-92, JEDEC TO-92 Compliant Straight Lead Configuration, Bulk Type  
© 1997 Fairchild Semiconductor Corporation  
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 / MMBFJ113 Rev. 1.5  
www.fairchildsemi.com  
7
Physical Dimensions (Continued)  
Figure 20. 3-Lead, TO-92, Molded, 0.2 In Line Spacing Lead Form, Ammo, Tape and Reel Type  
© 1997 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 / MMBFJ113 Rev. 1.5  
8
Physical Dimensions (Continued)  
0.95  
2.92 0.20  
3
1.40  
+0.20  
-0.15  
1.30  
2.20  
1.00  
1
2
0.60  
0.37  
(0.29)  
0.95  
0.20  
A B  
1.90  
1.90  
LAND PATTERN  
RECOMMENDATION  
SEE DETAIL A  
1.20 MAX  
(0.93)  
0.10  
0.00  
0.10  
C
C
2.40 0.30  
NOTES: UNLESS OTHERWISE SPECIFIED  
GAGE PLANE  
A) REFERENCE JEDEC REGISTRATION  
TO-236, VARIATION AB, ISSUE H.  
B) ALL DIMENSIONS ARE IN MILLIMETERS.  
C) DIMENSIONS ARE INCLUSIVE OF BURRS,  
MOLD FLASH AND TIE BAR EXTRUSIONS.  
D) DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M - 1994.  
0.23  
0.08  
0.25  
0.20 MIN  
(0.55)  
E) DRAWING FILE NAME: MA03DREV10  
SEATING  
PLANE  
SCALE: 2X  
Figure 21. 3-LEAD, SOT23, JEDEC TO-236, LOW PROFILE  
© 1997 Fairchild Semiconductor Corporation  
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 / MMBFJ113 Rev. 1.5  
www.fairchildsemi.com  
9
TRADEMARKS  
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not  
intended to be an exhaustive list of all such trademarks.  
OPTOPLANAR®  
AccuPower¥  
AttitudeEngine™  
Awinda®  
F-PFS¥  
®*  
FRFET®  
Global Power ResourceSM  
GreenBridge¥  
Green FPS¥  
Green FPS¥ e-Series¥  
Gmax¥  
TinyBoost®  
TinyBuck®  
TinyCalc¥  
TinyLogic®  
TINYOPTO¥  
TinyPower¥  
TinyPWM¥  
TinyWire¥  
TranSiC¥  
®
AX-CAP®*  
PowerTrench®  
PowerXS™  
Programmable Active Droop¥  
QFET®  
BitSiC¥  
Build it Now¥  
CorePLUS¥  
CorePOWER¥  
CROSSVOLT¥  
CTL¥  
GTO¥  
IntelliMAX¥  
QS¥  
Quiet Series¥  
RapidConfigure¥  
¥
ISOPLANAR¥  
Making Small Speakers Sound Louder  
and Better™  
MegaBuck¥  
MICROCOUPLER¥  
MicroFET¥  
Current Transfer Logic¥  
DEUXPEED®  
Dual Cool™  
EcoSPARK®  
EfficientMax¥  
TriFault Detect¥  
TRUECURRENT®*  
μSerDes¥  
Saving our world, 1mW/W/kW at a time™  
SignalWise¥  
SmartMax¥  
SMART START¥  
Solutions for Your Success¥  
SPM®  
ESBC¥  
MicroPak¥  
®
UHC®  
MicroPak2¥  
MillerDrive¥  
MotionMax¥  
MotionGrid®  
Ultra FRFET¥  
UniFET¥  
VCX¥  
VisualMax¥  
VoltagePlus¥  
XS™  
Fairchild®  
STEALTH¥  
Fairchild Semiconductor®  
FACT Quiet Series¥  
FACT®  
SuperFET®  
SuperSOT¥-3  
MTi®  
SuperSOT¥-6  
SuperSOT¥-8  
SupreMOS®  
MTx®  
FAST®  
MVN®  
FastvCore¥  
FETBench¥  
FPS¥  
mWSaver®  
Xsens™  
SyncFET¥  
Sync-Lock™  
OptoHiT¥  
௝❺  
™
OPTOLOGIC®  
* Trademarks of System General Corporation, used under license by Fairchild Semiconductor.  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE  
RELIABILITY, FUNCTION, OR DESIGN. TO OBTAIN THE LATEST, MOST UP-TO-DATE DATASHEET AND PRODUCT INFORMATION, VISIT OUR WEBSITE  
AT HTTP://WWW.FAIRCHILDSEMI.COM. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY  
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY  
THEREIN, WHICH COVERS THESE PRODUCTS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE  
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or systems which, (a) are  
intended for surgical implant into the body or (b) support or sustain  
life, and (c) whose failure to perform when properly used in  
accordance with instructions for use provided in the labeling, can be  
reasonably expected to result in a significant injury of the user.  
2. A critical component in any component of a life support, device, or  
system whose failure to perform can be reasonably expected to  
cause the failure of the life support device or system, or to affect its  
safety or effectiveness.  
ANTI-COUNTERFEITING POLICY  
Fairchild Semiconductor Corporation's Anti-Counterfeiting Policy. Fairchild's Anti-Counterfeiting Policy is also stated on our external website, www.fairchildsemi.com,  
under Sales Support.  
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufacturers of semiconductor products are experiencing counterfeiting of their  
parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed  
applications, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the  
proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild  
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problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Datasheet contains the design specifications for product development. Specifications may change  
in any manner without notice.  
Advance Information  
Formative / In Design  
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild  
Semiconductor reserves the right to make changes at any time without notice to improve design.  
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make  
changes at any time without notice to improve the design.  
Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor.  
The datasheet is for reference information only.  
Preliminary  
No Identification Needed  
Obsolete  
First Production  
Full Production  
Not In Production  
Rev. I73  
© Fairchild Semiconductor Corporation  
www.fairchildsemi.com  

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