LB11967V-TLM-E [ONSEMI]
For Variable Speed Fan Motor Single-Phase Full-Wave Pre-Driver; 变速风扇电机单相全波预驱动器
| 型号： | LB11967V-TLM-E |
| 厂家： | 
ONSEMI |
| 描述： | For Variable Speed Fan Motor Single-Phase Full-Wave Pre-Driver |
| 文件： | 总9页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : EN8362C
LB11967V
Monolithic Digital IC
For Variable Speed Fan Motor
http://onsemi.com
Single-Phase Full-Wave Pre-Driver
Overview
The LB11967V is a single-phase bipolar variable speed fan motor pre-driver that works with an external PWM signal.
A highly efficient, quiet and low power consumption motor driver circuit, with a large variable speed, can be
implemented by adding a small number of external components.
This device is optimal for driving large scale fan motors (with large air volume and large current) such as those used in
servers and consumer products.
Functions
• Pre-driver for single-phase full-wave drive
⇒
PNP-EMOS is used as an external power Transistor, enabling high-efficiency low-consumption drive by means
of the low-saturation output and single-phase full-wave drive. (PMOS-NMOS also applicable)
• External PWM input enabling variable speed control
Separately-excited upper direct PWM (f = 25kHz) control method, enabling highly silent speed control
⇒
• Compatible with 12V, 24V, and 48V power supplies
• Current limiter circuit incorporated
⇒
Chopper type current limit at start
• Reactive current cut circuit incorporated
Reactive current before phase change is cut to enable silent and low-consumption drive.
• Minimum speed setting pin
Minimum speed can be set with external resistor. The start assistance circuit enables start at extremely low speed.
⇒
⇒
• Constant-voltage output pin for Hall bias
• Lock protection and automatic reset functions incorporated
• (Rotation speed detection), RD (Lock detection) output
Semiconductor Components Industries, LLC, 2013
May, 2013
61610 SY/91708 MS / 72308 MS 20080703-S00002 / 92706 / 81005 SY PC No.8362-1/9
LB11967V
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
V
maximum supply voltage
V
max
max
max
18
50
18
10
8
CC
CC
OUT pin maximum output current
OUT pin output withstand voltage
HB maximum output current
I
mA
V
OUT
V
OUT
I
max
mA
V
HB
VTH input pin withstand voltage
V
max
VTH
/V
RD/FG output pin output
withstand voltage
V
I
max
18
V
RD FG
RD/FG output current
/I
max
10
800
mA
RD FG
Allowable power dissipation
Operating temperature range
Storage temperature range
Pd max
Topr
Mounted on a specified board*
mW
°C
-30 to +95
-55 to +150
Tstg
°C
*Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Recommended Operating Conditions at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
V
supply voltage
V
6 to 16
0 to 7
CC
CC
VTH input level voltage range
VTH
Full speed mode
V
Hall input common phase input
voltage range
VICM
0.2 to 3
V
Electrical Characteristics at Ta = 25°C, V
= 12V, unless otherwise specified.
CC
Ratings
typ
Parameter
Circuit current
Symbol
Conditions
Unit
min
max
14
I
I
1
2
During drive
6
6
10
mA
mA
V
CC
During lock protection
CC
10
14
6VREG voltage
6VREG
I
I
I
= 5mA
5.80
1.05
12.0
4.35
1.45
18
6.0
6.15
6VREG
HB voltage
V
= 5mA
1.22
12.8
4.55
1.65
25
1.35
13.6
4.75
1.85
32
V
HB
HB
VOVER voltage
V
= 1mA
V
VOVER
VOVER
CPWM-H level voltage
CPWM-L level voltage
CPWM oscillation frequency
CT pin H level voltage
CT pin L level voltage
ICT pin charge current
ICT pin discharge current
ICT charge/discharge current ratio
OUT-N output voltage
OUT-P sink current
V
V
CRH
V
V
CRL
FPWM
C = 100pF
kHz
V
V
3.4
1.4
1.6
0.16
8
3.6
1.6
2.0
0.20
10
3.8
CTH
V
1.8
V
CTL
I
I
1
V
V
I
= 1.2V
= 4.0V
2.5
μA
μA
deg
V
CT
CT
CT
2
0.28
12
CT
RCT
1/I
2
CT CT
V
I
= 20mA
O
4
10
ON
I
15
20
mA
mV
OP
Hall input sensitivity
VHN
Zero peak value
10
20
(including offset and hysteresis)
RD/FG output pin L voltage
RD/FG output pin leak current
V
/V
I
/I
RD FG
= 5mA
= 16V
0.15
0.3
30
V
RD FG
I
/I
V
/V
μA
RDL FGL
RD FG
No.8362-2/9
LB11967V
Package Dimensions
unit : mm (typ)
3179C
Pd max -- Ta
Mounted on specified board: 114.3×76.1×1.6mm3
1000
800
600
400
200
0
6.5
glass epoxy board
20
11
352
1
10
0.22
0.65
0.15
(0.33)
--30
--10
10
30
50
70
90
110
Ambient temprature, Ta -- °C
PCA00204
SSOP20(225mil)
Pin Assignment
OUT2P
OUT2N
1
2
3
4
5
6
7
8
9
20 OUT1P
19 OUT1N
18 VOVER
17 SGND
16 6VREG
15 ROFF
14 CT
V
CC
VLIM
SENSE
RMI
VTH
+
CPWM
FG
13 IN
12 HB
-
11 IN
RD 10
Top view
Truth Table
During full-speed rotation
-
+
IN
IN
CT
OUT1P
OUT1N
OUT2P
OUT2N
FG
L
RD
L
Mode
H
L
L
H
L
L
L
H
L
OFF
L
H
L
OUT1 → 2 drive
OUT2 → 1 drive
L
OFF
OFF
OFF
OFF
L
H
L
OFF
OFF
H
L
H
OFF
Lock protection
H
H
OFF
-
+
VTH
L
CPWM
H
IN
IN
OUT1P
OUT1N
OUT2P
OUT2N
Mode
H
L
L
H
L
L
L
H
L
OFF
L
H
L
OUT1 → 2 drive
OUT2 → 1 drive
OFF
OFF
OFF
H
L
OFF
OFF
H
L
During rotation
H
L
Regeneration in lower Tr
H
H
No.8362-3/9
LB11967V
Block Diagram
No.8362-4/9
LB11967V
Sample Application Circuit 1 (12V)
CB=~0.022μF
RB=10kΩ
Vz=18V
ROUT=100Ω
SOP8901
RF
RFG,RRD=10k~100kΩ
V
CC
RD
FG
VOVER
HB
SENSE
VLIM
-
6VREG
H
IN
+
IN
6VREG
RMI
ROFF
R=0~5kΩ
OUT1P
VTH
CPWM
CT
OUT1N
OUT2P
PWM-IN
CP=100pF
25kHz
OUT2N
CT=0.47μF
SGND
No.8362-5/9
LB11967V
Sample Application Circuit 2 (24V, 48V)
RF
V
CC
RD
FG
VOVER
HB
SENSE
-
6VREG
H
IN
VLIM
+
IN
6VREG
RMI
ROFF
OUT1P
VTH
OUT1N
OUT2P
PWM-IN
CPWM
CP=100pF
OUT2N
CT
SGND
No.8362-6/9
LB11967V
*1. <Power supply-GND wiring>
SGND is connected to the control circuit power supply system.
*2. <Power stabilization capacitor for regeneration>
For the CM capacitor that is a power stabilization capacitor for PWM drive and for absorption of kick-back, the
capacitance uses 0.1μF or more. In this IC, the lower Transistor performs current regeneration by means of
switching of upper Transistor. Connect CM between V
route.
and GND with the thick pattern and along the shortest
CC
*3. <Zener diode to stabilize power supply for regneration>
Be sure to use the zener diode if kick-back causes excessive increase of the supply voltage because such increase
damages IC.
*4. <Hall input>
Wiring need to be short to prevent carrying of the noise. If the noise is carried, insert a capacitor between IN+ and
IN-. The Hall input circuit is a comparator having a hysteresis of 20mV. It is recommended that the Hall input level
is more than three times (60mVp-p) this hysteresis.
*5. <Capacitor to set the PWM oscillation frequency>
With CP = 100pF, oscillation occurs at f = 25kHz and provides the basic frequency of PWM.
*6. <RD output>
This is the open collector output, which outputs “L” during rotation and “H” at stop. This output is left open when
not used.
*7. <FG output>
This is the open collector output, which can detect the rotation speed using the FG output according to the phase shift.
This output is left open when not used.
*8. <HB pin>
This is a Hall element bias pin, that is, the constant-voltage output pin.
*9. <RMI pin>
This is the minimum speed setting pin, which is pulled up with 6VREG when not used.
When IC power may possibly be turned OFF first when the pin is used, be sure to insert a current limiting resistor to
prevent inflow of the large current. (The same applies to the VTH pin.)
*10. <ROFF pin>
This pin sets the soft switching time to cut the reactive current before phase change and is connected to 6VREG
when not used.
*11. <VLIM pin>
This pin activates the current limiter when the SENSE pin voltage is higher than the VLIM pin voltage and is
connected to 6VREG when not used.
*12. <SENSE pin>
This is connected to GND when not used.
*13. <VOVER pin>
This is a pin for constant-voltage bias and should be used for application of 24V and 48V. (Refer to the sample
application circuit.) Be sure to use the current limiting resistor. This is left open when not used.
No.8362-7/9
LB11967V
Control Timing Chart
VTH voltage
f=25kHz (CP=100pF)
ON-Duty-large
4.55V
RMI voltage
CPWM
1.65V
ON-Duty-small
PMW-IN disconnected
0V
Rotation set to
minimum speed
PWM control variable speed
Low speed High speed
Full speed
(Stop mode)
12V
V
CC
0V
FG
(1) Minimum speed setting (stop) mode
PWM-IN input is filtered to generate the VTH voltage. At low speed, the fan rotates with the minimum speed set with
RMI pin during low speed. If the minimum speed is not set (RMI = 6VREG), the fan stops.
(2) Low⇔High speed mode
PWM control is made through comparison of oscillation and VTH voltages with CPWM changing between
1.6V⇔4.6V.
When the VTH voltage is lower, the IC switches to drive mode. When the VTH voltage is higher, the p-channel FET
is turned off and coil current is regenerated through the low-side FET. Therefore, as the VTH voltage lowers, the
output ON-DUTY increases, increasing the coil current and raising the motor speed.
The rotation speed is fed back by the FG output.
(3) Full speed mode
The full-speed mode becomes effective with the VTH voltage of 1.65V or less. (VTH must be equal to GND when the
speed control is not to be made.)
(4) PWM-IN input disconnection mode
When the PWM-IN input pin is disconnected, VTH becomes 1.65V or les and the output enables full drive at 100%.
The fan runs at full speed. (Refer to the sample application circuit.)
No.8362-8/9
LB11967V
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no
warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose, nor does SCILLC assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical
experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use
as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in
which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for
any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or
death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the
part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PS No.8362-9/9
相关型号：
©2020 ICPDF网 联系我们和版权申明