LC898122AXA [ONSEMI]
Optical Image Stabilization / Auto Focus Controller & Driver;
| 型号： | LC898122AXA |
| 厂家： | 
ONSEMI |
| 描述： | Optical Image Stabilization / Auto Focus Controller & Driver |
| 文件： | 总12页 (文件大小：262K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LC898122AXA
CMOS LSI
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Optical Image Stabilization (OIS) /
Auto Focus (AF)
Controller & Driver
Overview
LC898122AXA is a system LSI (WLP type) integrating a digital signal
processing function for Optical Image Stabilization (OIS) / Auto Focus
(AF) control and driver.
WLCSP30, 2.59x1.99
Function
Motor Driver
OIS control & drive H bridge 2ch, I max : 220mA
AF control & driver H bridge/constant current 1ch :
150mA
Digital signal processing
Built-in digital servo circuit
Built-in Gyro filter
O
AD converter
12bit
Input 3ch
Package
WLCSP30, 2.59mm 1.99mm,
thickness Max. 0.45mm, with B/C
Pd-Free / Halogen Free
Equipped with a sample-hold circuit
DA converter
8bit
Power Supply Voltage
AD/DA/VGA/LDO/OSC : AVDD30 = 2.6V to 3.6V
Digital I/O
Driver
Core Logic
Output 3ch
Built-in Serial I/F circuit (2-wire I2C-Bus)
Built-in Hall Bias circuit
Built-in Hall Amp
: DVDD30 = 2.6V to 3.6V
: VM = 2.6V to 3.6V
: Generation in LDO
(Gain of Op-amp :
DVDD12 = typ 1.2V output
6, 12, 50, 75, 100, 150, 200)
Built-in OSC (Oscillator)
Typ. 48MHz (Frequency adjustment function)
Built-in LDO (Low Drop-Out regulator)
Digital Gyro I/F for the companies (SPI Bus)
(Please refer for the details)
* I2C Bus is a trademark of Philips Corporation.
ORDERING INFORMATION
See detailed ordering and shipping information on page 12 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
March 2015 - Rev. 1
1
Publication Order Number :
LC898122AXA/D
LC898122AXA
Block Diagram
Example of wiring diagram [Hall, Closed AF] in LC898122AXA
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2
LC898122AXA
Example of wiring diagram [Hall(OIS), Open AF] in LC898122AXA
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3
LC898122AXA
Package Dimensions
unit : mm
WLCSP30, 2.59x1.99
CASE 567HG
ISSUE O
NOTES:
E
A
B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
PIN A1
REFERENCE
MILLIMETERS
DIM
A
A1
b
MIN
MAX
0.45
0.13
0.25
0.03
0.15
D
2.59 BSC
E
e
1.99 BSC
0.40 BSC
2X
0.05
0.05
C
2X
C
TOP VIEW
DIE COAT
A
0.10
0.05
C
A1
RECOMMENDED
SOLDERING FOOTPRINT*
30X
C
SEATING
PLANE
C
NOTE 3
SIDE VIEW
A1
PACKAGE
OUTLINE
e
30X
C
b
0.05
0.03
A B
F
E
C
0.40
PITCH
e
30X
0.20
D
C
B
0.40
PITCH
e/2
DIMENSIONS: MILLIMETERS
A
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
MountingTechniques Reference Manual, SOLDERRM/D.
1
2
3
4
5
BOTTOM VIEW
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LC898122AXA
Pin Assignment
Bottom view
OUT1
OUT5
OUT4
OUT3
PGND
OUT2
5
4
3
2
OUT6
HLAFBO
HLYBO
DGDATA
DVSS
DGSSB
DGSCLK
OPINMAF
VM
I2CDT
IOP2
I2CCK
IOP1
DVDD30
OPINMX
HLXBO
OPINMY
IOP0
OPINPAF
OPINPX
OPINPY
AVSS
AVDD30
DVDD12
1
F
E
D
C
B
A
Driver
Analog VDD
Analog GND
Digital GND
Digital VDD
Logic Core VDD (Output)
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5
LC898122AXA
<typ> I : INPUT, O : OUTPUT, B : BIDIRECTION, P : Power
Ball No.
Pin Name
type
Description
A1
A2
A3
A4
A5
B1
B2
B3
B4
B5
C1
C2
C3
C4
C5
D1
D2
D3
D4
D5
E1
E2
E3
E4
E5
F1
F2
F3
F4
F5
DVDD12
IOP0
P
B
B
I
LDO Power supply out (Logic Core VDD (typ 1.2V))
General-purpose IOPORT
IOP1
General-purpose IOPORT
I2CCK
OUT1
I2C IF clock
O
P
I
OIS Driver output (H bridge)
AVDD30
OPINMY
IOP2
Analog Power (2.6 to 3.6V)
OIS Hall-Y OpAmp input-
B
B
O
P
I
General-purpose IOPORT/ External Clock input (switch from OSC at Register)
I2C_IF Data
I2CDT
OUT2
OIS Driver output (H bridge)
AVSS
Analog GND
OPINMX
DVDD30
VM
OIS Hall-X OpAmp input-
P
P
P
I
IO Power (2.6V to 3.6V)
Driver Power (2.6V to 3.6V)
PGND
Driver GND
OPINPY
OPINMAF
DGSCLK
DGSSB
OUT3
Hall-Y Bias (Current Drive) for OIS
AF Hall OpAmp input-
I
B
B
O
I
Digital Gyro IF clock / General-purpose IOPORT
Digital Gyro IF Chip Select / General-purpose IOPORT
OIS Driver output (H bridge)
OPINPX
HLXBO
DVSS
Hall-X OpAmp input+ for OIS
Hall-X Bias (Current Driver) for OIS
Logic GND
O
P
B
O
I
DGDATA
OUT4
Digital Gyro IF Data (3wire : Data in/out, 4wire : Data out)
OIS Driver output (H bridge)
OPINPAF
HLYBO
HLAFBO
OUT6
AF Hall OpAmp input+
O
O
O
O
Hall-Y Bias (current drive) for OIS
Hall Bias (current drive) for AF
AF Driver output (H bridge/constant current)
AF Driver output (H bridge/constant current)
OUT5
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LC898122AXA
Pin Description
<typ> I : INPUT, O : OUTPUT, B : BIDIRECTION, P : Power,GND
Pin Description
typ
function change method
(first function in Reset)
Pin name
I2CCK
I2CDT
I
I2C clock input
I2C IF
B
B
I2C data
3-wire Digital Gyro I/f Data
O
B
4-wire Digital Gyro I/f Data output
General-purpose IOPORT
inner signal monitor
Change at Register
DGDATA
O
O
B
3-wire /4-wire Digital Gyro SPI I/f clock
General-purpose IOPORT
inner signal monitor
Digital Gyro IF
DGSCLK
DGSSB
IOP0
Change at Register
Change at Register
O
O
B
3-wire/4-wireDigital Gyro I/f Chip Select
General-purpose IOPORT
inner signal monitor
O
B
General-purpose IOPORT
Change at Register
Change at Register
O
O
B
inner signal monitor
pin for servo evaluation
General-purpose IOPORT
IOP1
IOP2
O
I
inner signal monitor
pin for servo evaluation
4-wire Digital Gyro data input
IOPORT
I
B
General –purpose IOPORT (OpenDrain output)
inner signal monitor
O
I
Change at Register
pin for servo evaluation
I
4-wire Digital Gyro data input
External Clock (all block/OIS_PWM/AF_PWM )
switch External Clock at register CLKSEL[020Ch] from OSC
I
HLXBO
O
O
I
Bias for Hall-X (current drive)
Bia for Hall-Y (current drive)
DAC I/F
OpAmp
HLYBO
OPINPX
Hall-X OpAmp input+ for OIS
OPINMX
OPINPY
OPINMY
OPINPAF
OPINMAF
OUT1
I
Hall-X OpAmp input- for OIS
I
Hall-Y OpAmp input+ for OIS
I
Hall-Y OpAmp input- for OIS
I
Hall OpAmp input+ for AF
I
HallOPAmp input- for AF
O
O
O
O
O
O
P
P
P
P
P
P
P
Driver Saturation-drive H bridge output (1st channel) for OIS
Driver Saturation-drive H bridge output (1st channel) for OIS
Driver Saturation-drive H bridge output (2nd channel) for OIS
Driver Saturation-drive H bridge output (2nd channel) for OIS
Driver Saturation-drive H bridge/constant current output for AF
Driver Saturation-drive H bridge/constant current output for AF
Driver power supply
OUT2
OUT3
Driver I/F
OUT4
OUT5
OUT6
VM
PGND
Driver GND
AVDD30
AGND
Analog power supply
Power
Analog GND
DVDD30
DVDD12
DVSS
IO power supply
Logic power output (LDO output)
Logic GND
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LC898122AXA
Electrical Characteristics
Logic
1) Absolute Maximum Rating at VSS= 0V
Parameter
Power supply
voltage
Symbol
Conditions
Ta ≤ 25C
Ta ≤ 25C
Ta ≤ 25C
Ta ≤ 25C
Ratings
0.3 to 4.6
0.3 to 4.6
Unit
V
V
V
V
VDD30 max
VDD30 max
VAI30,VAO30
VDI30,VDO30
Input/Output
voltage
0.3 to VAD30+0.3
0.3 to VAD30+0.3
Storage
Tstg
55 to 125
C
temperature
Operating
temperature
Topr
30 to 85
C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
2) Alowable Operating Ratings at Ta = 30 to 85C,VSS = 0V
3.0V Power Supply (AVDD30)
Parameter
Power supply voltage
Input voltage range
Symbol
VAD30
VIN
Min
2.6
0
Typ
3.0
-
Max
3.6
3.6
Unit
V
V
3.0V Power Supply (DVDD30)
Paramter
Power supply voltage
Input voltage range
Symbol
VDD30
VIN
Min
2.6
0
Typ
3.0
-
Max
3.6
VDD30
Unit
V
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
3) D.C. Characteristics : Input/Output Vss= 0V, Vdd=2.6 to 3.6V, Vdd2=2.6 to 3.6V, Ta = 30 to 85C
Parameter
Symbol Conditions
Min
1.48
Typ
Max
0.37
0.51
unit
V
V
Applicable pin
I2CCK, I2CDT, IOP2
High-level input voltage
Low-level input voltage
High-level input voltage
Low-level input voltage
High-level output voltage
VIH
VIL
CMOS
schmidt
VIH
VIL
CMOS
supported
1.40
DGDATA, DGSCLK,
DGSSB, IOP0, IOP1
DGDATA, DGSCLK,
DGSSB, IOP0, IOP1,
IOP2
I2CDT
OPINPX, OPINMX,
OPINPY, OPINMY
V
V
VOH
Vdd-0.4
IOH=2m
A
Low-level output voltage
Low-level output voltage
Analog input voltage
VOL
VOL
VAI
IOL= 2mA
IOL= 2mA
0.4
0.2
Vdd2
V
V
V
Vss
50
PullUp resistor
Rup
Rdn
200
220
KΩ DGDATA, DGSCLK,
DGSSB, IOP0, IOP1,
IOP2
KΩ DGDATA, DGSCLK,
DGSSB, IOP0, IOP1,
IOP2
PullDown resistor
50
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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LC898122AXA
Driver
1) Absolute Maximum Ratings
Parameter
Symbol
Condition
Ratings
Symbol
Power supply voltage
Output peak current
VMmax
Iopeak
4.6
300
V
mA
OUT1 to 4
t ≤ 10ms,
ON-duty ≤ 20%
OUT5, OUT6
t ≤ 10ms,
200
mA
ON-duty ≤ 20%
OUT1 to 4
OUT5,OUT6
Output continuous current
Iomax
220
150
mA
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
2) Operating Range
Parameter
Ambient temperature
Power supply voltage
Symbol
Topg
VM
Condition
Ratings
30 to +85
2.6 to 3.6
Symbol
C
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
3) H-Bridge Driver Output at Ta=25C, VM=3.0V
Parameter
Output ON resistance
OUT1 to OUT4
Output ON resistance
OUT5, OUT6
Symbol
Condition
Ratings (Ω)
Symbol
Ronu
Rond
Ronu
Rond
Io=220mA(Pch)
Io=220mA(Nch)
Io=150mA(Pch)
Io=150mA(Nch)
2.0
1.0
1.0
Ω
Ω
Ω
Ω
2.0(*)
(*) include Constant current detect resistance
4) Constant Current Open-AF Driver output at Ta=25C, VM=2.8V
condition 1
condition 2
output current
*1
DAC code of AF Driver
AF_D[9:0]
DAC gain of AF Driver
DGAINDAF(0083h[6:4])
(AF_GAIN_D[2:0])
4
typ
150mA
OUT5, OUT6
3FFh (Full Code)
*1 output current is calculated by registance of VCM and
(the drain-source voltage of Nch Driver Tr) + (sense registance voltage).
ex. In the case of "VM=3V" and "output current=100mA"
(the drain-source voltage of Nch Driver Tr) + (sense registance voltage)= max 0.5V.
VCM registance (Rvcm) = (2.8-0.5) / 0.1 = 23Ω
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LC898122AXA
AC Characteristics
Power Sequence
AVDD30
DVDD30
Min. 0mS
Min. 0mS
(*) Don't care about injection order of VM
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LC898122AXA
I2C Interface Timing
I2C interface timing definition
Item
Symbol
Pin
name
Min
Typ
Max
400
Units
SCL clock frequency
Fscl
tHD,STA
tLOW
I2CCK
KHz
s
s
s
s
s
s
s
s
s
s
START condition
hold time
SCL clock
Low period
SCL clock
High period
Setup time for repetition
START condition
I2CCK
I2CDT
0.6
1.3
I2CCK
I2CCK
tHIGH
tSU,STA
tHD,DAT
tSU,DAT
tr
0.6
I2CCK
I2CDT
I2CCK
I2CDT
I2CCK
I2CDT
I2CCK
I2CDT
I2CCK
I2CDT
I2CCK
I2CDT
I2CCK
I2CDT
0.6
Data hold time
Data setup time
0 (*1)
100
0.9
SDA, SCL
rising time
SDA, SCL
falling time
300
300
tf
STOP condition setup time
tSU,STO
tBUF
0.6
1.3
Bus free time between STOP
and START
(*1) Although the I2C specification defines a condition that 300 ns of hold time is required internally, LC898122XA is
designed for a condition with typ. 30 ns of hold time. If SDA signal is unstable around falling point of SCL signal, please
implement an appropriate treatment on board, such as inserting a resistor
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LC898122AXA
ORDERING INFORMATION
Device
Package
Shipping (Qty / Packing)
5000 / Tape & Reel
WLCSP30, 2.59x1.99
(Pb-Free / Halogen Free)
LC898122AXA-VH
† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiariesin the United States
and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of
SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without
further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose,
nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including
without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can
and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are
not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or
sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers,
employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of,
directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was
negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all
applicable copyright laws and is not for resale in any manner.
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