LC898123AXD-VH [ONSEMI]

Optical Image Stabilization / Auto Focus Controller & Driver;


型号：	LC898123AXD-VH
厂家：	ONSEMI
描述：	Optical Image Stabilization / Auto Focus Controller & Driver 外围集成电路
文件：	总12页 (文件大小：217K)
中文：	中文翻译
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LC898123AXD

CMOS LSI

Optical Image Stabilization (OIS) /

Auto Focus (AF)

Controller & Driver

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Overview

LC898123AXD is a system LSI integrating an on-chip 32bit DSP, a

Flash Memory and peripherals including analog circuits for Optical

Image Stabilization (OIS) / Auto Focus (AF) control and H-bridge

and constant current drivers.

WLCSP35, 3.39x2.3

Features

 On-chip 32-bit DSP

 Built-in software digital servo filter

 Built-in Gyro filter

 Motor Driver

 OIS

Constant current linear driver (2ch, I =195mA)

full

H-bridge driver (2ch, Io max=220mA)

 OP-AF (unidirection)

 Flash Memory

 12k Byte Flash memory to store data and DSP program

Constant current linear driver (1ch, I =125mA)

full

 OP-AF (bidirection)

 Peripherals

 AD converter

 12bit

Constant current linear driver (1ch, I =120mA)

full

 CL-AF

Constant current linear driver (1ch, I =120mA)

 Input 4ch

full

H-bridge driver (1ch, Io max=150mA)

 Equipped with a sample-hold circuit

 DA converter

 8bit

 Package

 WLCSP35 (3.39mm  2.3mm)

 Pb-Free / Halogen Free

 Output 3ch

 Built-in 2-wire Serial I/F circuit

(with clock stretch function)

 Built-in Hall Bias circuit

 Built-in Hall Amp

(Gain of Op-amp : 6, 12, 50, 75, 100, 150, 200)

 Built-in OSC (Oscillator)

 Typ. 41MHz (with Frequency adjustment function)

 Built-in LDO (Low Drop-Out regulator)

 Digital Gyro I/F for various types of gyro (SPI Bus)

 Power Supply Voltage

 AD/DA/VGA/LDO/OSC : AVDD30=2.6V to 3.6V

 Digital I/O : AVDD30=2.6V to 3.6V

 Driver

: VM=2.6V to 3.6V

 Core Logic : Generation by on-chip LDO

DVDD15=1.5V (typ) output

ORDERING INFORMATION

See detailed ordering and shipping information on page 12 of this data sheet.

November 2015 - Rev. 1

Publication Order Number :

LC898123AXD/D

LC898123AXD

Block Diagram

EXCLK

8bit DAC

HLXBO

HLYBO

DSPCLK

ADCLK

PWMCLK

32bit LPDSP

CLK

GEN

OSC 41MHz

PRG

DATA

ROM

(12kB)

FLASH

(12kB)

DVDD15

POR

LDO

SRAM

(12kB)

SRAM

(4kB)

HLAFBO

I2CCK

2-wire I/F

Slave

Host

I2CDT

Timer

DGSCLK

DGSSB

DGDATA

DGDIN

OPINPX

SPI

Master

Digital

Gyro

Hall X

PORT

OPINMX

VGAX

TXD

RXD

UART

OPINPY

Hall Y

EIRQ0

EIRQ1

DAC I/F

ADC I/F

OPINMY

OUT1

OUT2

VGAY

VCM for

OIS X

OPINPAF

OUT3

OUT4

Hall AF

Driver

Control

VCM for

OIS Y

H-Bridge

Driver

OPINMAF

VGAAF

AVDD30

AVSS

OUT5

OUT6

VCM for

12bit ADC

DVSS

MON1

MON2

PGND

Application Diagram

Camera Module

Lens

OIS/AF

Actuator

Hall

Sensor

VCM

Position

Image

EEPROM

Sensor

I²C

SPI

AP/ISP

LC898123AXD

Digital

Gyro

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LC898123AXD

Package Dimensions

unit : mm

WLCSP35, 3.39x2.3

CASE 567JG

ISSUE O

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. COPLANARITY APPLIES TO SPHERICAL

CROWNS OF SOLDER BALLS.

PIN A1

REFERENCE

MILLIMETERS

DIM

MIN

MAX

0.45

0.13

0.25

0.03

0.15

3.39 BSC

2.30 BSC

0.40 BSC

0.10

TOP VIEW

0.10

0.08

RECOMMENDED

SEATING

PLANE

SOLDERING FOOTPRINT*

SIDE VIEW

NOTE 3

PACKAGE

OUTLINE

35X

0.05

0.03

C A B

0.40

PITCH

35X

0.20

0.40

PITCH

DIMENSIONS: MILLIMETERS

*For additional information on our Pb-Free strategy and soldering

details, please download the ON Semiconductor Soldering and

MountingTechniques Reference Manual, SOLDERRM/D.

BOTTOM VIEW

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LC898123AXD

Pin Assignment

Bottom View

OUT5

OUT3

OUT4

PGND

OUT2

I2CDT

EXCLK

OUT1

I2CCK

DGDIN

WPB

TXD

OUT6 DGDATA DGSSB

HLAFBO DGSCLK DVSS

EIRQ1

MON2

OPINM

HLYBO HLXBO

OPINMX OPINMY EIRQ0

OPINP

OPINPX OPINPY

AVSS

AVDD30 DVDD15 MON1

Driver

/ V

Internal Digital V

Output

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LC898123AXD

Pin Description

I/O

Pin Specification

Input

Output

3IC

3IS

3V CMOS Input

3V CMOS Schmitt Input

3IA

3OA

3V Analog Input

3V Analog Output

Bidirection

Power

3ICUD

3V CMOS Input with PullUp/PullDown

3ISUD

3ICD

3ISD

3V CMOS Schmitt Input with PullUp/PullDown

3V CMOS Input with PullDown

3V CMOS Schmitt Input with PullDown

3O2

3T2

3OD

3V 2mA Output

3V 2mA TriState Output

3V 2mA Open Drain Output

Z/U/D

H/L

HiZ/PullUp/PullDown

HIGH/LOW

PAD

3IC

3V CMOS Input

3O2

3T2

3OD

3V 2mA Output

PAD

3V 2mA

TriState

Output

3IS

3V Schmitt Input

PAD CTL

3V CMOS Input

with PullUp/

Pulldown

3V 2mA

Open Drain

Output

3ICUD

3ISUD

3ICD

3ISD

CTL

PAD CTL

3V Schmitt Input

with PullUp/

Pulldown

CTL

PAD

3V CMOS Input

with Pulldown

CTL

PAD

3V Schmitt Input

with Pulldown

CTL

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LC898123AXD

I/O

I/O Spec

Primary Function

Sub Functions

Init

I2C Data I/O for DAC Monitor

Servo Monitor Analog Out

Internal Signal Monitor

3T2

A1 MON1

3ICUD

(Debugger Data Output)

3OA

I2C Data I/O for DAC Monitor

Servo Monitor Analog Out

Internal Signal Monitor

3T2

A2 MON2

(Debugger Data Input)

3OA

I2C Data I/O for DAC Monitor

UART Data Output(TXD)

Internal Signal Monitor

Servo Monitor Analog Input

I2C Data I/O for DAC Monitor

I2C Clock for I2C Slave

External IRQ1

3T2

3OA

A3 EIRQ1

A4 TXD

A5 WPB

3ISUD

3ICUD

3ICD

External Clock Input

3T2

UART Data Output

Internal Signal Monitor

Write Protect Input

B1 DVDD15

B2 EIRQ0

Internal LDO Power Output

I2C Data I/O for DAC Monitor

UART Data Input(RXD)

Internal Signal Monitor

3ICD

3OD External IRQ0

I2C Data I/O for DAC Monitor

Internal Signal Monitor

Digital Gyro Data Input

(4 Wired)

B3 DGDIN

B4 I2CCK

B5 OUT1

3ICUD

3IS

3T2

3OD I2C Clock

OIS Driver Output

(H-Bridge or Linear)

3OA

C1 AVDD30

C2 OPINMY

Analog Power (2.6 to 3.6V)

3IA

3ISD

3IS

OIS Hall Y Op-amp Input Minus

External Clock Input

External IRQ1

I2C Data I/O for DAC Monitor

Internal Signal Monitor

C3 EXCLK

C4 I2CDT

C5 OUT2

3OD

3OD I2C Data

OIS Driver Output

3OA

(H-Bridge or Linear)

D1 AVSS

D2 OPINMX

D3 NC

Analog GND

3IA

OIS Hall X Op-amp Input Minus

No Connection

D4 VM

Driver Power (2.6V to 3.6V)

Driver GND

D5 PGND

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LC898123AXD

I/O

I/O Spec

3IA

Primary Function

Sub Functions

Init

E1 OPINPY

OIS Hall Y Op-amp Input Plus

OPINMA

3IA

AF Hall Op-amp Input Minus

Logic GND

E3 DVSS

Digital Gyro I/F Chip Select Input

Digital Gyro I/F Chip Select Output

OIS Driver Output

Digital Gyro I/F Chip Select Output

Internal Signal Monitor

E4 DGSSB

3ICUD

3T2

E5 OUT4

3OA

(H-Bridge or Linear)

F1 OPINPX

F2 HLXBO

3IA

OIS Hall X Op-amp Input Plus

3OA OIS Hall X Bias Output

Digital Gyro I/F Clock Input

3T2

Digital Gyro Clock Output

I2C Clock for I2C Slave

F3 DGSCLK

3ICUD

Digital Gyro I/F Clock Output

Digital Gyro I/F Data I/O(3 Wired)

I2C Data for I2C Slave

Digital Gyro Data I/F Output

(4 Wired)

F4 DGDATA

F5 OUT3

3T2

OIS Driver Output

3OA

(H-Bridge or Linear)

G1 OPINPAF

G2 HLYBO

G3 HLAFBO

G4 OUT6

3IA

AF Hall Op-amp Input Plus

3OA OIS Hall Y Bias Output

3OA AF Hall Bias Output

3OA AF Driver Output (H-Bridge, Linear)

G5 OUT5

[How to select the function]

The initial function right after reset is set to be “Function A1” in the below table.

You can change the function by CmIOPN, CmMstMode, CmExtClkSel.

One of Function A,B,C… can be selected by

CmIOPN [N=0,1,2,…10] register.

Primary Function

Function A1

Function A2

Sub Functions

Function B

Function C

PINNAME

DGSSB, DGSCLK: CmMstMode selects A1 or A2.

EXCLK, EIRQ1: CmExtClkSel selects A1 or A2.

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LC898123AXD

Electrical Characteristics

Logic

Absolute Maximum Rating at V =0V

Parameter

Symbol

30 max

Conditions

Ta ≤ 25C

Ratings

0.3 to 4.6

Unit

Power supply voltage

30, V 30

0.3 to V 30+0.3

Input/Output voltage

30, V 30

0.3 to V 30+0.3

Storage temperature

Operating temperature

Tstg

Topr

55 to 125

30 to 85

C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,

damage may occur and reliability may be affected.

Allowable Operating Ratings at Ta=30 to 85C, V =0V

3.0V Power Supply (AV 30)

Parameter

Symbol

Min

2.6

Typ

2.8

Max

3.6

Unit

V 30

Power supply voltage

Input voltage range

V 30

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended

Operating Ranges limits may affect device reliability.

D.C. Characteristics at Input/Output V = 0V, AV 30=2.6 to 3.6V, Ta =30 to 85C

Parameter

Symbol

VIH

Conditions

Min

Typ

Max

0.37

0.51

Unit

Applicable I/O

High-level input voltage

Low-level input voltage

High-level input voltage

Low-level input voltage

1.48

CMOS

schmitt

3IS, 3ISUD,

3ISD

VIL

VIH

1.40

CMOS

supported

3IC, 3ICUD,

3ICD

VIL

AV 30

0.4

High-level output

voltage

Low-level output

voltage

Low-level output

voltage

VOH

IOH=2mA

IOL= 2mA

3O2, 3T2

3OD

VOL

0.4

0.2

AV 30

Analog input voltage

PullUp resistor

VAI

3IA

Rup

200

kΩ

3ICUD, 3ISUD

3ICUD, 3ISUD,

3ISD, 3ICD

PullDown resistor

Rdn

220

kΩ

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be

indicated by the Electrical Characteristics if operated under different conditions.

Non-volatile Memory Characteristics

Parameter

Endurance

Data retention

Symbol

Condition

Min

Typ

Max

1000

Unit

Cycles

Years

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LC898123AXD

Driver

Absolute Maximum Ratings

Parameter

Symbol

Condition

Ratings

Symbol

Power supply voltage

Output peak current

VM max

4.6

OUT1 to 4

T ≤ 10ms,

ON-duty ≤ 20%

OUT5, OUT6

t ≤ 10ms,

300

Iopeak

200

ON-duty ≤ 20%

OUT1 to 4

220

150

Output continuous

current

Iomax

OUT5, OUT6

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,

damage may occur and reliability may be affected.

Allowable Operating Range

Parameter

Symbol

Topg

Condition

Ratings

30 to +85

2.6 to 3.6

Symbol

Ambient temperature

Power supply voltage

C

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended

Operating Ranges limits may affect device reliability.

H-Bridge Driver Output Characteristics at Ta=25C, AV 30=VM=3.0V

Parameter

Symbol

Ronu

Rond

Ronu

Rond

Condition

Ratings (Ω)

1.1

Symbol

Io=220mA (Pch)

Io=220mA (Nch)

Io=150mA (Pch)

Io=150mA (Nch)

Ω

Output ON resistance

OUT1 to OUT4

1.3(*)

1.5

Output ON resistance

OUT5, OUT6

1.4(*)

(*) include Constant current detect resistance

Constant Current Driver Output at Ta=25C, AV 30=VM=2.8V

Parameter

Output Current

OUT1 to OUT4

Symbol

Condition

OIS_DA[10:0]=7FFh

OIS_DB[10:0]=7FFh

OP-AF(unidirection)

AF_D[9:0]=3FFh

OP-AF(bidirection)

CL-AF

Min

Typ

Max

Unit

185.5

195.0

205.0

125.0

120.0

full

Output Current

OUT5, OUT6

AF_D[9:0]=3FFh

Compliance Voltage

OUT1 to OUT4

0.4

0.5

Vcomp

OP-AF(unidirection)

OP-AF(bidirection)

CL-AF

Compliance Voltage

OUT5,OUT6

Total output current is less than 500mA.

OP-AF (unidirection)

VCM registance (Rvcm) = (VM  Vcomp)/Io [Ω]

OP-AF (bidirection) / CL-AF / OIS

VCM registance (Rvcm) = (VM  (Ronu  Io+Vcomp))/Io [Ω]

Output ON resistance (Ron) = VM / Io – Rvcm [Ω]

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be

indicated by the Electrical Characteristics if operated under different conditions.

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LC898123AXD

AC Characteristics

Power Sequence

Item

Symbol

Min

100

Typ

Max

Units

Rise time

Wait time

Bottom Voltage

Vbot

0.2

Injection order between AVDD30 and VM is below.

VM  AVDD30 + 0.5V

(VM  3.6V)

WPB must be open or pull down normally. When Erase or Program is made to Flash, WPB have to be High.

Before power off of AVDD, Flash I/F must reset and OSC must set to standby.

I2CDT,I2CCK,EXCLK and EIRQ0 tolerate 3V input at the time of power off.

The data in the flash memory may be rewrited if you do not keep specifications.

And it is forbidden to power off during flash access. The data in the flash memory may be rewrited.

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LC898123AXD

2-wire serial Interface Timing

The communication protocol is compatible with I²C (Fast mode Plus). This circuit has clock stretch function.

I²C interface timing definition

name

Item

Symbol

Fscl

Min

Typ

Max

1000

Units

kHz

s

SCL clock frequency

I2CCK

START condition

hold time

I2CCK

I2CDT

tHD,STA

tLOW

0.26

SCL clock

Low period

SCL clock

High period

I2CCK

0.5

0.26

0 (*1)

s

tHIGH

s

Setup time for repetition

START condition

I2CCK

I2CDT

I2CCK

I2CDT

I2CCK

I2CDT

I2CCK

I2CDT

I2CCK

I2CDT

I2CCK

I2CDT

I2CCK

I2CDT

tSU,STA

tHD,DAT

tSU,DAT

s

Data hold time

Data setup time

0.9

s

SDA, SCL

rising time

SDA, SCL

falling time

120

STOP condition setup time

tSU,STO

tBUF

0.26

0.5

s

Bus free time between STOP

and START

s

(*1) Although the I²C specification defines a condition that 300 ns of hold time is required internally,

LC898123AXD is designed for a condition with typ. 100 ns of hold time. If SDA signal is unstable

around falling point of SCL signal, please implement an appropriate treatment on board, such as

inserting a resistor.

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LC898123AXD

ORDERING INFORMATION

Device

Package

Shipping (Qty / Packing)

4000 / Tape & Reel

WLCSP35, 3.39x2.3

(Pb-Free / Halogen Free)

LC898123AXD-VH

† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel

Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF

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and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of

SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without

further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose,

nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including

without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can

and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each

customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are

not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or

sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers,

employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of,

directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was

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LC898123AXD-VH [ONSEMI]

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