M74HCT4066ADTR2G [ONSEMI]
四路模拟开关/多工器/信号分离器/带 LSTTL 兼容输入;
| 型号： | M74HCT4066ADTR2G |
| 厂家： | 
ONSEMI |
| 描述： | 四路模拟开关/多工器/信号分离器/带 LSTTL 兼容输入 开关 |
| 文件： | 总13页 (文件大小：174K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74HCT4066A
Quad Analog Switch/
Multiplexer/Demultiplexer
with LSTTL Compatible
Inputs
http://onsemi.com
MARKING
High−Performance Silicon−Gate CMOS
The MC74HCT4066A utilizes silicon−gate CMOS technology to
achieve fast propagation delays, low ON resistances, and low
OFF−channel leakage current. This bilateral switch/
multiplexer/demultiplexer controls analog and digital voltages that
DIAGRAMS
14
SOIC−14
D SUFFIX
CASE 751A
HCT4066AG
AWLYWW
14
14
may vary across the full power−supply range (from V to GND).
CC
1
The HCT4066A is identical in pinout to the metal−gate CMOS
MC14016 and MC14066. Each device has four independent switches.
1
The device has been designed so the ON resistances (R ) are more
ON
linear over input voltage than R
switches.
of metal−gate CMOS analog
ON
14
HCT40
66A
ALYWꢀ
ꢀ
TSSOP−14
DT SUFFIX
CASE 948G
The ON/OFF control inputs are compatible with standard CMOS and
LSTTL outputs. For analog switches with voltage−level translators, see
the HC4316A.
1
1
A
L, WL
Y, YY
= Assembly Location
= Wafer Lot
= Year
Features
• Fast Switching and Propagation Speeds
• High ON/OFF Output Voltage Ratio
• Low Crosstalk Between Switches
• Diode Protection on All Inputs/Outputs
W, WW = Work Week
G or = Pb−Free Package
ꢀ
(Note: Microdot may be in either location)
• Wide Power−Supply Voltage Range (V − GND) = 4.5 to 5.5 V
CC
• Analog Input Voltage Range (V − GND) = 0 to 5.5 V
CC
• Improved Linearity and Lower ON Resistance over Input Voltage
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
than the MC14016 or MC14066
• Low Noise
• Chip Complexity: 44 FETs or 11 Equivalent Gates
• These are Pb−Free Devices
© Semiconductor Components Industries, LLC, 2010
1
Publication Order Number:
November, 2010 − Rev. 1
MC74HCT4066A/D
MC74HCT4066A
1
2
3
X
Y
A
A
V
X
1
2
3
4
5
6
7
14
13
CC
A
13
4
A ON/OFF CONTROL
Y
A
A ON/OFF CONTROL
Y
B
X
B
12 D ON/OFF CONTROL
X
B
Y
B
Y
C
Y
D
11
10
9
X
Y
Y
X
D
D
C
5
8
B ON/OFF CONTROL
C ON/OFF CONTROL
B ON/OFF CONTROL
ANALOG
OUTPUTS/INPUTS
9
X
C
8
GND
C
6
C ON/OFF CONTROL
Figure 1. Pin Assignment
FUNCTION TABLE
11
10
X
D
12
D ON/OFF CONTROL
On/Off Control
State of
Analog Switch
ANALOG INPUTS/OUTPUTS = X , X , X , X
D
A
B
C
Input
PIN 14 = V
CC
L
H
Off
On
PIN 7 = GND
Figure 2. Logic Diagram
ORDERING INFORMATION
Device
†
Package
Shipping
MC74HCT4066ADG
SOIC−14
(Pb−Free)
55 Units / Rail
MC74HCT4066ADR2G
MC74HCT4066ADTR2G
SOIC−14
(Pb−Free)
2500 / Tape & Reel
2500 / Tape & Reel
TSSOP−14*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
http://onsemi.com
2
MC74HCT4066A
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
V
Positive DC Supply Voltage (Referenced to GND)
Analog Input Voltage (Referenced to GND)
Digital Input Voltage (Referenced to GND)
DC Current Into or Out of Any Pin
–0.5 to +14.0
CC
V
–0.5 to V + 0.5
V
IS
CC
V
–0.5 to V + 0.5
V
in
CC
I
25
mA
mW
cuit. For proper operation, V and
in
P
D
Power Dissipation in Still Air,
SOIC Package†
TSSOP Package†
500
450
V
out
should be constrained to the
range GND v (V or V ) v V
.
in
out
CC
Unused inputs must always be
tied to an appropriate logic voltage
T
stg
Storage Temperature
–65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
level (e.g., either GND or V ).
CC
Unused outputs must be left open.
I/O pins must be connected to a
properly terminated line or bus.
†Derating
−
SOIC Package: – 7 mW/°C from 65°C to 125°C
TSSOP Package: − 6.1 mW/°C from 65°C to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Positive DC Supply Voltage (Referenced to GND)
Analog Input Voltage (Referenced to GND)
Digital Input Voltage (Referenced to GND)
Static or Dynamic Voltage Across Switch
Operating Temperature, All Package Types
Min
4.5
Max
Unit
V
V
CC
5.5
V
IS
GND
GND
−
V
V
CC
CC
V
in
V
V
V *
IO
1.2
V
T
A
–55
+125
°C
ns
t , t
Input Rise and Fall Time, ON/OFF Control Inputs
(Figure 10)
r
f
V
CC
= 4.5 V
0
500
*For voltage drops across the switch greater than 1.2 V (switch on), excessive V current may be drawn; i.e., the current out of the switch may
CC
contain both V and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
CC
DC ELECTRICAL CHARACTERISTIC Digital Section (Voltages Referenced to GND)
Guaranteed Limit
– 55 to
V
CC
25°C
v 85°C
v 125°C
V
Symbol
Parameter
Test Conditions
Unit
V
IH
Minimum High−Level Voltage
ON/OFF Control Inputs
R
R
= Per Spec
4.5 to 5.5
2.0
0.8
0.1
2
2.0
2.0
V
on
on
V
IL
Maximum Low−Level Voltage
ON/OFF Control Inputs
= Per Spec
4.5 to 5.5
5.5
0.8
1.0
20
0.8
1.0
40
V
I
in
Maximum Input Leakage Current
ON/OFF Control Inputs
V
in
= V or GND
ꢀ A
ꢀ A
ꢀ A
CC
I
Maximum Quiescent Supply Current
(per Package)
V
V
= V or GND
5.5
CC
in
IO
CC
= 0 V
ꢁ I
CC
Additional Quiescent Supply Current
(per Input)
V
in
= V − 2.1 V
4.5 to 5.5
360
450
490
CC
Other control inputs at V
or GND
CC
http://onsemi.com
3
MC74HCT4066A
DC ELECTRICAL CHARACTERISTICS Analog Section (Voltages Referenced to GND)
Guaranteed Limit
– 55 to
V
CC
25°C
v 85°C v 125°C
V
Symbol
Parameter
Test Conditions
= V
Unit
R
Maximum “ON” Resistance
V
V
I
4.5
120
160
200
ꢂ
on
in
IH
= V to GND
IS
CC
v 2.0 mA (Figures 3, 4)
S
V
V
= V
4.5
70
85
120
in
IH
= V or GND
IS
CC
(Endpoints)
I
v 2.0 mA (Figures 3, 4)
S
ꢁ R
Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Package
V
V
I
= V
4.5
5.5
5.5
20
0.1
0.1
25
0.5
0.5
30
1.0
1.0
ꢂ
on
in
IH
= 1/2 (V − GND)
IS
CC
v 2.0 mA
S
I
off
Maximum Off−Channel Leakage
Current, Any One Channel
V
V
= V
ꢀ A
ꢀ A
in
IL
= V or GND
CC
IO
Switch Off (Figure 5)
I
on
Maximum On−Channel Leakage
Current, Any One Channel
V
V
= V
IH
in
= V or GND
IS
CC
(Figure 6)
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, ON/OFF Control Inputs: t = t = 6 ns)
L
r
f
Guaranteed Limit
– 55 to
V
CC
25°C
v 85°C v 125°C
V
Symbol
Parameter
Unit
t
t
t
,
Maximum Propagation Delay, Analog Input to Analog Output
(Figures 10 and 11)
4.5
10
30
25
10
13
38
32
10
15
45
37
10
ns
PLH
t
PHL
,
Maximum Propagation Delay, ON/OFF Control to Analog Output
(Figures 12 and 13)
4.5
4.5
−
ns
ns
pF
PLZ
t
PHZ
,
Maximum Propagation Delay, ON/OFF Control to Analog Output
(Figures 12 and 13)
PZL
t
PZH
C
Maximum Capacitance
ON/OFF Control Input
Control Input = GND
Analog I/O
−
−
35
1.0
35
1.0
35
1.0
Feedthrough
Typical @ 25°C, V = 5.0 V
CC
15
C
Power Dissipation Capacitance (Per Switch) (Figure 15)*
pF
PD
2
*Used to determine the no−load dynamic power consumption: P = C
V
f + I
V
.
D
PD CC
CC CC
http://onsemi.com
4
MC74HCT4066A
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Limit*
25°C
54/74HCT
V
V
CC
Symbol
Parameter
Test Conditions
= 1 MHz Sine Wave
Unit
BW
Maximum On−Channel Bandwidth or
Minimum Frequency Response
(Figure 7)
f
in
MHz
Adjust f Voltage to Obtain 0 dBm at V
in
OS
Increase f Frequency Until dB Meter Reads – 3 dB
in
R = 50 ꢂ, C = 10 pF
4.5
150
L
L
−
−
Off−Channel Feedthrough Isolation
(Figure 8)
f
ꢀ Sine Wave
dB
in
Adjust f Voltage to Obtain 0 dBm at V
in IS
f
= 10 kHz, R = 600 ꢂ, C = 50 pF
4.5
4.5
−50
−40
in
L
L
f
= 1.0 MHz, R = 50 ꢂ, C = 10 pF
L L
in
Feedthrough Noise, Control to
Switch
V
v 1 MHz Square Wave (t = t = 6 ns)
mV
in
r
f
PP
Adjust R at Setup so that I = 0 A
L
S
(Figure 9)
4.5
4.5
60
30
R = 600 ꢂ, C = 50 pF
L
L
R = 10 kꢂ, C = 10 pF
L
L
−
Crosstalk Between Any Two
Switches
(Figure 14)
f
ꢀ Sine Wave
dB
%
in
Adjust f Voltage to Obtain 0 dBm at V
in
IS
f
= 10 kHz, R = 600 ꢂ, C = 50 pF
4.5
4.5
–70
–80
in
L L
f
= 1.0 MHz, R = 50 ꢂ, C = 10 pF
L L
in
THD
Total Harmonic Distortion
(Figure 16)
f
in
= 1 kHz, R = 10 kꢂ, C = 50 pF
L
L
THD = THD
− THD
Measured
Source
V
IS
= 4.0 V sine wave
4.5
0.10
PP
*Guaranteed limits not tested. Determined by design and verified by qualification.
http://onsemi.com
5
MC74HCT4066A
200
180
160
140
120
100
80
+25 °C
+125°C
−55°C
60
40
20
0
0.00
0.50
1.00
1.50
2.00
2.50
3.00
3.50
4.00
4.50
V , INPUT VOLTAGE (VOLTS), REFERENCED TO GROUND
is
Figure 3. Typical On Resistance, VCC = 4.5 V
PLOTTER
PROGRAMMABLE
MINI COMPUTER
DC ANALYZER
POWER
SUPPLY
-
+
V
CC
DEVICE
UNDER TEST
ANALOG IN
COMMON OUT
GND
Figure 4. On Resistance Test Set−Up
V
CC
V
CC
V
CC
V
CC
14
14
GND
N/C
A
ON
A
OFF
GND
V
CC
SELECTED
CONTROL
INPUT
SELECTED
CONTROL
INPUT
V
IL
V
IH
7
7
Figure 5. Maximum Off Channel Leakage Current,
Figure 6. Maximum On Channel Leakage Current,
Any One Channel, Test Set−Up
Test Set−Up
http://onsemi.com
6
MC74HCT4066A
V
OS
V
OS
V
CC
V
CC
V
IS
14
14
f
in
f
in
ON
OFF
dB
dB
0.1ꢀ F
0.1ꢀ F
C *
L
C *
L
R
METER
L
METER
SELECTED
CONTROL
INPUT
SELECTED
CONTROL
INPUT
V
CC
7
7
*Includes all probe and jig capacitance.
*Includes all probe and jig capacitance.
Figure 7. Maximum On−Channel Bandwidth
Test Set−Up
Figure 8. Off−Channel Feedthrough Isolation,
Test Set−Up
V
CC
V
CC/2
V
CC/2
14
R
R
L
L
V
OS
I
S
OFF/ON
V
CC
C *
L
50%
ANALOG IN
(V )
SELECTED
CONTROL
INPUT
GND
I
7
V
≤ 1 MHz
f
t
t
PHL
in
t = t = 6 ns
PLH
r
3.0 V
GND
CONTROL
50%
ANALOG OUT
*Includes all probe and jig capacitance.
Figure 9. Feedthrough Noise, ON/OFF Control to
Figure 10. Propagation Delays, Analog In to
Analog Out
Analog Out, Test Set−Up
http://onsemi.com
7
MC74HCT4066A
V
CC
t
r
t
f
14
V
CC
90%
m
10%
CONTROL
ANALOG IN
ANALOG OUT
C *
V
TEST
ON
(V )
I
POINT
GND
L
t
t
t
PLZ
PZL
HIGH
IMPEDANCE
50%
50%
SELECTED
CONTROL
INPUT
V
CC
10%
90%
V
OL
ANALOG
OUT
7
t
PZH
PHZ
V
OH
HIGH
*Includes all probe and jig capacitance.
IMPEDANCE
V = GND to 3.0 V
I
V
m
= 1.3 V
Figure 11. Propagation Delay Test Set−Up
Figure 12. Propagation Delay, ON/OFF Control
to Analog Out
V
IS
1
POSITIONꢀꢀꢁWHEN TESTING t
AND t
PHZ
PZH
V
CC
2
POSITIONꢀꢀWHEN TESTING t AND t
PLZ
PZL
1
2
14
R
V
OS
L
V
CC
f
in
ON
V
CC
0.1 ꢀ F
1 kꢂ
14
1
2
TEST
POINT
OFF
ON/OFF
V
CC
OR GND
R
C *
L
R
C *
L
L
L
C *
L
R
L
SELECTED
CONTROL
INPUT
SELECTED
CONTROL
INPUT
V
CC/2
V
CC/2
7
7
V
CC/2
*Includes all probe and jig capacitance.
*Includes all probe and jig capacitance.
Figure 13. Propagation Delay Test Set−Up
Figure 14. Crosstalk Between Any Two Switches,
Test Set−Up
V
CC
A
V
IS
V
CC
V
OS
14
0.1 ꢀ F
TO
N/C
N/C
OFF/ON
f
in
ON
DISTORTION
METER
C *
L
R
L
V
SELECTED
CONTROL
INPUT
CC/2
7
SELECTED
CONTROL
INPUT
V
CC
7
ON/OFF CONTROL
*Includes all probe and jig capacitance.
Figure 15. Power Dissipation Capacitance
Figure 16. Total Harmonic Distortion, Test Set−Up
Test Set−Up
http://onsemi.com
8
MC74HCT4066A
0
-ꢂ10
-ꢂ20
-ꢂ30
-ꢂ40
FUNDAMENTAL FREQUENCY
-ꢂ50
-ꢂ60
-ꢂ70
-ꢂ80
-ꢂ90
DEVICE
SOURCE
1.0
2.0
FREQUENCY (kHz)
3.0
Figure 17. Plot, Harmonic Distortion
APPLICATION INFORMATION
analog signal of twelve volts peak−to−peak can be
controlled.
Unused analog inputs/outputs may be left floating (not
connected). However, it is advisable to tie unused analog
When voltage transients above V and/or below GND
CC
are anticipated on the analog channels, external diodes (Dx)
are recommended as shown in Figure 17. These diodes
should be small signal, fast turn−on types able to absorb the
maximum anticipated current surges during clipping. An
alternate method would be to replace the Dx diodes with
MOSORB® (MOSORB is an acronym for high current
surge protectors). MOSORBs are fast turn−on devices
ideally suited for precise DC protection with no inherent
wear out mechanism.
inputs and outputs to V or GND through a low value
CC
resistor. This minimizes crosstalk and feedthrough noise
that may be picked−up by the unused I/O pins.
The maximum analog voltage swings are determined by
the supply voltages V and GND. The positive peak analog
CC
voltage should not exceed V . Similarly, the negative peak
CC
analog voltage should not go below GND. In the example
below, the difference between V and GND is twelve volts.
CC
Therefore, using the configuration in Figure 16, a maximum
V
CC
V
CC
V
CC
= 5 V
D
D
D
D
14
x
x
x
x
16
+ 5 V
0 V
+ 5 V
0 V
ANALOG I/O
ANALOG O/I
ON
ON
SELECTED
CONTROL
INPUT
SELECTED
CONTROL
INPUT
V
CC
OTHER CONTROL
INPUTS
OTHER CONTROL
INPUTS
7
7
Figure 18. 5 V Application
Figure 19. Transient Suppressor Application
http://onsemi.com
9
MC74HCT4066A
+ꢂ5 V
+ꢂ5 V
14
14
ANALOG
SIGNALS
ANALOG
SIGNALS
ANALOG
SIGNALS
ANALOG
SIGNALS
R* R* R* R*
HC4066A
HCT4066A
LSTTL/
NMOS
LSTTL/
NMOS
5
6
5
6
CONTROL
INPUTS
CONTROL
INPUTS
14
15
14
15
7
7
R* = 2 TO 10 kꢂ
a. Using Pull-Up Resistors with HC Device
b. Using HCT Buffer
Figure 20. LSTTL/NMOS to HCTMOS Interface
1 OF 4
CHANNEL 4
CHANNEL 3
CHANNEL 2
CHANNEL 1
SWITCHES
1 OF 4
SWITCHES
COMMON I/O
1 OF 4
SWITCHES
-
+
1 OF 4
OUTPUT
1 OF 4
INPUT
SWITCHES
LF356 OR
SWITCHES
EQUIVALENT
0.01 ꢀ F
1
2
3
4
CONTROL INPUTS
Figure 21. 4−Input Multiplexer
Figure 22. Sample/Hold Amplifier
http://onsemi.com
10
MC74HCT4066A
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−A−
14
8
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−B−
P 7 PL
M
M
B
0.25 (0.010)
7
1
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
F
R X 45ꢁ
C
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
1.27 BSC
0.19
0.10
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
−T−
J
M
K
SEATING
D 14 PL
PLANE
M
S
S
0.25 (0.010)
T
B
A
0 ꢁ
5.80
0.25
7ꢁ
0 ꢁ
7ꢁ
6.20 0.228 0.244
0.50 0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
11
MC74HCT4066A
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G−01
ISSUE B
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
M
S
S
V
ANSI Y14.5M, 1982.
0.10 (0.004)
T
U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
S
0.15 (0.006) T
U
N
0.25 (0.010)
14
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
8
2X L/2
M
B
L
N
−U−
PIN 1
IDENT.
F
7
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
DETAIL E
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T
U
A
−V−
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
K1
A
B
C
D
F
G
H
J
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
−−− 0.047
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N−N
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
J1
K
−W−
C
K1 0.19
L
M
6.40 BSC
0.252 BSC
0.10 (0.004)
0 ꢁ
8 ꢁ
0 ꢁ
8 ꢁ
SEATING
PLANE
−T−
H
G
DETAIL E
D
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
01.34X6
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
12
MC74HCT4066A
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
MC74HCT4066A/D
相关型号：
M74HCT4851ADTR2G
Analog Multiplexers/ Demultiplexers with Injection Current Effect Control with LSTTL Compatible Inputs
ONSEMI
M74HCT4851ADWR2G
Analog Multiplexers/ Demultiplexers with Injection Current Effect Control with LSTTL Compatible Inputs
ONSEMI
M74HCT4852ADTR2G
Analog Multiplexers/ Demultiplexers with Injection Current Effect Control with LSTTL Compatible Inputs
ONSEMI
M74HCT533
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT373 NON INVERTING - HCT533 INVERTING
STMICROELECTR
M74HCT533-1FP
Bus Driver, HCT Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO20, PLASTIC, SOP-20
MITSUBISHI
M74HCT533B1R
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT373 NON INVERTING - HCT533 INVERTING
STMICROELECTR
M74HCT533C1R
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT373 NON INVERTING - HCT533 INVERTING
STMICROELECTR
M74HCT533M1R
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT373 NON INVERTING - HCT533 INVERTING
STMICROELECTR
M74HCT534
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT374 NON INVERTING - HCT534 INVERTING
STMICROELECTR
©2020 ICPDF网 联系我们和版权申明