MAC15-8 [ONSEMI]
Triacs Silicon Bidirectional Thyristors; 双向晶闸管硅双向晶闸管型号: | MAC15-8 |
厂家: | ONSEMI |
描述: | Triacs Silicon Bidirectional Thyristors |
文件: | 总6页 (文件大小:70K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MAC15 Series
Preferred Device
Triacs
Silicon Bidirectional Thyristors
Designed primarily for full-wave ac control applications, such as
solid−state relays, motor controls, heating controls and power
supplies; or wherever full−wave silicon gate controlled solid−state
devices are needed. Triac type thyristors switch from a blocking to a
conducting state for either polarity of applied main terminal voltage
with positive or negative gate triggering.
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TRIACS
15 AMPERES RMS
400 thru 800 VOLTS
Features
• Blocking Voltage to 800 V
• All Diffused and Glass Passivated Junctions for Greater Parameter
Uniformity and Stability
MT2
MT1
• Small, Rugged, Thermowatt Construction for Low Thermal
Resistance, High Heat Dissipation and Durability
• Gate Triggering Guaranteed in Three Modes (MAC15 Series) or
Four Modes (MAC15A Series)
G
MARKING
DIAGRAM
• Pb−Free Packages are Available*
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
4
Rating
Symbol
Value
Unit
TO−220AB
CASE 221A
STYLE 4
MAC15xxG
AYWW
Peak Repetitive Off−State Voltage Note 1
V
V
V
DRM,
RRM
(T = −40 to +125°C, Sine Wave 50 to 60 Hz,
J
Gate Open)
MAC15A6
400
600
800
MAC15−8, MAC15A8
MAC15−10, MAC15A10
1
2
Peak Gate Voltage
V
10
V
A
3
GM
(Pulse Width v 1.0 msec; T = 90°C)
C
On−State Current RMS; Full Cycle Sine
I
T(RMS)
15
Wave 50 to 60 Hz (T = +90°C)
MAC15xx = Specific Device Code
C
xx
A
Y
WW
G
= See Table on Page 2
= Assembly Location
= Year
= Work Week
= Pb−Free Package
2
2
Circuit Fusing Consideration (t = 8.3 ms)
I t
93
A s
Peak Non−Repetitive Surge Current (One
I
150
A
TSM
Full Cycle Sine Wave, 60 Hz, T = +80°C)
C
Preceded and Followed by Rated Current
Peak Gate Power
P
20
W
GM
(T = +80°C, Pulse Width = 1.0 ms)
C
PIN ASSIGNMENT
Average Gate Power (T = +80°C, t = 8.3 ms)
P
0.5
2.0
W
A
C
G(AV)
1
Main Terminal 1
Peak Gate Current
I
GM
(Pulse Width v 1.0 msec; T = 90°C)
2
3
4
C
Main Terminal 2
Gate
Operating Junction Temperature Range
Storage Temperature Range
T
−40 to +125 °C
−40 to +150 °C
J
Main Terminal 2
T
stg
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
1. V
and V
for all types can be applied on a continuous basis. Blocking
DRM
RRM
voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.
Preferred devices are recommended choices for future use
and best overall value.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
August, 2006 − Rev. 3
MAC15A4/D
MAC15 Series
THERMAL CHARACTERISTICS
Characteristic
Symbol
Value
2.0
Unit
°C/W
°C/W
°C
Thermal Resistance, Junction−to−Case
Thermal Resistance, Junction−to−Ambient
R
q
JC
JA
L
R
q
62.5
260
Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds
T
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted; Electricals apply in both directions)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Peak Blocking Current
T = 25°C
J
I
I
−
−
−
−
10
mA
J
DRM,
RRM
(V = Rated V
, V
; Gate Open)
T = 125°C
D
DRM RRM
2.0
mA
ON CHARACTERISTICS
Peak On−State Voltage Note 2 (I = "21 A Peak)
V
−
1.3
1.6
V
TM
TM
Gate Trigger Current (Continuous dc) (V = 12 Vdc, R = 100 W)
I
mA
D
L
GT
MT2(+), G(+)
MT2(+), G(−)
MT2(−), G(−)
MT2(−), G(+) “A’’ SUFFIX ONLY
−
−
−
−
−
−
−
−
50
50
50
75
Gate Trigger Voltage (Continuous dc) (V = 12 Vdc, R = 100 W)
V
V
V
V
D
L
GT
MT2(+), G(+)
MT2(+), G(−)
MT2(−), G(−)
MT2(−), G(+) “A’’ SUFFIX ONLY
−
−
−
−
0.9
0.9
1.1
1.4
2
2
2
2.5
Gate Non−Trigger Voltage (V = 12 V, R = 100 W) T = 110°C)
D
L
J
GD
MT2(+), G(+); MT2(−), G(−); MT2(+), G(−)
MT2(−), G(+) “A’’ SUFFIX ONLY
0.2
0.2
−
−
−
−
Holding Current (V = 12 Vdc, Gate Open, Initiating Current = "200 mA)
I
−
−
6.0
1.5
40
−
mA
D
H
Turn-On Time (V = Rated V , I = 17 A)
DRM TM
t
ms
D
gt
(I = 120 mA, Rise Time = 0.1 ms, Pulse Width = 2 ms)
GT
DYNAMIC CHARACTERISTICS
Critical Rate of Rise of Commutation Voltage (V = Rated V
, I = 21 A,
DRM TM
dv/dt(c)
−
5.0
−
V/ms
D
Commutating di/dt = 7.6 A/ms, Gate Unenergized, T = 80°C)
C
2. Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.
ORDERING INFORMATION
Device
Device Marking
Package
Shipping
MAC15−008
MAC15−8G
TO−220AB
MAC15−8
TO−220AB
(Pb−Free)
MAC15−10
TO−220AB
MAC1510
MAC15A6
MAC15A8
MAC15−10G
TO−220AB
(Pb−Free)
MAC15A6
TO−220AB
500 Units Bulk
MAC15A6G
TO−220AB
(Pb−Free)
MAC15A8
TO−220AB
MAC15A8G
TO−220AB
(Pb−Free)
MAC15A10
TO−220AB
MAC15A10G
TO−220AB
(Pb−Free)
MAC15A10
MAC15A10T
TO−220AB
50 Units / Rail
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2
MAC15 Series
Voltage Current Characteristic of Triacs
(Bidirectional Device)
+ Current
Quadrant 1
MainTerminal 2 +
Symbol
Parameter
V
TM
V
Peak Repetitive Forward Off State Voltage
Peak Forward Blocking Current
DRM
DRM
on state
I
I
H
I
at V
RRM
V
Peak Repetitive Reverse Off State Voltage
Peak Reverse Blocking Current
RRM
RRM
I
RRM
V
Maximum On State Voltage
Holding Current
+ Voltage
off state
TM
I
I
at V
H
DRM
DRM
I
H
Quadrant 3
MainTerminal 2 −
V
TM
Quadrant Definitions for a Triac
MT2 POSITIVE
(Positive Half Cycle)
+
(+) MT2
(+) MT2
Quadrant II
Quadrant I
(−) I
(+) I
GT
GT
GATE
GATE
MT1
MT1
REF
REF
I
−
+ I
GT
GT
(−) MT2
(−) MT2
Quadrant III
Quadrant IV
(+) I
(−) I
GT
GT
GATE
GATE
MT1
REF
MT1
REF
−
MT2 NEGATIVE
(Negative Half Cycle)
All polarities are referenced to MT1.
With in−phase signals (using standard AC lines) quadrants I and III are used.
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3
MAC15 Series
130
120
110
100
20
α = 180°
α = 30°
α = 60°
α = 90°
120°
90°
16
12
T ≈ 125°
J
dc
α
60°
α
30°
α = 180°
α = CONDUCTION ANGLE
8
dc
α
90
80
4
0
α
T ≈ 125°
J
α = CONDUCTION ANGLE
0
2
4
6
8
10
12
14
16
0
2
4
6
8
10
12
14
16
I
RMS ON−STATE CURRENT (AMP)
I
ON−STATE CURRENT (AMP)
T(RMS),
T(RMS),
Figure 2. On−State Power Dissipation
Figure 1. RMS Current Derating
1.8
1.6
1.4
1.2
1.0
0.8
50
OFF−STATE VOLTAGE = 12 V
QUADRANT 4
OFF−STATE VOLTAGE = 12 V
30
20
1
2
3
10
1
2
3
QUADRANTS
QUADRANT
0.6
0.4
7.0
5.0
4
−60 −40 −20
0
20
40
60
80 100 120 140
−60 −40 −20
0
20
40
60
80
100 120 140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 4. Typical Gate Trigger Current
Figure 3. Typical Gate Trigger Voltage
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4
MAC15 Series
100
70
20
GATE OPEN
MAIN TERMINAL #1
POSITIVE
50
T = 25°C
J
10
7.0
5.0
125°C
30
20
MAIN TERMINAL #2
POSITIVE
3.0
2.0
10
7
−60 −40 −20
0
20
40
60
80
100 120 140
T , JUNCTION TEMPERATURE (°C)
J
5
Figure 6. Typical Holding Current
3
2
300
200
1
0.7
0.5
100
70
0.3
0.2
T
= 80°C
Tꢀf = 60 Hz
C
50
Surge is preceded and followed by rated current
0.1
30
0.4 0.8
1.2 1.6
2
2.4 2.8 3.2
3.6
4
4.4
1
2
3
5
7
10
v
TM
, INSTANTANEOUS ON−STATE VOLTAGE (VOLTS)
NUMBER OF CYCLES
Figure 5. On−State Characteristics
Figure 7. Maximum Non−Repetitive
Surge Current
1
0.5
0.2
0.1
Z
• R
q
JC
q
JC(t) = r(t)
0.05
0.02
0.01
0.1
0.2
0.5
1
2
5
10
20
50
100
200
500
1 k
2 k
5 k
10 k
t, TIME (ms)
Figure 8. Thermal Response
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5
MAC15 Series
PACKAGE DIMENSIONS
TO−220AB
CASE 221A−09
ISSUE AD
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
SEATING
PLANE
−T−
C
S
B
F
T
INCHES
DIM MIN MAX
MILLIMETERS
4
MIN
14.48
9.66
4.07
0.64
3.61
2.42
2.80
0.46
12.70
1.15
4.83
2.54
2.04
1.15
5.97
0.00
1.15
−−−
MAX
15.75
10.28
4.82
0.88
3.73
2.66
3.93
0.64
14.27
1.52
5.33
3.04
2.79
1.39
6.47
1.27
−−−
A
B
C
D
F
0.570
0.380
0.160
0.025
0.142
0.095
0.110
0.018
0.500
0.045
0.190
0.100
0.080
0.045
0.235
0.000
0.045
0.620
0.405
0.190
0.035
0.147
0.105
0.155
0.025
0.562
0.060
0.210
0.120
0.110
0.055
0.255
0.050
−−−
A
K
Q
Z
1
2
3
U
H
G
H
J
K
L
N
Q
R
S
T
L
R
J
V
G
U
V
Z
D
−−− 0.080
2.04
N
STYLE 4:
PIN 1. MAIN TERMINAL 1
2. MAIN TERMINAL 2
3. GATE
4. MAIN TERMINAL 2
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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LITERATURE FULFILLMENT:
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Phone: 421 33 790 2910
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Phone: 81−3−5773−3850
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Order Literature: http://www.onsemi.com/orderlit
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Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
MAC15A4/D
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