MBR0540 [ONSEMI]

1.5 A, 170 kHz, Buck Regulator with Synchronization Capability; 1.5 A , 170 kHz时,降压稳压器具有同步功能
MBR0540
型号: MBR0540
厂家: ONSEMI    ONSEMI
描述:

1.5 A, 170 kHz, Buck Regulator with Synchronization Capability
1.5 A , 170 kHz时,降压稳压器具有同步功能

稳压器 二极管 光电二极管
文件: 总13页 (文件大小:152K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NCP1546  
1.5 A, 170 kHz, Buck  
Regulator with  
Synchronization Capability  
The NCP1546 is a 1.5 A buck regulator IC operating at a  
2
fixed−frequency of 170 kHz. The device uses the V t control  
http://onsemi.com  
architecture to provide unmatched transient response, the best overall  
regulation and the simplest loop compensation for today’s high−speed  
logic. The NCP1546 accommodates input voltages from 4.5 V to 40 V  
and contains synchronization circuitry.  
MARKING  
DIAGRAM  
The on−chip NPN transistor is capable of providing a minimum of  
1.5 A of output current, and is biased by an external “boost” capacitor  
to ensure saturation, thus minimizing on−chip power dissipation.  
Protection circuitry includes thermal shutdown, cycle−by−cycle  
current limiting and frequency foldback.  
1
18  
18  
NCP1546  
AWLYYWW G  
G
1
18−LEAD DFN  
MN SUFFIX  
CASE 505  
Features  
2
V Architecture Provides Ultra−Fast Transient Response, Improved  
Regulation and Simplified Design  
2.0% Error Amp Reference Voltage Tolerance  
Switch Frequency Decrease of 4:1 in Short Circuit Conditions  
Reduces Short Circuit Power Dissipation  
A
WL  
YY  
= Assembly Location  
= Wafer Lot  
= Year  
BOOST Lead Allows “Bootstrapped” Operation to Maximize  
Efficiency  
Sync Function for Parallel Supply Operation or Noise Minimization  
Shutdown Lead Provides Power−Down Option  
WW = Work Week  
E
= Automotive Grade  
= Pb−Free Package  
G
(Note: Microdot may be in either location)  
1.0 mA Quiescent Current During Power−Down  
Thermal Shutdown  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 12 of this data sheet.  
Soft−Start  
Pb−Free Packages are Available  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
March, 2007 − Rev. 0  
NCP1546/D  
NCP1546  
R6  
10k  
D1  
L1  
27 mH  
C1  
1 mF  
U1  
Vout (3.3 V)  
Vsw  
SHDNB  
NC  
Vin  
BOOST  
NC  
Vin (7 V to 16 V)  
NC  
NC  
NC  
SYNC  
GND  
NC  
NC  
NC  
Vc  
C5  
0.1 mF  
R3  
205  
D2  
+
C2  
330 mF  
C3  
100 mF  
+
Vfb  
NCP1546  
C4  
0.1 mF  
R2  
127  
SHDNB  
SYNC  
Figure 1. Application Diagram, 4.5 V − 16 V to 3.3 V @ 1.0 A Converter  
MAXIMUM RATINGS*  
Rating  
Value  
45  
Unit  
V
Peak Transient Voltage (31 V Load Dump @ V = 14 V)  
IN  
Operating Junction Temperature Range, T  
0 to +125  
°C  
°C  
J
Lead Temperature Soldering:  
Reflow: (Note 1)  
240 peak  
(Note 2)  
Storage Temperature Range, T  
−65 to +150  
°C  
S
ESD  
(Human Body Model)  
(Machine Model)  
(Charge Device Model)  
2.0  
200  
>1.0  
kV  
V
kV  
Package Thermal Resistance  
18−Lead DFN Junction−to−Ambient, R  
16  
°C/W  
q
JA  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
*The maximum package power dissipation must be observed.  
1. 60 second maximum above 183°C.  
2. −5°C/0°C allowable conditions.  
MAXIMUM RATINGS (Voltages are with respect to GND)  
Pin Name  
(DC)*  
V
V
I
I
SINK  
Max  
MIN  
SOURCE  
V
40 V  
40 V  
40 V  
7.0 V  
7.0 V  
7.0 V  
7.0 V  
−0.3 V  
−0.3 V  
N/A  
4.0 A  
100 mA  
10 mA  
1.0 mA  
1.0 mA  
1.0 mA  
1.0 mA  
IN  
BOOST  
N/A  
V
−0.6 V/−1.0 V, t < 50 ns  
−0.3 V  
4.0 A  
SW  
V
1.0 mA  
1.0 mA  
1.0 mA  
1.0 mA  
C
SHDNB  
SYNC  
−0.3 V  
−0.3 V  
V
−0.3 V  
FB  
*See table above for load dump.  
http://onsemi.com  
2
 
NCP1546  
PACKAGE PIN DESCRIPTION  
PIN NO.  
PIN SYMBOL  
FUNCTION  
1
BOOST  
The BOOST pin provides additional drive voltage to the on−chip NPN power transistor. The  
resulting decrease in switch on voltage increases efficiency.  
2
3
V
This pin is the main power input to the IC.  
IN  
V
This is the connection to the emitter of the on−chip NPN power transistor and serves as the  
switch output to the inductor. This pin may be subjected to negative voltages during switch off−  
time. A catch diode is required to clamp the pin voltage in normal operation. This node can  
stand −1.0 V for less than 50 ns during switch node flyback.  
SW  
4
SHDNB  
The shutdown pin is active low and TTL compatible. The IC goes into sleep mode, drawing less  
than 1.0 mA when the pin voltage is pulled below 1.0 V.  
This pin should be left floating in normal position.  
5
6
7
SYNC  
GND  
This pin provides the synchronization input.  
Power return connection for the IC.  
V
The FB pin provides input to the inverting input of the error amplifier. If V is lower than 0.29 V,  
the oscillator frequency is divided by four, and current limit folds back to about 1 ampere. These  
features protect the IC under severe overcurrent or short circuit conditions.  
FB  
FB  
8
V
The V pin provides a connection point to the output of the error amplifier and input to the PWM  
comparator. Driving of this pin should be avoided because on−chip test circuitry becomes active  
whenever current exceeding 0.5 mA is forced into the IC.  
C
C
9, 11, 12, 14, 15, 18  
NC  
No Connection  
PIN CONNECTIONS  
BOOST  
1
2
3
4
5
6
7
8
9
18  
17  
16  
15  
14  
13  
12  
11  
10  
NC  
V
V
V
V
V
IN  
IN  
IN  
C
FB  
NC  
NC  
GND  
NC  
NC  
Vsw  
V
V
SW  
SW  
SHDNB  
NC  
SYNC  
18−Lead DFN  
http://onsemi.com  
3
NCP1546  
ELECTRICAL CHARACTERISTICS (0°C < T < 70°C, 4.5 V< V < 40 V; unless otherwise specified.)  
J
IN  
Characteristic  
Test Conditions  
Min  
Typ  
Max  
Unit  
Oscillator  
Operating Frequency  
Frequency Line Regulation  
Maximum Duty Cycle  
153  
170  
187  
kHz  
0.05  
90  
0.15  
95  
%/V  
%
85  
V
Frequency Foldback Threshold  
0.29  
0.32  
0.36  
V
FB  
PWM Comparator  
Slope Compensation Voltage  
Minimum Output Pulse Width  
Power Switch  
Fix V DV /DT  
5.0  
9.0  
17  
mV/ms  
FB,  
C
ON  
V
to V  
100  
200  
ns  
FB  
SW  
Current Limit  
V
V
> 0.36 V  
< 0.29 V  
= 1.5 A, V  
1.6  
0.9  
0.4  
2.3  
1.5  
0.7  
120  
3.0  
2.1  
1.0  
160  
A
A
FB  
FB  
Foldback Current  
Saturation Voltage  
I
= V + 2.5 V  
V
OUT  
BOOST  
IN  
Current Limit Delay  
Note 3  
ns  
Error Amplifier  
Internal Reference Voltage  
Reference PSRR  
1.244  
1.270  
40  
1.296  
V
dB  
Note 3  
FB Input Bias Current  
Output Source Current  
Output Sink Current  
Output High Voltage  
Output Low Voltage  
Unity Gain Bandwidth  
Open Loop Amplifier Gain  
Amplifier Transconductance  
Sync  
0.02  
25  
0.1  
35  
35  
1.53  
60  
mA  
V
V
V
V
= 1.270 V, V = 1.0 V  
15  
15  
1.39  
5.0  
mA  
C
FB  
= 1.270 V, V = 2.0 V  
25  
mA  
C
FB  
= 1.0 V  
= 2.0 V  
1.46  
20  
V
FB  
FB  
mV  
kHz  
dB  
Note 3  
Note 3  
Note 3  
500  
70  
6.4  
mA/V  
Sync Frequency Range  
Sync Pin Bias Current  
Sync Threshold Voltage  
Shutdown  
190  
355  
485  
1.9  
kHz  
mA  
V
V
V
= 5.0 V  
360  
1.5  
SYNC  
0.9  
Shutdown Threshold Voltage  
Shutdown Pin Bias Current  
Thermal Shutdown  
Overtemperature Trip Point  
Thermal Shutdown Hysteresis  
1.0  
1.3  
1.6  
35  
V
= 0 V  
0.14  
5.00  
mA  
SHDNB  
Note 3  
Note 3  
175  
185  
42  
195  
°C  
°C  
3. Guaranteed by design, not 100% tested in production.  
http://onsemi.com  
4
 
NCP1546  
ELECTRICAL CHARACTERISTICS (continued) (0°C < T < 70°C, 4.5 V< V < 40 V; unless otherwise specified.)  
J
IN  
Characteristic  
Test Conditions  
Min  
Typ  
Max  
Unit  
General  
Quiescent Current  
Shutdown Quiescent Current  
Boost Operating Current  
Minimum Boost Voltage  
Startup Voltage  
I
= 0 A  
4.0  
7.5  
mA  
SW  
V
V
= 0 V  
6.0  
1.0  
15  
5.0  
40  
mA  
mA/A  
V
SHDNB  
BOOST  
− V  
= 2.5 V  
SW  
Note 4  
2.5  
4.4  
12  
2.2  
3.3  
7.0  
V
Minimum Output Current  
mA  
4. Guaranteed by design, not 100% tested in production.  
SHDNB  
SYNC  
V
IN  
5.0 mA  
Shutdown  
Comparator  
2.9 V LDO  
Voltage  
Regulator  
+
Thermal  
Shutdown  
Artificial  
Ramp  
Oscillator  
BOOST  
+
1.3 V  
Output  
Driver  
S
R
Q
V
SW  
+
Current  
Limit  
Comparator  
+
PWM  
Comparator  
I
REF  
1.46 V  
SHDNB  
+
V
FB  
I
FOLDBACK  
+
Frequency  
+
GND  
0.32 V  
and Current  
Limit Foldback  
+
1.27 V  
Error  
Amplifier  
V
C
Figure 2. Block Diagram  
http://onsemi.com  
5
 
NCP1546  
APPLICATIONS INFORMATION  
THEORY OF OPERATION  
The slope compensation signal is a fixed voltage ramp  
provided by the oscillator. Adding this signal eliminates  
subharmonic oscillation associated with the operation at  
duty cycle greater than 50%. The artificial ramp also ensures  
the proper PWM function when the output ripple voltage is  
inadequate. The slope compensation signal is properly sized  
to serve it purposes without sacrificing the transient  
response speed.  
Under load and line transient, not only the ramp signal  
changes, but more significantly the DC component of the  
feedback voltage varies proportionally to the output voltage.  
FFB path connects both signals directly to the PWM  
comparator. This allows instant modulation of the duty cycle  
to counteract any output voltage deviations. The transient  
response time is independent of the error amplifier  
bandwidth. This eliminates the delay associated with error  
amplifier and greatly improves the transient response time.  
The error amplifier is used here to ensure excellent DC  
accuracy.  
V2 Control  
The NCP1546 buck regulator provides a high level of  
integration and high operating frequencies allowing the  
layout of a switch−mode power supply in a very small board  
area. This device is based on the proprietary V control  
architecture. V control uses the output voltage and its ripple  
as the ramp signal, providing an ease of use not generally  
associated with voltage or current mode control. Improved  
line regulation, load regulation and very fast transient  
response are also major advantages.  
2
2
S1  
L1  
V
IN  
V
O
R1  
C1  
Duty Cycle  
D1  
Buck  
Controller  
Slope  
Comp  
Error Amplifier  
Oscillator  
The NCP1546 has a transconductance error amplifier,  
whose non−inverting input is connected to an Internal  
Reference Voltage generated from the on−chip regulator.  
)
FFB  
Latch  
S
R
The inverting input connects to the V pin. The output of  
FB  
the error amplifier is made available at the V pin. A typical  
frequency compensation requires only a 0.1 mF capacitor  
C
R2  
+
SFB  
+
V
C
connected between the V pin and ground, as shown in  
C
V
Figure 1. This capacitor and error amplifier’s output  
REF  
PWM  
Comparator  
+
resistance (approximately 8.0 MW) create a low frequency  
Error  
Amplifier  
2
pole to limit the bandwidth. Since V control does not  
2
V
Control  
require a high bandwidth error amplifier, the frequency  
compensation is greatly simplified.  
The V pin is clamped below Output High Voltage. This  
Figure 3. Buck Converter with V2 Control.  
C
allows the regulator to recover quickly from over current or  
short circuit conditions.  
As shown in Figure 3, there are two voltage feedback  
paths in V control, namely FFB(Fast Feedback) and  
2
Oscillator and Sync Feature  
SFB(Slow Feedback). In FFB path, the feedback voltage  
connects directly to the PWM comparator. This feedback  
path carries the ramp signal as well as the output DC voltage.  
Artificial ramp derived from the oscillator is added to the  
feedback signal to improve stability. The other feedback  
path, SFB, connects the feedback voltage to the error  
The on−chip oscillator is trimmed at the factory and  
requires no external components for frequency control. The  
high switching frequency allows smaller external  
components to be used, resulting in a board area and cost  
savings. The tight frequency tolerance simplifies magnetic  
components selection. The switching frequency is reduced  
amplifier whose output V feeds to the other input of the  
C
to 25% of the nominal value when the V pin voltage is  
FB  
PWM comparator. In a constant frequency mode, the  
oscillator signal sets the output latch and turns on the switch  
S1. This starts a new switch cycle. The ramp signal,  
composed of both artificial ramp and output ripple,  
below Frequency Foldback Threshold. In short circuit or  
over−load conditions, this reduces the power dissipation of  
the IC and external components.  
An external clock signal can sync the NCP1546 to a higher  
frequency. The rising edge of the sync pulse turns on the  
power switch to start a new switching cycle, as shown in  
Figure 4. There is approximately 0.5 ms delay between the  
eventually comes across the V voltage, and consequently  
C
resets the latch to turn off the switch. The switch S1 will turn  
on again at the beginning of the next switch cycle. In a buck  
converter, the output ripple is determined by the ripple  
current of the inductor L1 and the ESR (equivalent series  
resistor) of the output capacitor C1.  
rising edge of the sync pulse and rising edge of the V pin  
SW  
voltage. The sync threshold is TTL logic compatible, and  
http://onsemi.com  
6
 
NCP1546  
duty cycle of the sync pulses can vary from 10% to 90%. The  
frequency foldback feature is disabled during the sync  
mode.  
The NCP1546 contains pulse−by−pulse current limiting  
to protect the power switch and external components. When  
the peak of the switching current reaches the Current Limit,  
the power switch turns off after the Current Limit Delay. The  
switch will not turn on until the next switching cycle. The  
current limit threshold is independent of switching duty  
cycle. The maximum load current, given by the following  
formula under continuous conduction mode, is less than the  
Current Limit due to the ripple current.  
V (V * V )  
IN  
O
O
I
+ I *  
LIM  
O(MAX)  
2(L)(V )(f )  
IN  
s
where:  
f = switching frequency,  
S
I
= current limit threshold,  
LIM  
V = output voltage,  
O
V
IN  
= input voltage,  
L = inductor value.  
When the regulator runs under current limit, the  
subharmonic oscillation may cause low frequency  
oscillation, as shown in Figure 6. Similar to current mode  
control, this oscillation occurs at the duty cycle greater than  
50% and can be alleviated by using a larger inductor value.  
The current limit threshold is reduced to Foldback Current  
when the FB pin falls below Foldback Threshold. This  
feature protects the IC and external components under the  
power up or over−load conditions.  
Figure 4. A NCP1546 Buck Regulator is Synchronized  
to an External 350 kHz Pulse Signal  
Power Switch and Current Limit  
The collector of the built−in NPN power switch is  
connected to the V pin, and the emitter to the V pin.  
IN  
SW  
When the switch turns on, the V voltage is equal to the  
SW  
V
IN  
minus switch Saturation Voltage. In the buck regulator,  
the V  
voltage swings to one diode drop below ground  
SW  
when the power switch turns off, and the inductor current is  
commutated to the catch diode. Due to the presence of high  
pulsed current, the traces connecting the V pin, inductor  
SW  
and diode should be kept as short as possible to minimize the  
noise and radiation. For the same reason, the input capacitor  
should be placed close to the V pin and the anode of the  
IN  
diode.  
The saturation voltage of the power switch is dependent  
on the switching current, as shown in Figure 5.  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
Figure 6. The Regulator in Current Limit  
0.1  
0
0
0.5  
1.0  
1.5  
SWITCHING CURRENT (A)  
Figure 5. The Saturation Voltage of the Power Switch  
Increases with the Conducting Current  
http://onsemi.com  
7
 
NCP1546  
BOOST Pin  
The IC enters a sleep mode when the SHDNB pin is pulled  
below the Shutdown Threshold Voltage. In sleep mode, the  
power switch is kept open and the supply current reduces to  
Shutdown Quiescent Current ( 1 mA typically). This pin has  
an internal pull−down current. When not in use, pull this pin  
The BOOST pin provides base driving current for the  
power switch. A voltage higher than V provides required  
IN  
headroom to turn on the power switch. This in turn reduces  
IC power dissipation and improves overall system  
efficiency. The BOOST pin can be connected to an external  
boost−strapping circuit which typically uses a 0.1 mF capacitor  
and a 1N914 or 1N4148 diode, as shown in Figure 1. When the  
power switch is turned on, the voltage on the BOOST pin is  
equal to  
up to V with a resistor (See Figure 1).  
CC  
Startup  
During power up, the regulator tends to quickly charge up  
the output capacitors to reach voltage regulation. This gives  
rise to an excessive in−rush current which can be detrimental  
V
+ V ) V * V  
IN F  
BOOST  
O
2
to the inductor, IC and catch diode. In V control , the  
where:  
V = diode forward voltage.  
compensation capacitor provides Soft−Start with no need  
for extra pin or circuitry. During the power up, the Output  
Source Current of the error amplifier charges the  
F
The anode of the diode can be connected to any DC  
voltage as well as the regulated output voltage (Figure 1).  
However, the maximum voltage on the BOOST pin shall not  
exceed 40 V.  
compensation capacitor which forces V pin and thus output  
C
voltage ramp up gradually. The Soft−Start duration can be  
calculated by  
As shown in Figure 7, the BOOST pin current includes a  
constant 7.0 mA pre−driver current and base current  
proportional to switch conducting current. A detailed  
discussion of this current is conducted in Thermal  
Consideration section. A 0.1 mF capacitor is usually  
adequate for maintaining the Boost pin voltage during the on  
time.  
V
  C  
C
I
COMP  
T
+
SS  
SOURCE  
where:  
V = V pin steady−state voltage, which is approximately  
C
C
equal to error amplifier’s reference voltage.  
= Compensation capacitor connected to the V pin  
C
COMP  
C
I
= Output Source Current of the error amplifier.  
SOURCE  
30  
25  
20  
15  
Using a 0.1 mF C  
5.0 ms which is adequate to avoid any current stresses.  
Figure 8 shows the gradual rise of the V , V and envelope  
, the calculation shows a T over  
SS  
COMP  
C
O
of the V during power up. There is no voltage over−shoot  
SW  
after the output voltage reaches the regulation. If the supply  
voltage rises slower than the V pin, output voltage may  
over−shoot.  
C
10  
5
0
0
0.5  
1.0  
1.5  
SWITCHING CURRENT (A)  
Figure 7. The Boost Pin Current Includes 7.0 mA  
Pre−Driver Current and Base Current when the  
Switch is Turned On. The Beta Decline of the  
Power Switch Further Increases the Base  
Current at High Switching Current  
Shutdown  
The internal power switch will not turn on until the V  
IN  
pin rises above the Startup Voltage. This ensures no  
switching will occur until adequate supply voltage is  
provided to the IC.  
Figure 8. The Power Up Transition of NCP1546  
Regulator  
http://onsemi.com  
8
 
NCP1546  
Short Circuit  
The pre−driver current is used to turn on/off the power  
When the V  
pin voltage drops below Foldback  
switch and is approximately equal to 12 mA in worst case.  
During steady state operation, the IC draws this current from  
the Boost pin when the power switch is on and then receives  
FB  
Threshold, the regulator reduces the peak current limit by  
40% and switching frequency to 1/4 of the nominal  
frequency. These features are designed to protect the IC and  
external components during over load or short circuit  
conditions. In those conditions, peak switching current is  
clamped to the current limit threshold. The reduced  
switching frequency significantly increases the ripple  
current, and thus lowers the DC current. The short circuit can  
cause the minimum duty cycle to be limited by Minimum  
Output Pulse Width. The foldback frequency reduces the  
minimum duty cycle by extending the switching cycle. This  
protects the IC from overheating, and also limits the power  
that can be transferred to the output. The current limit  
foldback effectively reduces the current stress on the  
inductor and diode. When the output is shorted, the DC  
current of the inductor and diode can approach the current  
limit threshold. Therefore, reducing the current limit by 40%  
can result in an equal percentage drop of the inductor and  
diode current. The short circuit waveforms are captured in  
Figure 9, and the benefit of the foldback frequency and  
current limit is self−evident.  
it from the V pin when the switch is off. The pre−driver  
IN  
current always returns to the V pin. Since the pre−driver  
SW  
current goes out to the regulator’s output even when the  
power switch is turned off, a minimum load is required to  
prevent overvoltage in light load conditions. If the Boost pin  
voltage is equal to V + V when the switch is on, the power  
IN  
O
dissipation due to pre−driver current can be calculated by  
2
V
V
O
W
+ 12 mA   (V * V  
)
O
)
DRV  
IN  
IN  
The base current of a bipolar transistor is equal to collector  
current divided by beta of the device. Beta of 60 is used here  
to estimate the base current. The Boost pin provides the base  
current when the transistor needs to be on. The power  
dissipated by the IC due to this current is  
2
V
V
I
S
60  
O
W
+
 
BASE  
IN  
where:  
I = DC switching current.  
S
When the power switch turns on, the saturation voltage  
and conduction current contribute to the power loss of a  
non−ideal switch. The power loss can be quantified as  
V
O
W
+
  I   V  
SAT  
SAT  
S
V
IN  
where:  
V
SAT  
= saturation voltage of the power switch which is  
shown in Figure 5.  
The switching loss occurs when the switch experiences  
both high current and voltage during each switch transition.  
This regulator has a 30 ns turn−off time and associated  
power loss is equal to  
I
S
  V  
2
IN  
W
+
  30 ns   f  
S
S
The turn−on time is much shorter and thus turn−on loss is  
not considered here.  
The total power dissipated by the IC is sum of all the above  
Figure 9. In Short Circuit, the Foldback Current and  
Foldback Frequency Limit the Switching Current to  
Protect the IC, Inductor and Catch Diode  
W
+ W ) W  
) W  
) W  
) W  
SAT S  
IC  
Q
DRV  
BASE  
Thermal Considerations  
The IC junction temperature can be calculated from the  
ambient temperature, IC power dissipation and thermal  
resistance of the package. The equation is shown as follows,  
A calculation of the power dissipation of the IC is always  
necessary prior to the adoption of the regulator. The current  
drawn by the IC includes quiescent current, pre−driver  
current, and power switch base current. The quiescent  
current drives the low power circuits in the IC, which  
include comparators, error amplifier and other logic blocks.  
Therefore, this current is independent of the switching  
current and generates power equal to  
T + W   R  
J IC qJA  
) T  
A
Minimum Load Requirement  
As pointed out in the previous section, a minimum load is  
required for this regulator due to the pre−driver current  
feeding the output. Placing a resistor equal to V divided by  
O
W
+ V   I  
IN  
Q
Q
12 mA should prevent any voltage overshoot at light load  
conditions. Alternatively, the feedback resistors can be  
valued properly to consume 12 mA current.  
where:  
I = quiescent current.  
Q
http://onsemi.com  
9
 
NCP1546  
COMPONENT SELECTION  
Selecting the capacitor type is determined by each  
design’s constraint and emphasis. The aluminum  
electrolytic capacitors are widely available at lowest cost.  
Their ESR and ESL (equivalent series inductor) are  
relatively high. Multiple capacitors are usually paralleled to  
achieve lower ESR. In addition, electrolytic capacitors  
usually need to be paralleled with a ceramic capacitor for  
filtering high frequency noises. The OS−CON are solid  
aluminum electrolytic capacitors, and therefore has a much  
lower ESR. Recently, the price of the OS−CON capacitors  
has dropped significantly so that it is now feasible to use  
them for some low cost designs. Electrolytic capacitors are  
physically large, and not used in applications where the size,  
and especially height is the major concern.  
Ceramic capacitors are now available in values over 10 mF.  
Since the ceramic capacitor has low ESR and ESL, a single  
ceramic capacitor can be adequate for both low frequency  
and high frequency noises. The disadvantage of ceramic  
capacitors are their high cost. Solid tantalum capacitors can  
have low ESR and small size. However, the reliability of the  
tantalum capacitor is always a concern in the application  
where the capacitor may experience surge current.  
Input Capacitor  
In a buck converter, the input capacitor witnesses pulsed  
current with an amplitude equal to the load current. This  
pulsed current and the ESR of the input capacitors determine  
the V ripple voltage, which is shown in Figure 10. For V  
IN  
IN  
ripple, low ESR is a critical requirement for the input  
capacitor selection. The pulsed input current possesses a  
significant AC component, which is absorbed by the input  
capacitors. The RMS current of the input capacitor can be  
calculated using:  
Ǹ
D(1 * D)  
O
I
+ I  
RMS  
where:  
D = switching duty cycle which is equal to V /V .  
I = load current.  
O
O
IN  
Output Capacitor  
In a buck converter, the requirements on the output  
capacitor are not as critical as those on the input capacitor.  
The current to the output capacitor comes from the inductor  
and thus is triangular. In most applications, this makes the  
RMS ripple current not an issue in selecting output  
capacitors.  
The output ripple voltage is the sum of a triangular wave  
caused by ripple current flowing through ESR, and a square  
wave due to ESL. Capacitive reactance is assumed to be  
small compared to ESR and ESL. The peak to peak ripple  
current of the inductor is:  
Figure 10. Input Voltage Ripple in a Buck Converter  
To calculate the RMS current, multiply the load current  
with the constant given by Figure 11 at each duty cycle. It is  
a common practice to select the input capacitor with an RMS  
current rating more than half the maximum load current. If  
multiple capacitors are paralleled, the RMS current for each  
capacitor should be the total current divided by the number  
of capacitors.  
V (V * V )  
IN  
O
O
I
+
P * P  
(V )(L)(f )  
IN  
S
V , the output ripple due to the ESR, is equal  
RIPPLE(ESR)  
to the product of I  
and ESR. The voltage developed  
P−P  
across the ESL is proportional to the di/dt of the output  
capacitor. It is realized that the di/dt of the output capacitor  
is the same as the di/dt of the inductor current. Therefore,  
0.6  
0.5  
when the switch turns on, the di/dt is equal to (V − V )/L,  
IN  
O
and it becomes V /L when the switch turns off. The total  
O
0.4  
ripple voltage induced by ESL can then be derived from  
V
* V  
O
L
V
L
V
IN  
L
0.3  
0.2  
IN  
IN  
V
+ ESL(  
) ) ESL(  
) + ESL(  
)
RIPPLE(ESL)  
The total output ripple is the sum of the V  
and  
RIPPLE(ESR)  
V
.
RIPPLE(ESR)  
0.1  
0
0
0.2  
0.4  
0.6  
0.8  
1.0  
DUTY CYCLE  
Figure 11. Input Capacitor RMS Current can be  
Calculated by Multiplying Y Value with Maximum Load  
Current at any Duty Cycle  
http://onsemi.com  
10  
 
NCP1546  
Figure 12. The Output Voltage Ripple Using Two 10 mF  
Figure 13. The Output Voltage Ripple Using One  
Ceramic Capacitors in Parallel  
100 mF POSCAP Capacitor  
Figure 14. The Output Voltage Ripple Using  
Figure 15. The Output Voltage Ripple Using  
One 100 mF OS−CON  
One 100 mF Tantalum Capacitor  
Figure 12 to Figure 15 show the output ripple of a 5.0 V  
to 3.3 V/500 mA regulator using 22 mH inductor and various  
capacitor types. At the switching frequency, the low ESR  
and ESL make the ceramic capacitors behave capacitively  
as shown in Figure 12. Additional paralleled ceramic  
capacitors will further reduce the ripple voltage, but  
inevitably increase the cost. “POSCAP”, manufactured by  
SANYO, is a solid electrolytic capacitor. The anode is  
sintered tantalum and the cathode is a highly conductive  
polymerized organic semiconductor. TPC series, featuring  
low ESR and low profile, is used in the measurement of  
Figure 13. It is shown that POSCAP presents a good balance  
of capacitance and ESR, compared with a ceramic capacitor.  
In this application, the low ESR generates less than 5.0 mV  
of ripple and the ESL is almost unnoticeable. The ESL of the  
through−hole OS−CON capacitor give rise to the inductive  
impedance. It is evident from Figure 14 which shows the  
step rise of the output ripple on the switch turn−on and large  
spike on the switch turn−off. The ESL prevents the output  
capacitor from quickly charging up the parasitic capacitor of  
the inductor when the switch node is pulled below ground  
through the catch diode conduction. This results in the spike  
associated with the falling edge of the switch node. The D  
package tantalum capacitor used in Figure 15 has the same  
footprint as the POSCAP, but doubles the height. The ESR  
of the tantalum capacitor is apparently higher than the  
POSCAP. The electrolytic and tantalum capacitors provide  
a low−cost solution with compromised performance. The  
reliability of the tantalum capacitor is not a serious concern  
for output filtering because the output capacitor is usually  
free of surge current and voltage.  
Diode Selection  
The diode in the buck converter provides the inductor  
current path when the power switch turns off. The peak  
reverse voltage is equal to the maximum input voltage. The  
peak conducting current is clamped by the current limit of  
the IC. The average current can be calculated from:  
I (V * V )  
O
IN  
V
O
I
+
D(AVG)  
IN  
http://onsemi.com  
11  
 
NCP1546  
The worse case of the diode average current occurs during  
The DC current through the inductor is equal to the load  
current. The worse case occurs during maximum load  
current. Check the vendor’s spec to adjust the inductor value  
under current loading. Inductors can lose over 50% of  
inductance when it nears saturation.  
maximum load current and maximum input voltage. For the  
diode to survive the short circuit condition, the current rating  
of the diode should be equal to the Foldback Current Limit.  
See Table 1 for Schottky diodes from ON Semiconductor  
which are suggested for use with the NCP1546 regulator.  
The core materials have a significant effect on inductor  
performance. The ferrite core has benefits of small physical  
size, and very low power dissipation. But be careful not to  
operate these inductors too far beyond their maximum  
ratings for peak current, as this will saturate the core.  
Powered Iron cores are low cost and have a more gradual  
saturation curve. The cores with an open magnetic path, such  
as rod or barrel, tend to generate high magnetic field  
radiation. However, they are usually cheap and small. The  
cores providing a close magnetic loop, such as pot−core and  
toroid, generate low electro−magnetic interference (EMI).  
There are many magnetic component vendors providing  
standard product lines suitable for the NCP1546. Table 2  
lists three vendors, their products and contact information.  
Inductor Selection  
When choosing inductors, one might have to consider  
maximum load current, core and copper losses, component  
height, output ripple, EMI, saturation and cost. Lower  
inductor values are chosen to reduce the physical size of the  
inductor. Higher value cuts down the ripple current, core  
losses and allows more output current. For most  
applications, the inductor value falls in the range between  
2.2 mH and 22 mH. The saturation current ratings of the  
inductor shall not exceed the I , calculated according to  
L(PK)  
V (V * V )  
O
IN  
O
)
I
+ I  
)
O
L(PK)  
2(f )(L)(V  
S
IN  
Table 1.  
Part Number  
1N5817  
V
(V)  
I
(A)  
V
(V) @ I  
AVERAGE  
Package  
Axial Lead  
Axial Lead  
Axial Lead  
SOD−123  
SOD−123  
SOD−123  
SMB  
BREAKDOWN  
AVERAGE  
(F)  
20  
1.0  
0.45  
0.55  
0.6  
1N5818  
30  
40  
20  
30  
40  
20  
30  
40  
1.0  
1.0  
0.5  
0.5  
0.5  
1.0  
1.0  
1.0  
1N5819  
MBR0520  
MBR0530  
MBR0540  
MBRS120  
MBRS130  
MBRS140  
0.385  
0.43  
0.53  
0.55  
0.395  
0.6  
SMB  
SMB  
Table 2.  
Vendor  
Product Family  
UNI−Pac1/2: SMT, barrel  
Web Site  
Telephone  
Coiltronics  
www.coiltronics.com  
(516) 241−7876  
THIN−PAC: SMT, toroid, low profile  
CTX: Leaded, toroid  
Coilcraft  
DO1608: SMT, barrel  
DS/DT 1608: SMT, barrel, magnetically shielded  
DO3316: SMT, barrel  
DS/DT 3316: SMT, barrel, magnetically shielded  
DO3308: SMT, barrel, low profile  
www.coilcraft.com  
(800) 322−2645  
(619) 674−8100  
Pulse  
www.pulseeng.com  
ORDERING INFORMATION  
Device  
Package  
Shipping  
NCP1546MNR2G  
DFN18  
(Pb−Free)  
2500 Units / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
http://onsemi.com  
12  
 
NCP1546  
PACKAGE DIMENSIONS  
DFN18 6x5, 0.5P  
CASE 505−01  
ISSUE D  
NOTES:  
A
1. DIMENSIONS AND TOLERANCING PER  
ASME Y14.5M, 1994.  
D
B
2. DIMENSIONS IN MILLIMETERS.  
3. DIMENSION b APPLIES TO PLATED  
TERMINAL AND IS MEASURED BETWEEN  
0.25 AND 0.30 MM FROM TERMINAL  
4. COPLANARITY APPLIES TO THE EXPOSED  
PAD AS WELL AS THE TERMINALS.  
PIN 1 LOCATION  
2X  
E
MILLIMETERS  
DIM MIN  
MAX  
1.00  
0.05  
0.15  
C
A
A1  
A3  
b
0.80  
0.00  
0.20 REF  
2X  
0.18  
0.30  
0.15  
C
TOP VIEW  
SIDE VIEW  
D
6.00 BSC  
D2  
E
3.98  
5.00 BSC  
4.28  
(A3)  
0.10  
0.08  
C
C
E2  
e
2.98  
0.50 BSC  
3.28  
A
18X  
K
L
0.20  
0.45  
−−−  
0.65  
A1  
C
SEATING  
PLANE  
D2  
e
SOLDERING FOOTPRINT*  
18X L  
1
9
5.30  
18X  
0.75  
1
E2  
0.50  
PITCH  
18X K  
18  
10  
18X b  
4.19  
0.10 C A  
0.05  
B
BOTTOM VIEW  
C
NOTE 3  
18X  
0.30  
3.24  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
V2 is a trademark of Switch Power, Inc.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer  
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81−3−5773−3850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NCP1546/D  

相关型号:

MBR0540-CA2-R

SCHOTTKY RECTIFIER DIODE
UTC

MBR0540-CB2-R

SCHOTTKY RECTIFIER DIODE
UTC

MBR0540-G

SURFACE MOUNT SCHOTTKY BARRIER DIODE
SENSITRON

MBR0540-GS08

Rectifier Diode, Schottky, 1 Element, 0.5A, 40V V(RRM),
VISHAY

MBR0540-GS18

Rectifier Diode, Schottky, 1 Element, 0.5A, 40V V(RRM), Silicon, PLASTIC PACKAGE-2
VISHAY

MBR0540-M

Chip Schottky Barrier Diodes - Silicon epitaxial planer type
FORMOSA

MBR0540-N

Chip Schottky Barrier Diodes - Silicon epitaxial planer type
FORMOSA

MBR0540-T1

Rectifier Diode, Schottky, 1 Element, 0.5A, 40V V(RRM), Silicon, PLASTIC PACKAGE-2
SENSITRON

MBR0540-TP

0.5 Amp Schottky Rectifier 20 to 80 Volts
MCC

MBR0540-TP-HF

Rectifier Diode, Schottky, 1 Element, 0.5A, 40V V(RRM), Silicon,
MCC

MBR0540D87Z

Rectifier Diode, Schottky, 1 Element, 0.5A, 40V V(RRM), Silicon, D6, 2 PIN
FAIRCHILD

MBR0540G-CB2-R

Rectifier Diode, Schottky, 1 Element, 0.5A, 40V V(RRM), Silicon,
UTC