MC100EL13DWR2 [ONSEMI]

5V ECL Dual 1:3 Fanout Buffer; 5V ECL双1 : 3扇出缓冲器
MC100EL13DWR2
型号: MC100EL13DWR2
厂家: ONSEMI    ONSEMI
描述:

5V ECL Dual 1:3 Fanout Buffer
5V ECL双1 : 3扇出缓冲器

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MC100EL13  
5VꢀECL Dual 1:3 Fanout  
Buffer  
The MC100EL13 is a dual, fully differential 1:3 fanout buffer. The Low  
OutputOutput Skew of the device makes it ideal for distributing two  
different frequency synchronous signals.  
The differential inputs have special circuitry which ensures device  
stability under open input conditions. When both differential inputs are left  
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open the D input will pull down to V , The D input will bias around  
EE  
V /2 and the Q output will go LOW.  
CC  
Features  
500 ps Typical Propagation Delays  
50 ps OutputOutput Skews  
The 100 Series Contains Temperature Compensation  
SO20L  
DW SUFFIX  
CASE 751D  
PECL Mode Operating Range: V = 4.2 V to 5.7 V with  
MARKING DIAGRAM*  
CC  
V
= 0 V  
EE  
20  
NECL Mode Operating Range: V = 0 V with  
CC  
V
= 4.2 V to 5.7 V  
EE  
100EL13  
AWLYYWWG  
Internal Input Pulldown Resistors  
Q Output will Default LOW with Inputs Open or at V  
EE  
Internal Input Pulldown Resistors on All Inputs, Pullup Resistors on  
1
Inverted Inputs  
PbFree Packages are Available*  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
WL  
YY  
WW  
G
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
October, 2006 Rev. 5  
MC100EL13/D  
MC100EL13  
Q1a Q1a Q2a Q2a  
20 19 18 17  
V
Q2b Q2b Q1b Q1b  
V
EE  
Table 1. PIN DESCRIPTION  
CC  
16  
15  
14  
13  
12  
11  
PIN  
FUNCTION  
Qna, Qna  
Qnb, Qnb  
CLKn, CLKn  
ECL Differential Clock Outputs  
ECL Differential Clock Outputs  
ECL Differential Clock Inputs  
Positive Supply  
V
CC  
VEE  
Negative Supply  
1
2
3
4
5
6
7
8
9
Q0b Q0b  
10  
Q0a Q0a  
V
CC  
CLKa CLKa CLKb CLKb  
V
CC  
* All V pins are tied together on the die.  
CC  
Warning: All V and V pins must be externally connected  
CC  
EE  
to Power Supply to guarantee proper operation.  
Figure 1. Logic Diagram and Pinout: Assignment  
Table 2. ATTRIBUTES  
Characteristics  
Value  
Internal Input Pulldown Resistor  
Internal Input Pullup Resistor  
75 kW  
75 kW  
ESD Protection  
Human Body Model  
> 2 kV  
> 200 V  
> 4 kV  
Machine Model  
Charge Device Model  
Moisture Sensitivity (Note 1)  
Flammability Rating  
Transistor Count  
Level 1  
Oxygen Index: 28 to 34  
UL 94 V0 @ 0.125 in  
143 Devices  
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.  
Table 3. MAXIMUM RATINGS  
Symbol  
Parameter  
PECL Mode Power Supply  
NECL Mode Power Supply  
Condition 1  
= 0 V  
Condition 2  
Rating  
Unit  
V
V
V
V
8
CC  
EE  
I
EE  
V
V
= 0 V  
8  
V
CC  
PECL Mode Input Voltage  
NECL Mode Input Voltage  
V
V
= 0 V  
= 0 V  
V V  
6
6  
V
V
EE  
I
CC  
V V  
CC  
I
EE  
I
I
Output Current  
Continuous  
Surge  
50  
100  
mA  
mA  
out  
V
BB  
Sink/Source  
± 0.5  
mA  
°C  
BB  
T
Operating Temperature Range  
40 to +85  
65 to +150  
A
T
Storage Temperature Range  
°C  
stg  
q
Thermal Resistance (JunctiontoAmbient)  
0 lfpm  
500 lfpm  
SO20L  
SO20L  
90  
60  
°C/W  
°C/W  
JA  
q
Thermal Resistance (JunctiontoCase)  
Standard Board  
SO20L  
30 to 35  
°C/W  
°C  
JC  
T
sol  
Wave Solder  
Pb <2 to 3 sec @ 248°C  
265  
265  
PbFree <2 to 3 sec @ 260°C  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
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2
 
MC100EL13  
Table 4. 100EL SERIES PECL DC CHARACTERISTICS V = 5.0 V; V = 0.0 V (Note 2)  
CC  
EE  
40°C  
25°C  
Typ  
85°C  
Typ  
Symbol  
Characteristic  
Power Supply Current  
Min  
Typ  
30  
Max  
38  
Min  
Max  
38  
Min  
Max  
40  
Unit  
mA  
mV  
mV  
mV  
mV  
V
I
30  
32  
EE  
V
V
V
V
V
V
Output HIGH Voltage (Note 3)  
Output LOW Voltage (Note 3)  
Input HIGH Voltage (SingleEnded)  
Input LOW Voltage (SingleEnded)  
Output Voltage Reference  
3915  
3170  
3835  
3190  
3.62  
3995  
3305  
4120  
3445  
4120  
3525  
3.74  
3975  
3190  
3835  
3190  
3.62  
4045  
3295  
4120  
3380  
4120  
3525  
3.74  
3975  
3190  
3835  
3190  
3.62  
4050  
3295  
4120  
3380  
4120  
3525  
3.74  
OH  
OL  
IH  
IL  
BB  
Common Mode Range  
(Differential Configuration) (Note 4)  
V
IHCMR  
V
< 500 mV  
500 mV  
1.3  
1.5  
4.6  
4.6  
1.2  
1.4  
4.6  
4.6  
1.2  
1.4  
4.6  
4.6  
PP  
PP  
V
I
I
Input HIGH Current  
Input LOW Current  
150  
150  
150  
mA  
mA  
IH  
0.5  
0.5  
0.5  
IL  
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit  
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared  
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit  
values are applied individually under normal operating conditions and not valid simultaneously.  
2. Input and output parameters vary 1:1 with V . V can vary +0.8 V / 0.5 V.  
CC  
EE  
3. Outputs are terminated through a 50 W resistor to V 2.0 V.  
CC  
4. V  
min varies 1:1 with V , V  
max varies 1:1 with V . The V  
range is referenced to the most positive side of the differential  
IHCMR  
EE IHCMR  
CC  
IHCMR  
input signal.  
Table 5. 100EL SERIES NECL DC CHARACTERISTICS V = 0.0 V; V = 5.0 V (Note 5)  
CC  
EE  
40°C  
Typ  
30  
25°C  
Typ  
30  
85°C  
Typ  
32  
Symbol  
Characteristic  
Min  
Max  
38  
Min  
Max  
Min  
Max  
40  
Unit  
mA  
mV  
mV  
mV  
mV  
V
I
EE  
Power Supply Current  
38  
V
V
V
V
V
V
Output HIGH Voltage (Note 6)  
Output LOW Voltage (Note 6)  
Input HIGH Voltage (SingleEnded)  
Input LOW Voltage (SingleEnded)  
Output Voltage Reference  
1085 1005 880 1025 955  
880 1025 955  
880  
OH  
OL  
1830 1695 1555 1810 1705 1620 1810 1705 1620  
1165  
1810  
1.38  
880 1165  
1475 1810  
1.26 1.38  
880 1165  
1475 1810  
1.26 1.38  
880  
1475  
1.26  
IH  
IL  
BB  
Common Mode Range  
(Differential Configuration) (Note 7)  
V
IHCMR  
V
< 500 mV  
500 mV  
3.7  
3.5  
0.4  
0.4  
3.8  
3.6  
0.4  
0.4  
3.8  
3.6  
0.4  
0.4  
PP  
PP  
V
I
I
Input HIGH Current  
Input LOW Current  
150  
150  
150  
mA  
mA  
IH  
0.5  
0.5  
0.5  
IL  
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit  
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared  
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit  
values are applied individually under normal operating conditions and not valid simultaneously.  
5. Input and output parameters vary 1:1 with V . V can vary +0.8 V / 0.5 V.  
CC  
EE  
6. Outputs are terminated through a 50 W resistor to V 2.0 V.  
CC  
7. V  
min varies 1:1 with V , V  
max varies 1:1 with V . The V  
range is referenced to the most positive side of the differential  
IHCMR  
EE IHCMR  
CC  
IHCMR  
input signal.  
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3
 
MC100EL13  
Table 6. AC CHARACTERISTICS V = 5.0 V; V = 0.0 V or  
V = 0.0 V; V = 5.0 V (Note 8)  
CC EE  
CC  
EE  
40°C  
Typ  
25°C  
Typ  
85°C  
Typ  
Symbol  
Characteristic  
Min  
Max  
Min  
Max  
Min  
Max  
Unit  
f
Maximum Toggle Frequency  
Propagation Delay  
TBD  
TBD  
TBD  
GHz  
ps  
max  
t
t
PLH  
PHL  
CLKQ/Q  
410  
600  
430  
620  
450  
640  
t
OutputOutput Skew  
ps  
ps  
sk(O)  
Any QaQa, Any QbQb  
Any QaAny Qb  
50  
75  
50  
75  
50  
75  
t
t
Duty Cycle Skew  
sk(DC)  
|t  
t  
|
50  
50  
50  
PLH PHL  
CycletoCycle Jitter  
TBD  
TBD  
TBD  
ps  
mV  
ps  
JITTER  
V
Input Swing (Note 9)  
150  
230  
1000  
500  
150  
230  
1000  
500  
150  
230  
1000  
500  
PP  
t
r
t
f
Output Rise/Fall Times Q  
(20% 80%)  
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit  
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared  
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit  
values are applied individually under normal operating conditions and not valid simultaneously.  
8. V can vary +0.8 V / 0.5 V.  
EE  
9. V min is minimum input swing for which AC parameters guaranteed. The device has a DC gain of 40.  
PP  
Z = 50 W  
Q
Q
D
D
o
Receiver  
Device  
Driver  
Device  
Z = 50 W  
o
50 W  
50 W  
V
TT  
V
TT  
= V 2.0 V  
CC  
Figure 2. Typical Termination for Output Driver and Device Evaluation  
(See Application Note AND8020/D Termination of ECL Logic Devices.)  
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4
 
MC100EL13  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC100EL13DW  
SO20 WB  
38 Units / Rail  
38 Units / Rail  
MC100EL13DWG  
SO20 WB  
(PbFree)  
MC100EL13DWR2  
MC100EL13DWR2G  
SO20 WB  
1000 / Tape & Reel  
1000 / Tape & Reel  
SO20 WB  
(PbFree)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
Resource Reference of Application Notes  
AN1405/D  
AN1406/D  
AN1503/D  
AN1504/D  
AN1568/D  
AN1672/D  
AND8001/D  
AND8002/D  
AND8020/D  
AND8066/D  
AND8090/D  
ECL Clock Distribution Techniques  
Designing with PECL (ECL at +5.0 V)  
ECLinPSt I/O SPiCE Modeling Kit  
Metastability and the ECLinPS Family  
Interfacing Between LVDS and ECL  
The ECL Translator Guide  
Odd Number Counters Design  
Marking and Date Codes  
Termination of ECL Logic Devices  
Interfacing with ECLinPS  
AC Characteristics of ECL Devices  
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5
MC100EL13  
PACKAGE DIMENSIONS  
SO20 WB  
CASE 751D05  
ISSUE G  
D
A
q
NOTES:  
1. DIMENSIONS ARE IN MILLIMETERS.  
2. INTERPRET DIMENSIONS AND TOLERANCES  
PER ASME Y14.5M, 1994.  
20  
11  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
PROTRUSION.  
E
B
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION  
SHALL BE 0.13 TOTAL IN EXCESS OF B  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
1
10  
MILLIMETERS  
DIM MIN  
MAX  
2.65  
0.25  
0.49  
0.32  
12.95  
7.60  
20X B  
A
A1  
B
C
D
E
2.35  
0.10  
0.35  
0.23  
12.65  
7.40  
M
S
S
B
T
0.25  
A
A
e
1.27 BSC  
H
h
10.05  
0.25  
0.50  
0
10.55  
0.75  
0.90  
7
SEATING  
PLANE  
L
18X e  
q
_
_
A1  
C
T
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
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Phone: 81357733850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
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For additional information, please contact your local  
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MC100EL13/D  

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