MC100EP16VBDTR2 [ONSEMI]
3.3V / 5V ECL Differential Receiver/Driver with High and Low Gain; 3.3V / 5V ECL差分接收器/驱动器，具有高，低增益
| 型号： | MC100EP16VBDTR2 |
| 厂家： | 
ONSEMI |
| 描述： | 3.3V / 5V ECL Differential Receiver/Driver with High and Low Gain |
| 文件： | 总10页 (文件大小：151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC100EP16VB
3.3Vꢀ/ꢀ5VꢁECL Differential
Receiver/Driver with High
and Low Gain
Description
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MARKING DIAGRAMS*
The EP16VB is a world−class differential receiver/driver. The
device is functionally equivalent to the EP16 and LVEP16 devices but
with both high and low gain outputs. Q and Q outputs have a DC
HG
HG
gain several times larger than the DC gain of an EP16. Q output is
provided for feedback purposes.
8
KEP65
ALYW
G
SOIC−8
D SUFFIX
CASE 751
The V pin, an internally generated voltage supply, is available to
BB
8
this device only. For single-ended input conditions, the unused
1
1
differential input is connected to V as a switching reference voltage.
1
BB
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V via a 0.01 mF capacitor and limit current sourcing or sinking
CC
8
1
to 0.5 mA. When not used, V should be left open.
BB
TSSOP−8
DT SUFFIX
CASE 948R
KP65
8
Special considerations are required for differential inputs under No
Signal conditions to prevent instability.
The 100 Series contains temperature compensation.
ALYWG
G
Features
• Gain > 200
• Maximum Frequency > 3 GHz Typical
DFN8
MN SUFFIX
CASE 506AA
1
4
• PECL Mode Operating Range: V = 3.0 V to 5.5 V
CC
with V = 0 V
EE
A
L
Y
W
M
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb−Free Package
• NECL Mode Operating Range: V = 0 V
CC
with V = −3.0 V to −5.5 V
EE
• V Output
BB
• Pb−Free Packages are Available
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
December, 2006 − Rev. 4
MC100EP16VB/D
MC100EP16VB
Table 1. PIN DESCRIPTION
Q
D
1
2
8
7
V
CC
Pin
Function
ECL Data Inputs
D*, D*
Q
ECL Data Output
Q
HG
HG
Q
, Q
ECL High Gain Data Outputs
Reference Voltage Output
Positive Supply
HG
BB
CC
EE
HG
V
V
V
D
3
4
6
5
Q
Negative Supply
EP
Exposed pad must be connected to a
sufficient thermal conduit. Electrically
connect to the most negative supply or
leave floating open.
V
V
EE
BB
*Pins will default LOW when left open.
Figure 1. 8−Lead Pinout (Top View) and Logic
Diagram
Table 2. ATTRIBUTES
Characteristics
Value
75 kW
N/A
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
> 4 kV
> 200 V
> 2 kV
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb Pkg
Pb−Free Pkg
SOIC−8
Level 1
Level 1
Level 1
Level 1
Level 3
Level 1
TSSOP−8
DFN8
Flammability Rating
Transistor Count
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
167 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
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2
MC100EP16VB
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
V
V
CC
V
EE
V
I
PECL Mode Power Supply
NECL Mode Power Supply
V
V
= 0 V
= 0 V
6
EE
−6
V
CC
PECL Mode Input Voltage
NECL Mode Input Voltage
V
V
= 0 V
= 0 V
V v V
6
−6
V
V
EE
I
CC
V w V
CC
I
EE
I
I
Output Current
Continuous
Surge
50
100
mA
mA
out
V
BB
Sink/Source
± 0.5
mA
°C
BB
T
Operating Temperature Range
−40 to +85
−65 to +150
A
T
Storage Temperature Range
°C
stg
q
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
8 SOIC
8 SOIC
190
130
°C/W
°C/W
JA
q
q
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Standard Board
8 SOIC
41 to 44
°C/W
JC
JA
0 lfpm
500 lfpm
8 TSSOP
8 TSSOP
185
140
°C/W
°C/W
q
q
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Standard Board
8 TSSOP
41 to 44
°C/W
JC
JA
0 lfpm
500 lfpm
DFN8
DFN8
129
84
°C/W
°C/W
T
sol
Wave Solder
Pb
Pb−Free
265
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 4. 100EP DC CHARACTERISTICS, PECL V = 3.3 V, V = 0 V (Note 2)
CC
EE
−40°C
25°C
Typ
36
85°C
Typ
38
Symbol
Characteristic
Power Supply Current
Min
Typ
Max
Min
Max
Min
Max
52
Unit
mA
mV
mV
mV
mV
mV
V
I
EE
25
34
45
30
50
32
V
V
V
V
V
V
Output HIGH Voltage (Note 3)
Output LOW Voltage (Note 3)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
2125 2250
1305 1430
2075
2375 2125 2250 2375 2125 2250
1555 1305 1400 1555 1305 1380
2375
1555
2420
1675
1960
3.3
OH
OL
2420 2075
1675 1355
2420 2075
1675 1355
IH
1355
IL
1730 1845
2.0
1960 1730 1845 1960 1730 1845
BB
Input HIGH Voltage Common Mode Range
(Differential Configuration) (Note 4)
3.3
2.0
3.3
2.0
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
0.5
0.5
0.5
IL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with V . V can vary +0.3 V to −2.2 V.
CC
EE
3. All loading with 50 W to V − 2.0 V.
CC
4. V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential
IHCMR
EE IHCMR
CC
IHCMR
input signal.
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3
MC100EP16VB
Table 5. 100EP DC CHARACTERISTICS, PECL V = 5.0 V, V = 0 V (Note 5)
CC
EE
−40°C
25°C
Typ
36
85°C
Typ
38
Symbol
Characteristic
Power Supply Current
Min
25
Typ
Max
Min
Max
Min
Max
Unit
I
EE
34
45
30
50
32
52
mA
V
V
V
V
V
V
Output HIGH Voltage (Note 6)
Output LOW Voltage (Note 6)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
3825 3950 4075 3825 3950 4075 3825 3950 4075
3005 3130 3255 3005 3100 3255 3005 3080 3255
mV
mV
mV
mV
mV
V
OH
OL
3775
3055
4120 3775
3375 3055
4120 3775
3375 3055
4120
3375
IH
IL
3430 3445 3660 3430 3445 3660 3430 3445 3660
BB
Input HIGH Voltage Common Mode Range
(Differential Configuration) (Note 7)
2.0
5.0
2.0
5.0
2.0
5.0
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
0.5
0.5
0.5
IL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with V . V can vary +2.0 V to −0.5 V.
CC
EE
6. All loading with 50 W to V − 2.0 V.
CC
7. V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential
IHCMR
EE IHCMR
CC
IHCMR
input signal.
Table 6. 100EP DC CHARACTERISTICS, NECL V = 0 V; V = −5.5 V to −3.0 V (Note 8)
CC
EE
−40°C
Typ
34
25°C
Typ
36
85°C
Typ
38
Symbol
Characteristic
Power Supply Current
Min
Max
45
Min
Max
Min
Max
Unit
I
EE
25
30
50
32
52
mA
V
V
V
V
V
V
Output HIGH Voltage (Note 9)
Output LOW Voltage (Note 9)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
−1175 −1050 −925 −1175 −1050 −925 −1175 −1050 −925
−1995 −1870 −1745 −1995 −1900 −1745 −1995 −1920 −1745
mV
mV
mV
mV
mV
V
OH
OL
−1225
−1945
−880 −1225
−1625 −1945
−880 −1225
−1625 −1945
−880
IH
−1625
IL
−1570 −1455 −1340 −1570 −1455 −1340 −1570 −1455 −1340
BB
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 10)
V
EE
+ 2.0
0.0
V
EE
+ 2.0
0.0
V + 2.0
EE
0.0
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
0.5
0.5
0.5
IL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with V
.
CC
9. All loading with 50 W to V − 2.0 V.
CC
10.V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential
IHCMR
EE IHCMR
CC
IHCMR
input signal.
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4
MC100EP16VB
Table 7. AC CHARACTERISTICS V = 0 V; V = −3.0 V to −5.5 V or V = 3.0 V to 5.5 V; V = 0 V (Note 11)
CC
EE
CC
EE
−40°C
Typ
25°C
Typ
> 3
85°C
Typ
> 3
Symbol
Characteristic
Maximum Frequency (Figure 2)
Propagation Delay (Differential) Q
Min
Max
Min
Max
Min
Max
Unit
GHz
ps
f
> 3
max
t
t
,
200
200
250
250
275
280
325
330
350
350
400
400
250
250
300
300
300
300
350
350
400
400
450
450
275
275
325
325
310
320
360
370
425
425
475
475
PLH
PHL
(Differential) QHG, QHG
(Single−Ended) Q
(Single−Ended) QHG, QHG
t
t
Duty Cycle Skew (Note 12)
Cycle−to−Cycle Jitter (Figure 3)
5.0
0.2
20
5.0
0.2
20
5.0
0.2
20
ps
ps
SKEW
< 1
< 1
< 1
JITTER
V
PP
Input Voltage Swing
(Differential) HG
(Differential) Q
25
150
800
800
1200
1200
25
150
800
800
1200
1200
25
150
800
800
1200
1200
mV
t
r
t
f
Output Rise/Fall Times
Q
200
70
270
130
400
220
220
80
300
150
420
240
250
100
310
170
450
270
ps
(20% − 80%)
QHG, QHG
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to V − 2.0 V.
CC
12.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
900
800
700
600
500
400
300
200
100
0
9
8
7
6
5
4
3
2
1
0
500
1000
1500
2000
2500
3000
3500
4000
FREQUENCY (MHz)
Figure 2. Fmax/Jitter for QHG, QHG Output
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5
MC100EP16VB
900
800
700
600
500
400
300
200
100
0
9
8
7
6
5
4
3
2
1
0
500
1000
1500
2000
2500
3000
3500
4000
FREQUENCY (MHz)
Figure 3. Fmax/Jitter for Q Output
Z = 50 W
Q
Q
D
D
o
Receiver
Device
Driver
Device
Z = 50 W
o
50 W
50 W
V
TT
V
TT
= V − 2.0 V
CC
Figure 4. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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6
MC100EP16VB
ORDERING INFORMATION
Device
†
Package
Shipping
MC100EP16VBD
MC100EP16VBDG
SOIC−8
98 Units / Rail
98 Units / Rail
SOIC−8
(Pb−Free)
MC100EP16VBDR2
MC100EP16VBDR2G
SOIC−8
2500 / Tape & Reel
2500 / Tape & Reel
SOIC−8
(Pb−Free)
MC100EP16VBDT
MC100EP16VBDTG
TSSOP−8
100 Units / Rail
100 Units / Rail
TSSOP−8
(Pb−Free)
MC100EP16VBDTR2
MC100EP16VBDTR2G
TSSOP−8
2500 / Tape & Reel
2500 / Tape & Reel
TSSOP−8
(Pb−Free)
MC100EP16VBMNR4
MC100EP16VBMNR4G
DFN8
1000 / Tape & Reel
1000 / Tape & Reel
DFN8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
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7
MC100EP16VB
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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8
MC100EP16VB
PACKAGE DIMENSIONS
TSSOP−8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R−02
ISSUE A
8x K REF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
V
0.10 (0.004)
T U
S
0.15 (0.006) T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
2X L/2
8
5
4
0.25 (0.010)
B
−U−
L
1
M
PIN 1
IDENT
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
S
0.15 (0.006) T U
A
−V−
F
DETAIL E
MILLIMETERS
INCHES
MIN
DIM MIN
MAX
3.10
3.10
MAX
0.122
0.122
0.043
0.006
0.028
A
B
C
D
F
2.90
2.90
0.80
0.05
0.40
0.114
0.114
C
1.10 0.031
0.15 0.002
0.70 0.016
0.10 (0.004)
−W−
SEATING
PLANE
D
−T−
G
G
K
L
0.65 BSC
0.026 BSC
0.25
0.40 0.010
0.016
4.90 BSC
0.193 BSC
0
DETAIL E
M
0
6
6
_
_
_
_
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MC100EP16VB
PACKAGE DIMENSIONS
DFN8
CASE 506AA−01
ISSUE D
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
PIN ONE
REFERENCE
MILLIMETERS
DIM MIN
MAX
1.00
0.05
E
A
A1
A3
b
0.80
0.00
0.20 REF
0.20
0.30
2 X
D
D2
E
E2
e
K
2.00 BSC
0.10
C
1.10
1.30
2.00 BSC
2 X
0.70
0.90
0.50 BSC
0.10
C
TOP VIEW
0.20
0.25
−−−
0.35
L
A
0.10
0.08
C
C
8 X
(A3)
SIDE VIEW
D2
A1
SEATING
PLANE
C
e
e/2
4
1
8 X L
E2
K
8
5
0.10 C A B
0.05
8 X b
C
NOTE 3
BOTTOM VIEW
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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MC100EP16VB/D
相关型号：
SI9130DB
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SI9135LG-T1
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SI9135LG-T1-E3
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SI9135_11
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SI9136_11
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SI9130CG-T1-E3
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SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137
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SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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