MC100EP16VSMPR2_技术文档

MC100EP16VS

3.3V / 5VĄECL Differential

Receiver/Driver with

Variable Output Swing

The MC100EP16VS is a differential receiver with variable output

amplitude. The device is functionally equivalent to the 100EP16 with

an input pin that controls the amplitude of the outputs.

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The V

input pin controls the output amplitude of the EP16VS

and is referenced to V . (See Figure 5.) The operational range of the

CTRL

CC

input is from ≤ V

MARKING

DIAGRAMS*

V

(max output amplitude) to V (min

CTRL

BB

CC

8

output amplitude). (See Figure 4.) A variable resistor between the V

CC

and V

BB

pins, with the wiper driving V

, can control the output

CTRL

amplitude. Typical application circuits and a V

SO–8

D SUFFIX

CASE 751

KEP62

ALYW

Voltage vs.

CTRL

Output Amplitude graph are described in this data sheet. When left

open, the V pin will be internally pulled down to V and operate

8

1

CTRL EE

1

as a standard EP16, with 100% output amplitude.

The V pin, an internally generated voltage supply, is available to

8

1

BB

this device only. For single–ended input conditions, the unused

differential input is connected to V as a switching reference voltage.

TSSOP–8

DT SUFFIX

CASE 948R

KP62

ALYW

8

1

BB

may also rebias AC coupled inputs. When used, decouple V

V

BB

and V

BB

via a 0.01 mF capacitor and limit current sourcing or sinking

CC

to 0.5 mA. When not used, V

should be left open.

BB

10

1

10

QFN–10

MP SUFFIX

CASE 485C

• 220 ps Propagation Delay

• Maximum Frequency > 4 GHz Typical (See Graph)

• The 100 Series Contains Temperature Compensation

KP62

ALYW

1

• PECL Mode Operating Range: V

= 3.0 V to 5.5 V

CC

with V = 0 V

EE

K = MC100

A = Assembly Location

L = Wafer Lot

Y = Year

W = Work Week

• NECL Mode Operating Range: V = 0 V

CC

with V = –3.0 V to –5.5 V

EE

• Open Input Default State

• Q Output Will Default LOW with Inputs Open or at V

EE

*For additional information, see Application Note

AND8002/D

ORDERING INFORMATION

Device

Package

Shipping

MC100EP16VSD

SO–8

98 Units/Rail

MC100EP16VSDR2

MC100EP16VSDT

SO–8

2500 Tape & Reel

100 Units/Rail

TSSOP

MC100EP16VSDTR2

MC100EP16VSMP

MC100EP16VSMPR2

TSSOP 2500 Tape & Reel

QFN

124 Units/Rail

3000 Tape & Reel

Semiconductor Components Industries, LLC, 2002

1

Publication Order Number:

January, 2002 – Rev. 2

MC100EP16VS/D

MC100EP16VS

V

CTRL

1

2

8

7

V

CC

V

1

2

10

9

CTRL

V

CC

D

Q

D

Q

8

7

3

4

Q

V

BB

D

3

4

6

5

EE

5

6

NC

V

BB

V

EE

Figure 1. 8–Lead Pinout (Top View) and Logic Diagram

Figure 2. 10–Lead QFN Pinout (Top View)

PIN DESCRIPTION

FUNCTION

8 LD 10 LD

D*, D**

Q, Q

ECL Data Inputs

2, 3

6, 7

1

2, 3

8, 9

1

ECL Data Outputs

V

CTRL

*

Output Swing Control

V

Reference Voltage Output

Positive Supply

4

BB

V

CC

8

10

7

V

EE

Negative Supply

No Connect

5

NC

5, 6

*

Pins will default LOW when left open.

** Pins will default to V /2 when left open.

CC

ATTRIBUTES

Characteristics

Value

75 kW

Internal Input Pulldown Resistor

Internal Input Pullup Resistor

ESD Protection

37.5 kW

Human Body Model

Machine Model

Charged Device Model

> 4 kV

> 200 V

> 2 kV

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)

Level 1

Flammability Rating

Oxygen Index

UL–94 code V–0 A 1/8″

28 to 34

Transistor Count

140 Devices

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, see Application Note AND8003/D.

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2

MC100EP16VS

MAXIMUM RATINGS (Note 2)

Symbol Parameter

Condition 1

Condition 2

Rating

Units

V

PECL Mode Power Supply

NECL Mode Power Supply

V

= 0 V

6

V

CC

EE

I

EE

V

–6

CC

PECL Mode Input Voltage

NECL Mode Input Voltage

V

EE

V

CC

= 0 V

V ≤ V

V ≥ V

I

6

–6

V

I

CC

EE

I

Output Current

Continuous

Surge

50

100

mA

out

I

V

Sink/Source

± 0.5

mA

°C

BB

TA

Operating Temperature Range

Storage Temperature Range

–40 to +85

–65 to +150

T

°C

stg

θ

Thermal Resistance (Junction–to–Ambient) 0 LFPM

500 LFPM

8 SOIC

190

130

°C/W

JA

θ

Thermal Resistance (Junction–to–Case)

std bd

8 SOIC

41 to 44

°C/W

JC

JA

Thermal Resistance (Junction–to–Ambient) 0 LFPM

500 LFPM

8 TSSOP

185

140

°C/W

θ

Thermal Resistance (Junction–to–Case)

Wave Solder

std bd

8 TSSOP

41 to 44 ± 5%

°C/W

°C

JC

T

< 2 to 3 sec @ 248°C

265

sol

θ

Thermal Resistance (Junction–to–Ambient) 0 LFPM

500 LFPM

10 QFN

40

20

°C/W

JA

θ

Thermal Resistance (Junction–to–Case)

std bd

10 QFN

3.3

°C/W

JC

2. Maximum Ratings are those values beyond which device damage may occur.

DC CHARACTERISTICS, PECL V

CC

= 3.3 V, V

EE

= 0 V (Note 3)

–40°C

25°C

85°C

Symbol

Characteristic

Power Supply Current

Output HIGH Voltage (Max Swing)

Min

30

Typ

Max

Min

Typ

Max

Min

32

Typ

Max

48

Unit

mA

mV

I

36

42

31

38

44

40

EE

V

OH

2155

2405 2155

2405

(Note 4) ≥ V

V

≥ V

EE

CC

CTRL

Output LOW Voltage (Max Swing)

V

OL

mV

(Note 4)

V

≤ V

> V

1355

1490 1605 1355

1520 1605 1355

1520 1605

CTRL

BB

VCC ≥ V

See

Fig.3

See

Fig.3

See

Fig.3

CTRL

BB

V

= V

CC

(Min Swing) 2105

2230 2355 2095

2420 2075

2220 2345 2065

2420 2075

2190 2315

2420

CTRL

V

D, D Input HIGH Voltage (Single–Ended)

D, D Input LOW Voltage (Single–Ended)

Output Voltage Reference

2075

1490

1805

mV

V

IH

1675 1490

1675

IL

1905 2005 1805

1905 2005

BB

CTRL

Input Voltage (V

)

V

CC

CTRL

EE

CC

EE

CC

EE

V

Input HIGH Voltage Common Mode

Range (Differential) (Note 5)

2.0

2.9

2.0

2.9

2.0

2.9

IHCMR

I

Input HIGH Current

Input LOW Current

150

µA

IH

D

0.5

–150

0.5

–150

0.5

–150

IL

NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.

3. Input and output parameters vary 1:1 with V . V

can vary +0.3 V to –2.2 V.

does not change with V . V

CC EE

4. All loading with 50 Ω to V –2.0 volts. V

CC OH

changes with V

. V

is referenced to V

.

CC

CTRL OL

max varies 1:1 with V . The V range is referenced to the most positive side of the differential

CTRL CTRL

5. V

IHCMR

min varies 1:1 with V , V

EE IHCMR

CC IHCMR

input signal.

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3

MC100EP16VS

DC CHARACTERISTICS, PECL V

CC

= 5.0 V, V

EE

= 0 V (Note 6)

–40°C

25°C

Typ

38

85°C

Typ

40

Symbol

Characteristic

Power Supply Current

Output HIGH Voltage (Note 7)

Min

30

Typ

Max

Min

Max

Min

Max

Unit

mA

mV

I

36

42

31

44

32

48

EE

V

OH

3855

3980 4105 3855

3980 4105

V

CC

> V

CTRL

EE

Output LOW Voltage (Max Swing)

V

OL

mV

(Note 7)

V

≤ V

> V

3055

3190 3305 3055

3220 3305 3055

3220 3305

CTRL

BB

VCC ≥ V

See

Fig.3

See

Fig.3

See

Fig.3

CTRL

BB

V

= V

CC

(Min Swing) 3805

3930 4055 3795

4120 3775

3920 4045 3765

4120 3775

3890 4015

4120

CTRL

V

D, D Input HIGH Voltage (Single–Ended)

D, D Input LOW Voltage (Single–Ended)

3775

3190

mV

V

IH

3375 3190

3375

IL

Input Voltage (V

)

V

CC

CTRL

BB

CTRL

EE

CC

EE

CC

EE

Output Voltage Reference

3505

2.0

3605 3705 3505

3605 3705

4.6

V

Input HIGH Voltage Common Mode

Range (Differential) (Note 8)

4.6

2.0

4.6

2.0

IHCMR

I

Input HIGH Current

Input LOW Current

150

µA

IH

D

0.5

–150

0.5

–150

0.5

–150

IL

NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.

6. Input and output parameters vary 1:1 with V . V

can vary +2.0 V to –0.5 V.

does not change with V . V

CC EE

7. All loading with 50 Ω to V –2.0 volts. V

CC OH

changes with V

. V

is referenced to V

.

CC

CTRL OL

CTRL CTRL

8. V

min varies 1:1 with V , V

max varies 1:1 with V . The V

range is referenced to the most positive side of the differential

IHCMR

input signal.

EE IHCMR CC IHCMR

DC CHARACTERISTICS, NECL V

= 0 V; V

EE

= –5.5 V to –3.0 V (Note 9)

CC

–40°C

25°C

Typ

38

85°C

Typ

40

Symbol

Characteristic

Power Supply Current

Output HIGH Voltage (Note 10)

Min

Typ

Max

Min

Max

Min

Max

Unit

mA

mV

I

30

36

42

31

44

32

48

EE

V

OH

–1145 –1020 –895 –1145 –1020 –895 –1145 –1020 –895

V

> V

CTRL

> V

EE

CC

Output LOW Voltage (Max Swing)

V

OL

mV

(Note 10)

V

≤ V

–1945 –1810 –1695 –1945 –1780 –1695 –1945 –1780 –1695

CTRL

BB

VCC ≥ V

> V

See

BB

Fig.3

V

CTRL

= V (Min Swing) –1195 –1070 –945 –1205 –1080 –955 –1235 –1110 –985

CC

V

D, D Input HIGH Voltage (Single–Ended) –1225

–880 –1225

–1625 –1810

–880 –1225

–1625 –1810

–880

mV

IH

D, D Input LOW Voltage (Single–Ended)

Output Voltage Reference

–1810

–1625 mV

IL

–1525 –1425 –1325 –1525 –1425 –1325 –1525 –1425 –1325 mV

BB

CTRL

Input Voltage (V

)

V

EE

V

CC

V

EE

V

CC

V

EE

V

CC

mV

V

CTRL

V

Input HIGH Voltage Common Mode

Range (Differential) (Note 11)

V

EE

+2.0

–0.4

V

EE

+2.0

–0.4

V

EE

+2.0

–0.4

IHCMR

I

Input HIGH Current

Input LOW Current

150

µA

IH

D

0.5

–150

0.5

–150

0.5

–150

IL

NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.

9. Input and output parameters vary 1:1 with V

.

CC

does not change with V

10.All loading with 50 Ω to V –2.0 volts. V

. V

changes with V

range is referenced to the most positive side of the differential

. V

is referenced to V

.

CC

CC OH

CTRL OL

CTRL CTRL

11. V

IHCMR

min varies 1:1 with V , V

input signal.

max varies 1:1 with V . The V

EE IHCMR CC IHCMR

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4

MC100EP16VS

AC CHARACTERISTICS V

CC

= 0 V; V

EE

= –3.0 V to –5.5 V or

V

CC

= 3.0 V to 5.5 V; V = 0 V (Note 12)

EE

–40°C

Typ

25°C

Typ

> 4

85°C

Typ

> 4

Symbol

Characteristic

Min

Max

Min

Max

Min

Max

Unit

f

Maximum Toggle Frequency

> 4

GHz

max

(See Figure 7. F

max

/JITTER)

t

,

Propagation Delay to Output Differential

Max Swing 150

ps

PLH

PHL

220

150

280

210

150

90

220

150

280

210

160

100

240

160

300

220

Min Swing

90

t

Duty Cycle Skew (Note 13)

Cycle–to–Cycle Jitter

5.0

0.2

20

5.0

0.2

20

5.0

0.2

20

ps

SKEW

< 1

JITTER

(See Figure 7. F

/JITTER)

max

V

Input Voltage Swing (Differential) (Note 14)

150

800

1200

150

800

1200

150

800

1200

mV

ps

PP

t

r

t

f

Output Rise/Fall Times

(20% – 80%)

Max Swing Q

Min Swing

70

30

120

80

170

130

80

20

130

70

180

120

100

20

150

70

200

120

12.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 Ω to V –2.0 V.

CC

13.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays

are measured from the cross point of the inputs to the cross point of the outputs.

14.V (min) is minimum input swing for which AC parameters are guaranteed.

PP

100

90

80

70

60

50

40

30

20

10

0

0.0

0.5

1.0

1.5

2.0

VOLTS (V)

Figure 3. V

– V

(pin #1)

CTRL

CC

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5

MC100EP16VS

V

OH

OL

Min Swing

Max Swing

0.0

0.5

1.0

1.5

2.0

1.3

VOLTS (V)

Figure 4. V

– V

CTRL

CC

V

CTRL

+

1

8

7

V

CC

CTRL

(10)

V

SWING

(pk–pk)

D

2

3

Q

(9)

D

6

5

Q

(8)

50 W

V

BB

4

V

EE

(7)

V

CC

–2 V

Figure 5. Voltage Source Implementation for 8 Ld Package

10 Ld Package Pins in ( )

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6

MC100EP16VS

+5 V

1

2

8

V

(10)

CC

V

CTRL

V

SWING

D

7

6

(pk–pk)

Q

(9)

D

3

4

Q

(8)

470 W

5

V

BB

V

EE

(7)

Figure 6. Alternative Implementation for 8 Ld Package

10 Ld Package Pins in ( )

1000

900

800

700

600

500

400

300

200

100

0

10

9

2.00 V Below V

CC

8

7

1.25 V Below V

1.00 V Below V

CC

6

5

4

3

CC

0.75 V Below V

CC

2

1

0.25 V Below V

500

CC

(JITTER)

2500 3000

FREQUENCY (MHz)

0

1000

1500

2000

3500

4000

Figure 7. F

/Jitter

max

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7

MC100EP16VS

Q

D

Driver

Device

Receiver

Device

D

50 Ω

V

TT

V

TT

= V

– 2.0 V

CC

Figure 8. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020 – Termination of ECL Logic Devices.)

Resource Reference of Application Notes

AN1404

AN1405

AN1406

AN1504

AN1568

AN1650

AN1672

AND8001

AND8002

AND8009

AND8020

ECLinPS Circuit Performance at Non–Standard V Levels

IH

–

ECL Clock Distribution Techniques

Designing with PECL (ECL at +5.0 V)

Metastability and the ECLinPS Family

Interfacing Between LVDS and ECL

Using Wire–OR Ties in ECLinPS Designs

The ECL Translator Guide

Odd Number Counters Design

Marking and Date Codes

ECLinPS Plus Spice I/O Model Kit

Termination of ECL Logic Devices

For an updated list of Application Notes, please see our website at http://onsemi.com.

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8

MC100EP16VS

PACKAGE DIMENSIONS

SO–8

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751–07

ISSUE W

–X–

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

A

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE MOLD

PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER

SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN

EXCESS OF THE D DIMENSION AT MAXIMUM

MATERIAL CONDITION.

8

5

4

S

M

B

0.25 (0.010)

Y

1

K

–Y–

G

MILLIMETERS

INCHES

DIM MIN

MAX

5.00

4.00

1.75

0.51

MIN

MAX

0.197

0.157

0.069

0.020

A

B

C

D

G

H

J

4.80

3.80

1.35

0.33

0.189

0.150

0.053

0.013

C

N X 45

_

SEATING

PLANE

–Z–

1.27 BSC

0.050 BSC

0.10 (0.004)

0.10

0.19

0.40

0

0.25

1.27

8

0.004

0.010

0.050

8

0.007

0.016

0

M

J

H

D

K

M

N

S

_

0.25

5.80

0.50

6.20

0.010

0.228

0.020

0.244

M

S

X

0.25 (0.010)

Z

Y

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9

MC100EP16VS

PACKAGE DIMENSIONS

TSSOP–8

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948R–02

ISSUE A

8x K REF

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

M

S

V

0.10 (0.004)

T U

S

0.15 (0.006) T U

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.

PROTRUSIONS OR GATE BURRS. MOLD FLASH

OR GATE BURRS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED 0.25 (0.010)

PER SIDE.

2X L/2

8

5

4

0.25 (0.010)

B

–U–

L

1

M

PIN 1

IDENT

5. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

6. DIMENSION A AND B ARE TO BE DETERMINED

AT DATUM PLANE -W-.

S

0.15 (0.006) T U

A

–V–

F

DETAIL E

MILLIMETERS

INCHES

MIN

DIM MIN

MAX

3.10

MAX

0.122

0.043

0.006

0.028

A

B

C

D

F

2.90

0.80

0.05

0.40

0.114

C

1.10 0.031

0.15 0.002

0.70 0.016

0.10 (0.004)

–W–

SEATING

PLANE

D

–T–

G

K

L

0.65 BSC

0.026 BSC

0.25

0.40 0.010

0.016

4.90 BSC

0.193 BSC

0

DETAIL E

M

0

6

_

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10

MC100EP16VS

PACKAGE DIMENSIONS

10 QFN

MP SUFFIX

CASE 485C–01

ISSUE O

–X–

A

M

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION D APPLIES TO PLATED TERMINAL

AND IS MEASURED BETWEEN 0.25 AND 0.30 MM

FROM TERMINAL.

–Y–

N

B

4. COPLANARITY APPLIES TO THE EXPOSED PAD

AS WELL AS THE TERMINALS.

2 PL

MILLIMETERS

DIM MIN MAX

3.00 BSC

INCHES

MIN MAX

0.25 (0.010) T

2 PL

A

B

C

D

E

F

0.118 BSC

0.80

1.00

0.30

2.55

1.85

0.031

0.039

0.012

0.100

0.073

0.20

2.45

1.75

0.008

0.096

0.069

0.25 (0.010) T

G

H

J

0.50 BSC

0.020 BSC

J

R

1.23

1.28

0.048

0.050

0.20 REF

0.008 REF

K

L

0.00

0.35

0.05

0.45

0.000

0.014

0.002

0.018

C

SEATING

PLANE

–T–

M

N

P

R

1.50 BSC

0.059 BSC

K

0.88

0.60

0.93

0.80

0.035

0.024

0.037

0.031

E

H

L

G

10

F

P

1

10 PL D NOTE 3

M

0.10 (0.004)

T X Y

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11

MC100EP16VS

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes

without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular

purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,

including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be

validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.

SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or

death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold

SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable

attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim

alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION

Literature Fulfillment:

JAPAN: ON Semiconductor, Japan Customer Focus Center

4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031

Phone: 81–3–5740–2700

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada

Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada

Email: ONlit@hibbertco.com

Email: r14525@onsemi.com

ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local

Sales Representative.

N. American Technical Support: 800–282–9855 Toll Free USA/Canada

MC100EP16VS/D

http://onsemi.com

12


型号：	MC100EP16VSMPR2
厂家：	ONSEMI
描述：	LINE TRANSCEIVER, DSO10, QFN-10 驱动接口集成电路驱动器
文件：	总12页 (文件大小：86K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MC100EP16VSMPR2 [ONSEMI]

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