MC100EPT26D [ONSEMI]

1:2 Fanout Differential LVPECL to LVTTL Translator; 1 : 2扇出差分LVPECL到LVTTL翻译
MC100EPT26D
型号: MC100EPT26D
厂家: ONSEMI    ONSEMI
描述:

1:2 Fanout Differential LVPECL to LVTTL Translator
1 : 2扇出差分LVPECL到LVTTL翻译

锁存器 接口集成电路 光电二极管
文件: 总4页 (文件大小:93K)
中文:  中文翻译
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The MC100EPT26 is a 1:2 Fanout Differential LVPECL to LVTTL  
translator. Because LVPECL (Positive ECL) levels are used only  
+3.3V and ground are required. The small outline 8–lead SOIC  
package and the 1:2 fanout design of the EPT26 makes it ideal for  
applications which require the low skew duplication of a signal in a  
tightly packed PC board.  
The VBB output allows the EPT26 to be used in a single–ended  
input mode. In this mode the VBB output is tied to the D0 input for a  
non–inverting buffer or the D0 input for an inverting buffer. If used,  
the VBB pin should be bypassed to ground via a 0.01µF capacitator.  
http://onsemi.com  
MARKING  
DIAGRAMS*  
8
SO–8  
D SUFFIX  
CASE 751  
HPT26  
ALYW  
8
1
1
8
1.4ns Typical Propagation Delay  
275MHz Fmax (Clock bit stream, not pseudo–random)  
Differential LVPECL inputs  
TSSOP–8  
DT SUFFIX  
CASE 948R  
HR26  
ALYW  
8
1
1
Small Outline SOIC Package  
24mA TTL outputs  
Flowthrough Pinouts  
ESD Protection: >2KV HBM, >100V MM  
Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D  
A = Assembly Location  
L = Wafer Lot  
Y = Year  
W = Work Week  
*For additional information, see Application Note  
AND8002/D  
Q Outputs will default LOW with inputs open or at V  
EE  
V Output  
BB  
New Differential Input Common Mode Range  
PIN DESCRIPTION  
Moisture Sensitivity Level 1, Indefinite Time Out of Drypack.  
For Additional Information, See Application Note AND8003/D  
Flammability Rating: UL–94 code V–0 @ 1/8”,  
Oxygen Index 28 to 34  
PIN  
Q0, Q1  
D, D  
FUNCTION  
LVTTL Outputs  
Differential LVPECL Input Pair  
Positive Supply  
V
CC  
Transistor Count = 117 devices  
V
BB  
Reference Voltage  
Ground  
GND  
NC 1  
8
7
V
CC  
ORDERING INFORMATION  
Device  
Package  
Shipping  
D
D
2
3
4
Q0  
MC100EPT26D  
SO–8  
98 Units / Rail  
LVTTL  
MC100EPT26DR2  
MC100EPT26DT  
SO–8  
2500 / Reel  
TSSOP–8  
98 Units / Rail  
6
5
Q1  
MC100EPT26DTR2 TSSOP–8  
2500 / Reel  
VBB  
GND  
LVPECL  
Figure 1. 8–Lead Pinout (Top View) and Logic Diagram  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
May, 2000 – Rev. 2  
MC100EPT26/D  
MC100EPT26  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Power Supply (GND = 0V)  
Value  
0 to 3.8  
0 to 3.8  
Unit  
VDC  
VDC  
mA  
V
V
CC  
Input Voltage (GND = 0V, V not more positive than V  
I
)
I
CC  
I
Output Current  
Continuous  
Surge  
50  
100  
out  
I
V
Sink/Source Current  
± 0.5  
mA  
°C  
BB  
BB  
T
Operating Temperature Range  
Storage Temperature  
–40 to +85  
–65 to +150  
A
T
°C  
stg  
θ
Thermal Resistance (Junction–to–Ambient)  
Still Air  
500lfpm  
190  
130  
°C/W  
JA  
θ
Thermal Resistance (Junction–to–Case)  
41 to 44 ± 5%  
°C/W  
°C  
JC  
T
Solder Temperature (<2 to 3 Seconds: 245°C desired)  
265  
sol  
* Maximum Ratings are those values beyond which damage to the device may occur.  
Use for inputs of same package only.  
DC CHARACTERISTICS (V  
= 3.3V ± 0.3V; GND = 0V; T = –40°C to 85°C)  
CC  
A
Symbol  
Characteristic  
Min  
10  
Typ  
20  
Max  
Unit  
mA  
mA  
mV  
mV  
µA  
I
Power Supply Current (Outputs set to HIGH)  
Power Supply Current (Outputs set to LOW)  
18  
35  
CCH  
CCL  
I
15  
28  
V
IH  
V
IL  
Input HIGH Voltage (V  
= 3.3) (Note 1.)  
= 3.3) (Note 1.)  
2135  
1490  
2420  
1825  
150  
0.5  
CC  
Input LOW Voltage (V  
Input HIGH Current  
Input LOW Current  
CC  
I
IH  
IL  
I
D
D
µA  
–150  
2.4  
V
V
Output HIGH Voltage (I  
= –3.0mA) (Note 2.)  
OH  
= 24mA) (Note 2.)  
V
V
OH  
Output LOW Voltage (I  
OL  
0.5  
–150  
3.3  
OL  
I
Output Short Circuit Current  
–50  
2.0  
mA  
V
OS  
V
V
Input HIGH Voltage Common Mode Range (Note 3.)  
Output Voltage Reference  
IHCMR  
2.0  
V
BB  
NOTE: 100EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The  
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.  
1. All values vary 1:1 with V  
.
CC  
2. All loading with 500 ohms to GND, CL = 20pF.  
3. V min varies 1:1 with GND, max varies 1:1 with V  
.
IHCMR CC  
AC CHARACTERISTICS (V  
= 3.3V ± 0.3V; GND = 0V)  
CC  
–40°C  
Typ  
25°C  
Typ  
350  
85°C  
Typ  
350  
Symbol  
Characteristic  
Maximum Toggle  
Min  
Max  
Min  
Max  
Min  
Max  
Unit  
f
275  
350  
275  
275  
MHz  
max  
Frequency (Note 4.)  
t
t
,
Propagation Delay to  
Output Differential (Note 5.)  
1.2  
1.2  
1.5  
1.5  
1.8  
1.8  
1.2  
1.2  
1.5  
1.5  
1.8  
1.8  
1.3  
1.2  
1.7  
1.5  
2.2  
1.8  
ns  
ps  
PLH  
PHL  
t
t
t
Output–to–Output Skew++  
Output–to–Output Skew– –  
Part–to–Part Skew (Note 6.)  
60  
25  
500  
60  
25  
500  
60  
25  
500  
SK+ +  
SK– –  
SKPP  
t
Cycle–to–Cycle Jitter  
TBD  
800  
TBD  
800  
TBD  
800  
ps  
mV  
ps  
JITTER  
V
Input Voltage Swing (Diff.)  
150  
330  
1200  
900  
150  
330  
1200  
900  
150  
330  
1200  
900  
PP  
t
r
t
f
Output Rise/Fall Times  
(0.8V – 2.0V)  
Q, Q  
600  
600  
650  
4. F  
max  
guaranteed for functionality only. V  
OL  
and V  
levels are guaranteed at DC only.  
OH  
6. Skews are measured between outputs under identical transitions.  
5. Reference (V  
= 3.3V ± 5%, GND = 0V)  
CC  
http://onsemi.com  
2
MC100EPT26  
PACKAGE DIMENSIONS  
SO–8  
D SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751–06  
ISSUE T  
NOTES:  
D
A
1. DIMENSIONING AND TOLERANCING PER ASME  
Y14.5M, 1994.  
C
2. DIMENSIONS ARE IN MILLIMETER.  
3. DIMENSION D AND E DO NOT INCLUDE MOLD  
PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS  
OF THE B DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
8
1
5
4
M
M
0.25  
B
H
E
h X 45  
MILLIMETERS  
B
e
DIM MIN  
MAX  
1.75  
0.25  
0.49  
0.25  
5.00  
4.00  
A
A1  
B
C
D
E
1.35  
0.10  
0.35  
0.19  
4.80  
3.80  
A
C
SEATING  
PLANE  
L
e
1.27 BSC  
0.10  
H
h
L
5.80  
0.25  
0.40  
0
6.20  
0.50  
1.25  
7
A1  
B
M
S
S
0.25  
C B  
A
http://onsemi.com  
3
MC100EPT26  
PACKAGE DIMENSIONS  
TSSOP–8  
DT SUFFIX  
PLASTIC TSSOP PACKAGE  
CASE 948R–02  
ISSUE A  
8x K REF  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
M
S
S
0.10 (0.004)  
T U  
V
Y14.5M, 1982.  
S
0.15 (0.006) T U  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A DOES NOT INCLUDE MOLD  
FLASH. PROTRUSIONS OR GATE BURRS. MOLD  
FLASH OR GATE BURRS SHALL NOT EXCEED  
0.15 (0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH OR PROTRUSION SHALL NOT  
EXCEED 0.25 (0.010) PER SIDE.  
2X L/2  
8
5
4
0.25 (0.010)  
B
–U–  
L
1
M
PIN 1  
IDENT  
5. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
6. DIMENSION A AND B ARE TO BE  
DETERMINED AT DATUM PLANE W.  
S
0.15 (0.006) T U  
A
–V–  
F
DETAIL E  
MILLIMETERS  
INCHES  
DIM MIN  
MAX  
3.10  
3.10  
1.10 0.031  
0.15 0.002  
0.70 0.016  
MIN  
0.114  
0.114  
MAX  
0.122  
0.122  
0.043  
0.006  
0.028  
A
B
C
D
F
2.90  
2.90  
0.80  
0.05  
0.40  
C
0.10 (0.004)  
SEATING  
PLANE  
–W–  
D
–T–  
G
G
K
L
0.65 BSC  
0.026 BSC  
0.016  
0.193 BSC  
0.25  
0.40 0.010  
4.90 BSC  
DETAIL E  
M
0
6
0
6
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
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MC100EPT26/D  

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