MC100H605FN [ONSEMI]
Registered Hex ECL to TTL Translator; 注册六角ECL至TTL转换器
| 型号： | MC100H605FN |
| 厂家： | 
ONSEMI |
| 描述： | Registered Hex ECL to TTL Translator |
| 文件： | 总7页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC10H605, MC100H605
Registered Hex ECL to TTL
Translator
Description
The MC10/100H605 is a 6−bit, registered, dual supply ECL to TTL
translator. The device features differential ECL inputs for both data
and clock. The TTL outputs feature balanced 24 mA sink/source
capabilities for driving transmission lines.
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With its differential ECL inputs and TTL outputs the H605 device is
ideally suited for the receive function of a HPPI bus type
board−to−board interface application. The on chip registers simplify
the task of synchronizing the data between the two boards.
28
1
A V reference voltage is supplied for use with single−ended data
BB
PLCC−28
FN SUFFIX
CASE 776
or clock. For single−ended applications the V output should be
BB
connected to the “bar” inputs (Dn or CLK) and bypassed to ground via
a 0.01 mF capacitor. To minimize the skew of the device differential
clocks should be used.
The ECL level Master Reset pin is asynchronous and common to all
flip−flops. A “HIGH” on the Master Reset forces the Q outputs
“LOW”.
MARKING DIAGRAM*
1 28
The device is available in either ECL standard: the 10H device is
compatible with MECL 10H™ logic levels while the 100H device is
compatible with 100K logic levels.
MCxxxH605G
AWLYYWW
Features
• Differential ECL Data and Clock Inputs
• 24 mA Sink, 24 mA Source TTL Outputs
• Dual Power Supply
xxx
A
WL
YY
WW
G
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
• Multiple Power and Ground Pins to Minimize Noise
• 2.0 ns Part−to−Part Skew
• Pb−Free Packages are Available*
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
September, 2009 − Rev. 8
MC10H605/D
MC10H605, MC100H605
Q3
V
CCT
Q4 GND Q5 V
MR
CCT
Table 1. PIN DESCRIPTION
25
24
23
22
21
20
19
PIN
FUNCTION
26
27
28
18
17
16
D5
Q2
Q1
Q0
D0−D5
D0−D5
CLK, CLK
MR
True ECL Data Inputs
Inverted ECL Data Inputs
Differential ECL Clock Input
ECL Master Reset Input
TTL Outputs
D5
D4
D4
V
GND
CLK
CLK
15
14
13
12
Q0−Q5
2
3
4
V
V
ECL V (0 V)
CCE
CCE
CC
TTL V (+5 V)
CCT
GND
CC
D3
D3
TTL Ground (0 V)
V
BB
V
ECL V (−5.2 V)
EE
EE
5
6
7
8
9
10
11
D0 D0
V
EE
D1 D1 D2 D2
Figure 1. Pinout: PLCC−28
(Top View)
Table 2. TRUTH TABLE
1 OF 6 BITS
Dn
MR
TCLK/CLK
Qn+1
L
H
X
L
L
H
Z
Z
X
L
H
L
Dn
Dn
Qn
D
Q
Z = LOW to HIGH Transition
CLK
R
CLK
CLK
MR
VBB
Figure 2. Logic Diagram
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2
MC10H605, MC100H605
Table 3. 10H ECL DC CHARACTERISTICS (V
= +5.0 V 10%; V = −5.20 V 5%; V
= GND = 0 V)
CCT
EE
CCE
0°C
Typ
63
25°C
Typ
63
85°C
Typ
61
Min
Max
75
Min
Max
Min
Max
75
Unit
mA
mA
Symbol
Characteristic
Supply Current
Condition
I
I
I
75
EE
Input HIgh Current
Input Low Current
Input High Voltage
Input Low Voltage
Output Bias Voltage
Input Differential Voltage
255
175
175
INH
INL
0.5
0.5
0.5
mA
V
V
V
V
V
−1170
−1950
−1400
150
−840 −1130
−1480 −1950
−1280 −1370
150
−810 −1060
−1480 −1950
−1270 −1330
150
−720
mV
IH
−1480 mV
−1210 mV
mV
IL
BB
Diff
max
Input Common Mode Re-
ject Range
0
0
0
mV
CMRR
V
Input Common Mode Re-
ject Range
V
EE
V
EE
V
EE
= −4.94 −2800
= −5.20 −3000
= −5.46 −3300
−2800
−3000
−3300
−2800
−3000
−3300
mV
min
CMRR
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Table 4. 100H ECL DC CHARACTERISTICS (V
= +5.0 V 5%; V = −4.2 V to 5.5 V; V
= GND = 0 V)
CCT
EE
CCE
0°C
Typ
65
25°C
Typ
65
85°C
Typ
70
Min
Max
75
Min
Max
75
175
Min
Max
85
Symbol
Characteristic
Supply Current
Condition
Unit
mA
mA
I
I
I
EE
Input HIgh Current
Input Low Current
Input High Voltage
Input Low Voltage
Reference Voltage
Input Differential Voltage
255
175
INH
INL
0.5
0.5
0.5
mA
V
V
V
V
V
−1165
−1810
−1400
150
−880 −1165
−1475 −1810
−1280 −1400
150
−880 −1165
−1475 −1810
−1280 −1400
150
−880
mV
IH
−1475 mV
−1200 mV
mV
IL
BB
Diff
max
Input Common Mode Re-
ject Range
0
0
0
mV
CMRR
V
Input Common Mode Re-
ject Range
V
EE
V
EE
V
EE
= −4.20 −2000
= −4.50 −2200
= −4.80 −2400
−2000
−2200
−2400
−2000
−2200
−2400
mV
min
CMRR
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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3
MC10H605, MC100H605
Table 5. TTL DC CHARACTERISTICS (V
= +5.0 V 10%; V = −5.2 V 5% (10H); V = −4.2 V to 5.5 V (100H);
CCT
EE
EE
V
CCE
= GND = 0 V)
0°C
Typ
65
25°C
Typ
65
85°C
Typ
65
Min
Max
75
Min
Max
75
Min
Max
75
Symbol
Characteristic
Supply Current
Condition
Outputs Low
Outputs High
Unit
mA
mA
mV
mV
mA
I
CCL
CCH
I
Supply Current
65
75
65
75
65
75
V
V
Output Low Voltage
Output High Voltage
I
= 24 mA
= 24 mA
OH
500
500
500
OL
OL
I
2.5
2.5
2.5
OH
I
Output Short Circuit
Current
V
OUT
= 0 V
100
225
100
225
100
225
OS
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Table 6. AC TEST LIMITS (V
= +5.0 V 10%; V = −5.2 V 5% (10H); V = −4.2 V to 5.5 V (100H); V
= GND = 0 V)
CCT
EE
EE
CCE
0°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Symbol
Characteristic
Condition
Unit
t
Propagation Delay
Across P.S. and Temp
ns
PLH
CLK to Q (Diff)
CLK to Q (SE)
C = 50 pF
4.5
4.3
5.3
5.3
6.5
6.7
4.5
4.3
5.4
5.4
6.5
6.7
4.5
4.3
5.6
5.6
6.5
6.7
L
t
Propagation Delay
Across P.S. and Temp
ns
PHL
CLK to Q (Diff)
CLK to Q (SE)
C = 50 pF
4.0
3.8
5.0
5.0
6.0
6.2
4.0
3.8
5.1
5.1
6.0
6.2
4.0
3.8
5.5
5.5
6.0
6.2
L
t
t
Propagation Delay
MR to Q
Across P.S. and Temp
ns
ns
PHL
C = 50 pF
2.5
4.9
7.0
2.5
5.2
7.0
3.0
5.8
7.5
L
Device Skew
C = 50 pF
L
SKEW
Part−to−Part (Diff)
Within−Device
1.0
0.3
2.0
0.7
1.0
0.3
2.0
0.7
1.0
0.3
2.0
0.7
t
t
t
Setup Time
1.5
1.5
1.0
1.5
1.5
1.0
1.5
1.5
1.0
ns
ns
ns
S
Hold Time
H
Minimum Pulse Width
CLK
PW
t
Minimum Pulse Width
MR
1.0
1.0
1.0
ns
PW
V
Minimum Input Swing
Rise Time
Peak−to−Peak
1.0 V to 2.0 V
1.0 V to 2.0 V
150
0.7
0.5
2.5
150
0.7
0.5
2.5
150
0.7
0.5
2.5
mV
ns
PP
t
t
t
1.0
0.7
1.5
1.2
1.0
0.7
1.5
1.2
1.0
0.7
1.5
1.2
r
f
Fall Time
ns
Reset/Recovery Time
ns
RR
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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4
MC10H605, MC100H605
ORDERING INFORMATION
Device
†
Package
Shipping
MC10H605FN
PLCC−28
37 Units / Rail
37 Units / Rail
MC10H605FNG
PLCC−28
(Pb−Free)
MC10H605FNR2
PLCC−28
500 / Tape & Reel
500 / Tape & Reel
MC10H605FNR2G
PLCC−28
(Pb−Free)
MC100H605FN
PLCC−28
37 Units / Rail
37 Units / Rail
MC100H605FNG
PLCC−28
(Pb−Free)
MC100H605FNR2
MC100H605FNR2G
PLCC−28
500 / Tape & Reel
500 / Tape & Reel
PLCC−28
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
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5
MC10H605, MC100H605
PACKAGE DIMENSIONS
28 LEAD PLLC
CASE 776−02
ISSUE F
M
S
S
N
0.007 (0.180)
T L-M
B
Y BRK
D
−N−
M
S
S
N
0.007 (0.180)
T L-M
U
Z
−M−
−L−
W
D
S
S
S
N
0.010 (0.250)
T L-M
X
G1
V
28
1
VIEW D−D
M
S
S
A
0.007 (0.180)
0.007 (0.180)
T L-M
T L-M
N
M
S
S
N
H
0.007 (0.180)
T L-M
Z
M
S
S
N
R
K1
C
E
0.004 (0.100)
K
G
SEATING
PLANE
−T−
J
M
S
S
N
0.007 (0.180)
T L-M
F
VIEW S
G1
VIEW S
S
S
S
N
0.010 (0.250)
T L-M
NOTES:
1. DATUMS -L-, -M-, AND -N- DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS
PLASTIC BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM -T-, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE
MOLD FLASH. ALLOWABLE MOLD FLASH IS
0.010 (0.250) PER SIDE.
INCHES
DIM MIN MAX
MILLIMETERS
MIN
12.32
12.32
4.20
MAX
12.57
12.57
4.57
A
B
C
E
F
0.485
0.485
0.165
0.090
0.013
0.495
0.495
0.180
0.110
0.021
2.29
0.33
2.79
0.53
G
H
J
0.050 BSC
1.27 BSC
4. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
0.026
0.020
0.025
0.450
0.450
0.042
0.042
0.042
---
0.032
---
---
0.66
0.51
0.64
11.43
11.43
1.07
1.07
1.07
---
0.81
---
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN
THE PACKAGE BOTTOM BY UP TO 0.012
(0.300). DIMENSIONS R AND U ARE
DETERMINED AT THE OUTERMOST
EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR
BURRS, GATE BURRS AND INTERLEAD
FLASH, BUT INCLUDING ANY MISMATCH
BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037
(0.940). THE DAMBAR INTRUSION(S) SHALL
NOT CAUSE THE H DIMENSION TO BE
SMALLER THAN 0.025 (0.635).
K
R
U
V
W
X
Y
Z
---
0.456
0.456
0.048
0.048
0.056
0.020
10
11.58
11.58
1.21
1.21
1.42
0.50
10
2
2
_
_
_
_
G1 0.410
K1 0.040
0.430
---
10.42
1.02
10.92
---
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6
MC10H605, MC100H605
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
MECL 10H is a trademark of Motorola, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
MC10H605/D
相关型号：
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IC HEX TTL/CMOS TO PECL TRANSLATOR, COMPLEMENTARY OUTPUT, PQCC28, LEAD FREE, PLASTIC, LCC-28, Level Translator
ONSEMI
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