MC10EL89DTR2G [ONSEMI]
5V ECL Coaxial Cable Driver; 5V ECL同轴电缆驱动器
| 型号： | MC10EL89DTR2G |
| 厂家： | 
ONSEMI |
| 描述： | 5V ECL Coaxial Cable Driver |
| 文件： | 总8页 (文件大小：137K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC10EL89
5VꢀECL Coaxial Cable Driver
The MC10EL89 is a differential fanout gate specifically designed to
drive coaxial cables. The device is especially useful in Digital Video
Broadcasting applications; for this application, since the system is
polarity free, each output can be used as an independent driver. The
driver boasts a gain of approximately 40 and produces output swings
twice as large as a standard ECL output. When driving a coaxial cable,
proper termination is required at both ends of the line to minimize
signal loss. The 1.6 V output swings allow for termination at both ends
of the cable, while maintaining the required 800 mV swing at the
receiving end of the cable. Because of the larger output swings, the
device cannot be terminated into the standard −2.0 V. All of the DC
parameters are tested with a 50 ꢀ to −3.0 V load. The driver accepts a
standard differential ECL input and can run off of the Digital Video
Broadcast standard −5.0 V supply.
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MARKING
DIAGRAMS*
8
SOIC−8
D SUFFIX
CASE 751
HEL89
ALYW
G
8
1
1
1
8
Features
• 375 ps Propagation Delay
• 1.6 V Output Swings
TSSOP−8
DT SUFFIX
CASE 948R
HL89
8
• PECL Mode Operating Range: V = 4.2 V to 5.7 V with V = 0 V
ALYWG
CC
EE
G
• NECL Mode Operating Range: V = 0 V
CC
1
with V = −4.2 V to −5.7 V
EE
• Internal Input Pulldown Resistors
• Pb−Free Packages are Available
DFN8
MN SUFFIX
CASE 506AA
1
4
Q0
Q0
1
2
8
7
V
CC
A
L
Y
W
M
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb−Free Package
D
D
Q1
Q1
3
4
6
5
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
V
EE
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Figure 1. Logic Diagram and Pinout Assignment
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
December, 2006 − Rev. 7
MC10EL89/D
MC10EL89
Table 1. PIN DESCRIPTION
PIN
Function
D, D
ECL Data Inputs
Q0, Q0; Q1, Q1
ECL Data Outputs (1.6 V
Positive Supply
)
pp
V
V
CC
EE
Negative Supply
EP
Exposed pad must be connected to a sufficient thermal conduit.
Electrically connect to the most negative supply or leave floating open.
Table 2. ATTRIBUTES
Characteristics
Value
50 K
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
ꢀ
N/A
Human Body Model
Machine Model
> 2 kV
> 100 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Level 1
UL 94 V−0 @ 0.125 in
31
Flammability Rating
Transistor Count
Oxygen Index: 28 to 34
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Symbol
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
Condition 1
= 0 V
Condition 2
Rating
Unit
V
V
V
V
V
V
8
CC
EE
I
EE
CC
= 0 V
−8
V
PECL Mode Input Voltage
NECL Mode Input Voltage
V
V
= 0 V
= 0 V
V ꢀ V
6
−6
V
V
EE
CC
I
I
CC
EE
V ꢁ V
I
Output Current
Continuous
Surge
50
100
mA
mA
out
T
Operating Temperature Range
−40 to +85
°C
°C
A
T
Storage Temperature Range
−65 to +150
stg
JA
ꢁ
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
SO−8
SO−8
190
130
°C/W
°C/W
ꢁ
ꢁ
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Standard Board
SO−8
41 to 44
°C/W
JC
JA
0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
ꢁ
ꢁ
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Standard Board
TSSOP−8
41 to 44 ± 5%
°C/W
JC
JA
0 lfpm
500 lfpm
DFN8
DFN8
129
84
°C/W
°C/W
T
sol
Wave Solder
Pb <2 to 3 sec @ 248°C
Pb−Free <2 to 3 sec @ 260°C
265
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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2
MC10EL89
Table 4. 10EL SERIES PECL DC CHARACTERISTICS V = 5.0 V; V = 0.0 V (Note 2)
CC
EE
−40°C
25°C
Typ
23
85°C
Typ
23
Min
Typ
23
Max
28
Min
Max
28
Min
Max
28
Symbol
Characteristic
Power Supply Current
Unit
mA
V
I
EE
V
V
V
V
V
Output HIGH Voltage (Note 3)
Output LOW Voltage (Note 3)
3.77
2.10
3770
3050
2.5
3.90
2.28
4.02
2.42
4110
3500
4.6
3.87
2.00
3870
3050
2.5
3.98
2.30
4.10
2.44
4190
3520
4.6
3.94
1.95
3940
3050
2.5
4.04
2.33
4.19
2.49
4280
3555
4.6
OH
OL
V
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
mV
mV
V
IH
IL
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
IHCMR
I
I
Input HIGH Current
Input LOW Current
70
50
150
50
30
150
40
25
150
ꢂ A
ꢂ A
IH
IL
0.5
0.5
0.3
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with V . V can vary +0.25 V / −0.5 V.
CC
EE
3. Outputs are terminated through a 50 ꢀ resistor to V − 3.0 V.
CC
4. V
min varies 1:1 with V . V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential input
IHCMR
EE IHCMR
CC
IHCMR
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V min and 1 V.
PP
Table 5. 10EL SERIES NECL DC CHARACTERISTICS V = 0.0 V; V = −5.0 V (Note 5)
CC
EE
−40°C
25°C
Typ
23
85°C
Typ
23
Min
Typ
Max
Min
Max
Min
Max
Symbol
Characteristic
Power Supply Current
Unit
mA
V
I
23
28
28
28
EE
V
V
V
Output HIGH Voltage (Note 6)
Output LOW Voltage (Note 6)
Input HIGH Voltage (Single−Ended)
−1.23 −1.10 −0.98 −1.13 −1.02 −0.90 −1.06 −0.96 −0.81
−2.90 −2.72 −2.58 −3.00 −2.70 −2.56 −3.05 −2.67 −2.51
OH
OL
IH
V
−123
0
−890 −1130
−810 −106
−720
mV
0
V
V
Input LOW Voltage (Single−Ended)
−195
−150 −195
−148 −195
−144
mV
V
IL
0
0
0
0
0
5
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 7)
−2.5
−0.4
−2.5
−0.4
−2.5
−0.4
IHCMR
I
I
Input HIGH Current
Input LOW Current
70
50
150
50
30
150
20
25
150
ꢂ A
ꢂ A
IH
IL
0.5
0.5
0.3
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with V . V can vary +0.25 V / −0.5 V.
CC
EE
6. Outputs are terminated through a 50 ꢀ resistor to V − 3.0 V.
CC
7. V
min varies 1:1 with V . V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential input
IHCMR
EE IHCMR
CC
IHCMR
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V min and 1 V.
PP
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3
MC10EL89
Table 6. AC CHARACTERISTICS V = 5.0 V; V = 0.0 V or V = 0.0 V; V = −5.0 V (Note 8)
CC
EE
CC
EE
−40°C
25°C
Typ
1.5
85°C
Min
Typ
Max
Min
Max
Min
Typ
Max
Symbol
Characteristic
Unit
Gb/s
ps
f
Maximum Toggle Frequency
max
t
t
Propagation Delay to
Output
200
340
480
20
260
350
440
20
310
400
490
20
PLH
PHL
t
t
Within-Device Skew
5
5
5
5
5
ps
ps
SKEW
Random Clock Jitter (RMS)
Input Swing (Note 9)
5
JITTER
V
150
205
150
205
400
330
150
205
mV
ps
PP
t
t
Output Rise/Fall Times Q
330
455
455
330
455
r
f
(20% − 80%)
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. V can vary +0.25 V / −0.5 V.
EE
PP(min)
9. V
is the minimum input swing for which AC parameters are guaranteed. The device has a DC gain of ≈ 40.
DC BLOCKING CAPACITORS
75
ꢀ
75ꢀ COAX
75ꢀ COAX
0.1ꢂ F
75
ꢀ
ꢀ
EL89
75ꢀ
150ꢀ
150ꢀ
0.1ꢂ F
75
V
EE
Figure 2. EL89 CATV Termination Configuration
Z = 50
ꢀ
ꢀ
Q
Q
D
D
o
Receiver
Device
Driver
Device
Z = 50
o
50
ꢀ
50 ꢀ
V
TT
V
= V − 3.0 V
TT
CC
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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4
MC10EL89
ORDERING INFORMATION
Device
†
Package
Shipping
MC10EL89D
SOIC−8
98 Units / Rail
98 Units / Rail
MC10EL89DG
SOIC−8
(Pb−Free)
MC10EL89DR2
SOIC−8
2500 / Tape & Reel
2500 / Tape & Reel
MC10EL89DR2G
SOIC−8
(Pb−Free)
MC10EL89DT
TSSOP−8
100 Units / Rail
100 Units / Rail
MC10EL89DTG
TSSOP−8
(Pb−Free)
MC10EL89DTR2
TSSOP−8
2500 / Tape & Reel
2500 / Tape & Reel
MC10EL89DTR2G
TSSOP−8
(Pb−Free)
MC10EL89MNR4
MC10EL89MNR4G
DFN8
1000 / Tape & Reel
1000 / Tape & Reel
DFN8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
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5
MC10EL89
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MC10EL89
PACKAGE DIMENSIONS
TSSOP−8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R−02
ISSUE A
8x K REF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
V
0.10 (0.004)
T
U
S
U
0.15 (0.006) T
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
2X L/2
8
5
4
0.25 (0.010)
B
−U−
L
1
M
PIN 1
IDENT
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
S
0.15 (0.006) T
U
A
−V−
F
DETAIL E
MILLIMETERS
INCHES
MIN
DIM MIN
MAX
3.10
3.10
MAX
0.122
0.122
0.043
0.006
0.028
A
B
C
D
F
2.90
2.90
0.80
0.05
0.40
0.114
0.114
C
1.10 0.031
0.15 0.002
0.70 0.016
0.10 (0.004)
−W−
SEATING
D
−T−
G
G
K
L
0.65 BSC
0.026 BSC
PLANE
0.25
0.40 0.010
0.016
4.90 BSC
0.193 BSC
0
DETAIL E
M
0
6
6
_
_
_
_
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7
MC10EL89
PACKAGE DIMENSIONS
DFN8
CASE 506AA−01
ISSUE D
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
PIN ONE
REFERENCE
MILLIMETERS
DIM MIN
MAX
1.00
0.05
E
A
A1
A3
b
0.80
0.00
0.20 REF
0.20
0.30
2 X
D
D2
E
E2
e
K
2.00 BSC
0.10
C
1.10
1.30
2.00 BSC
2 X
0.70
0.90
0.50 BSC
0.10
C
TOP VIEW
0.20
0.25
−−−
0.35
L
A
0.10
0.08
C
C
8 X
(A3)
SIDE VIEW
D2
A1
SEATING
PLANE
C
e
e/2
4
1
8 X L
E2
K
8
5
0.10
0.05
C A
B
8 X b
C
NOTE 3
BOTTOM VIEW
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
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Phone: 81−3−5773−3850
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P.O. Box 5163, Denver, Colorado 80217 USA
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For additional information, please contact your local
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MC10EL89/D
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