MC14028B_06 [ONSEMI]
BCD−To−Decimal Decoder Binary−To−Octal Decoder; BCD到十进制解码器二进制到八进制解码器型号: | MC14028B_06 |
厂家: | ONSEMI |
描述: | BCD−To−Decimal Decoder Binary−To−Octal Decoder |
文件: | 总7页 (文件大小:123K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC14028B
BCD−To−Decimal Decoder
Binary−To−Octal Decoder
The MC14028B decoder is constructed so that an 8421 BCD code
on the four inputs provides a decimal (one−of−ten) decoded output,
while a 3−bit binary input provides a decoded octal (one−of−eight)
code output with D forced to a logic “0”. Expanded decoding such as
binary−to−hexadecimal (one−of−sixteen), etc., can be achieved by
using other MC14028B devices. The part is useful for code
conversion, address decoding, memory selection control,
demultiplexing, or readout decoding.
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MARKING
DIAGRAMS
16
Features
PDIP−16
MC14028BCP
AWLYYWWG
P SUFFIX
CASE 648
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
1
1
• Capable of Driving Two Low−power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range
• Positive Logic Design
16
SOIC−16
D SUFFIX
CASE 751B
14028BG
AWLYWW
• Low Outputs on All Illegal Input Combinations
• Similar to CD4028B
1
1
• Pb−Free Packages are Available*
16
SOEIAJ−16
MAXIMUM RATINGS (Voltages Referenced to V
)
MC14028B
ALYWG
SS
F SUFFIX
CASE 966
1
Parameter
Symbol
Value
Unit
V
1
DC Supply Voltage Range
V
DD
−0.5 to +18.0
Input or Output Voltage Range
(DC or Transient)
V , V
−0.5 to V
+ 0.5
V
in out
DD
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
Input or Output Current (DC or Transient)
per Pin
I , I
in out
10
mA
G
= Pb−Free Package
Power Dissipation per Package (Note 1)
Ambient Temperature Range
P
500
mW
°C
D
T
A
−55 to +125
−65 to +150
260
Storage Temperature Range
T
stg
°C
ORDERING INFORMATION
Lead Temperature (8−Second Soldering)
T
°C
L
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V or V ). Unused outputs must be left open.
SS
DD
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
June, 2006 − Rev. 6
MC14028B/D
MC14028B
PIN ASSIGNMENT
BLOCK DIAGRAM
Q4
Q2
Q0
Q7
Q9
Q5
Q6
1
2
3
4
5
6
7
8
16
V
DD
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
3
10
A
B
C
D
14
2
15 Q3
14 Q1
3−BIT
OCTAL
BINARY
13
INPUTS
15
1
8421
BCD
DECODED
OUTPUTS
13
12
11
10
9
B
DECIMAL
DECODED
OUTPUTS
6
C
INPUTS
12
7
D
4
A
9
11
5
V
SS
Q8
V
V
= PIN 16
= PIN 8
DD
SS
TRUTH TABLE
D C B A Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ORDERING INFORMATION
†
Device
MC14028BCP
Package
Shipping
PDIP−16
25 Units / Rail
48 Units / Rail
MC14028BCPG
PDIP−16
(Pb−Free)
MC14028BD
SOIC−16
MC14028BDG
SOIC−16
(Pb−Free)
MC14028BDR2
SOIC−16
2500 / Tape & Reel
50 Units / Rail
MC14028BDR2G
SOIC−16
(Pb−Free)
MC14028BF
SOEIAJ−16
SOEIAJ−16
MC14028BFEL
MC14028BFELG
2000 / Tape & Reel
SOEIAJ−16
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
MC14028B
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
− 55_C
25_C
125_C
V
DD
Typ
(Note 2)
Min
Max
Min
Max
Min
Max
Vdc
Characteristic
Output Voltage
Symbol
Unit
“0” Level
“1” Level
5.0
10
15
−
−
−
0.05
0.05
0.05
−
−
−
0
0
0
0.05
0.05
0.05
−
−
−
0.05
0.05
0.05
Vdc
V
in
= V or 0
V
OL
DD
5.0
10
15
4.95
9.95
14.95
−
−
−
4.95
9.95
14.95
5.0
10
15
−
−
−
4.95
9.95
14.95
−
−
−
Vdc
Vdc
V
in
= 0 or V
DD
V
OH
Input Voltage
(V = 4.5 or 0.5 Vdc)
“0” Level
“1” Level
5.0
10
15
−
−
−
1.5
3.0
4.0
−
−
−
2.25
4.50
6.75
1.5
3.0
4.0
−
−
−
1.5
3.0
4.0
O
V
IL
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
Vdc
(V = 0.5 or 4.5 Vdc)
O
5.0
10
15
3.5
7.0
11
−
−
−
3.5
7.0
11
2.75
5.50
8.25
−
−
−
3.5
7.0
11
−
−
−
V
IH
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
mAdc
(V = 2.5 Vdc)
Source
Sink
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
−
−
−
−
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
−
−
−
– 1.7
– 0.36
– 0.9
– 2.4
−
−
−
−
OH
(V = 4.6 Vdc)
I
OH
OH
(V = 9.5 Vdc)
OH
(V = 13.5 Vdc)
OH
15
(V = 0.4 Vdc)
OL
5.0
10
15
0.64
1.6
4.2
−
−
−
0.51
1.3
3.4
0.88
2.25
8.8
−
−
−
0.36
0.9
2.4
−
−
−
mAdc
(V = 0.5 Vdc)
OL
I
OL
(V = 1.5 Vdc)
OL
Input Current
I
15
−
−
−
0.1
−
−
−
0.00001
5.0
0.1
7.5
−
−
1.0
−
mAdc
pF
in
Input Capacitance (V = 0)
C
in
in
Quiescent Current (Per Package)
I
5.0
10
15
−
−
−
5.0
10
20
−
−
−
0.005
0.010
0.015
5.0
10
20
−
−
−
150
300
600
mAdc
DD
Total Supply Current (Note 3, 4)
(Dynamic plus Quiescent,
Per Package)
I
T
5.0
10
15
I = (0.3 mA/kHz) f + I
mAdc
T
DD
DD
DD
I = (0.6 mA/kHz) f + I
T
I = (0.9 mA/kHz) f + I
T
(C = 50 pF on all outputs, all
L
buffers switching)
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. The formulas given are for the typical characteristics only at 25_C.
4. To calculate total supply current at loads other than 50 pF: I (C ) = I (50 pF) + (C – 50) Vfk where: I is in mA (per package), C in pF,
T
L
T
L
T
L
V = (V – V ) in volts, f in kHz is input frequency, and k = 0.001.
DD
SS
SWITCHING CHARACTERISTICS (Note 5) (C = 50 pF, T = 25_C)
L
A
Typ
(Note 6)
Characteristic
Output Rise and Fall Time
Symbol
V
DD
Min
Max
Unit
t
,
ns
TLH
t
t
t
, t
= (1.5 ns/pF) C + 25 ns
t
5.0
10
15
−
−
−
100
50
40
200
100
80
TLH THL
L
THL
, t
= (0.75 ns/pF) C + 12.5 ns
TLH THL
L
, t
= (0.55 ns/pF) C + 9.5 ns
TLH THL
L
Propagation Delay Time
t
t
,
ns
PLH
t
t
t
, t
= (1.7 ns/pF) C + 215 ns
= (0.66 ns/pF) C + 97 ns
= (0.5 ns/pF) C + 65 ns
L
5.0
10
15
−
−
−
300
130
90
600
260
180
PLH PHL
L
PHL
, t
PLH PHL
L
, t
PLH PHL
5. The formulas given are for the typical characteristics only at 25_C.
6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
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3
MC14028B
20 ns
INPUT A
20 ns
V
V
DD
90%
Inputs B, C, and D switching
in respect to a BCD code.
All outputs connected to respective
C loads. f in respect to a system clock.
L
50%
10%
SS
1/f
20 ns
90%
20 ns
V
V
DD
INPUT C
50%
10%
SS
Inputs A, B, and D low.
t
t
PHL
PLH
V
V
OH
90%
50%
t
Q4
10%
OL
t
TLH
THL
Figure 1. Dynamic Signal Waveforms
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
A
B
C
D
LOGIC DIAGRAM
INPUTS
APPLICATIONS INFORMATION
D
D
C
B
A
A
Expanded decoding can be performed by using the
MC14028B and other CMOS Integrated Circuits. The
circuit in Figure 2 converts any 4−bit code to a decimal or
hexadecimal code. The accompanying table shows the input
binary combinations, the associated “output numbers” that
go “high” when selected, and the “redefined output
numbers” needed for the proper code. For example: For the
combination DCBA = 0111 the output number 7 is redefined
for the 4−bit binary, 4−bit gray, excess−3, or excess−3 gray
codes as 7, 5, 4, or 2, respectively. Figure 3 shows a 6−bit
binary 1−of−64 decoder using nine MC14028B circuits and
two MC14069UB inverters.
D
C
B
A
C
B
MC14028B
MC14028B
Q9
Q0
Q9
Q0
15
−ꢀ8
15
−ꢀ0
OUTPUT NUMBERS
Figure 2. Code Conversion Circuit and Truth Table
The MC14028B can be used in decimal digit displays,
such as, neon readouts or incandescent projection indicators
as shown in Figure 4.
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4
MC14028B
Code and Redefined
Output Numbers
Hexadecimal
Decimal
Inputs
Output Numbers
D
C
B
A
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
1
2
3
0
1
3
2
0
1
2
3
0
1
2
0
3
0
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
5
6
7
7
6
4
5
1
2
3
4
4
4
3
4
1
2
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
9
15
14
5
6
7
8
5
6
10 12
11 13
9
5
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
13
14 11
15 10
8
9
9
5
6
8
7
6
7
8
9
7
8
9
INPUTS
A
B
C
D
E
B
F
INHIBIT
−ꢀD
(NO SELECTION)
A
C
MC14028B
Q0
Q9
A
B
MC14028B
C
D
A
B
MC14028B
C
D
A
B
C
MC14028B
D
A
B
C
MC14028B
D
A
B
C
MC14028B
D
A
B
MC14028B
C
D
A
B
C
MC14028B
D
A B C D
MC14028B
Q9
Q0
0
Q9 Q0 Q9 Q0
Q9 Q0
Q9 Q0
Q9 Q0
Q9 Q0
Q9 Q0
7
8
15
16
23
24
31
32
39
40
47
48
55
56
63
*1/6 MC14069UB
64 OUTPUTS (SELECTED OUTPUT IS HIGH)
Figure 3. Six−Bit Binary 1−of−64 Decoder
APPROPRIATE
VOLTAGE
APPROPRIATE
VOLTAGE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
A
B
C
D
NEON
INCANDESCENT
DISPLAY
DISPLAY
OR
MC14028B
0
9
9
2
1
0
Figure 4. Decimal Digit Display Application
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5
MC14028B
PACKAGE DIMENSIONS
PDIP−16
CASE 648−08
ISSUE T
NOTES:
−A−
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
16
1
9
8
B
S
5. ROUNDED CORNERS OPTIONAL.
INCHES
DIM MIN MAX
0.740 0.770 18.80 19.55
MILLIMETERS
F
C
L
MIN MAX
A
B
C
D
F
0.250 0.270
0.145 0.175
0.015 0.021
6.35
3.69
0.39
1.02
6.85
4.44
0.53
1.77
SEATING
PLANE
−T−
0.040
0.70
G
H
J
K
L
0.100 BSC
2.54 BSC
1.27 BSC
K
M
H
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
J
0.21
0.38
3.30
7.74
10
G
2.80
7.50
0
D 16 PL
M
M
0.25 (0.010)
T A
M
S
0
10
_
_
_
_
0.020 0.040
0.51
1.01
SOIC−16
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
16
9
8
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
MILLIMETERS
INCHES
MIN
G
DIM MIN
MAX
10.00
4.00
1.75
0.49
1.25
MAX
0.393
0.157
0.068
0.019
0.049
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
0.386
0.150
0.054
0.014
0.016
F
R X 45
K
_
G
J
1.27 BSC
0.050 BSC
C
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
−T−
SEATING
PLANE
K
M
P
R
J
_
_
_
_
M
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
D
16 PL
M
S
S
0.25 (0.010)
T B
A
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6
MC14028B
PACKAGE DIMENSIONS
SOEIAJ−16
CASE 966−01
ISSUE A
NOTES:
ꢁꢂ1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
L
E
16
9
ꢁꢂ2. CONTROLLING DIMENSION: MILLIMETER.
ꢁꢂ3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
Q
1
H
E
M
_
E
ꢁꢂ4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
1
8
L
ꢁꢂ5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
e
A
c
MILLIMETERS
INCHES
MIN
−−−
DIM MIN
MAX
MAX
0.081
0.008
0.020
0.011
0.413
0.215
A
−−−
0.05
0.35
0.10
9.90
5.10
2.05
A
A
1
0.20 0.002
0.50 0.014
0.20 0.007
1
b
0.13 (0.005)
b
c
0.10 (0.004)
M
D
E
10.50
5.45 0.201
0.390
e
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
0
10
0.90 0.028
10
_
0.035
0.031
M
Q
0
_
_
_
0.70
−−−
1
Z
0.78
−−−
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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