MC14106BD [ONSEMI]
Hex Schmitt Trigger; 六角施密特触发器
| 型号： | MC14106BD |
| 厂家： | 
ONSEMI |
| 描述： | Hex Schmitt Trigger |
| 文件： | 总8页 (文件大小：185K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
The MC14106B hex Schmitt Trigger is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. These devices find primary use where low power
dissipation and/or high noise immunity is desired. The MC14106B
may be used in place of the MC14069UB hex inverter for enhanced
noise immunity or to “square up” slowly changing waveforms.
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• Increased Hysteresis Voltage Over the MC14584B
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
MARKING
DIAGRAMS
14
PDIP–14
P SUFFIX
CASE 646
MC14106BCP
AWLYYWW
• Pin–for–Pin Replacement for CD40106B and MM74C14
• Can Be Used to Replace the MC14584B or MC14069UB
1
14
SOIC–14
D SUFFIX
CASE 751A
14106B
AWLYWW
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 1.)
SS
1
Symbol
Parameter
Value
Unit
V
14
V
DD
DC Supply Voltage Range
–0.5 to +18.0
TSSOP–14
DT SUFFIX
CASE 948G
14
106B
ALYW
V , V
in out
Input or Output Voltage Range
(DC or Transient)
–0.5 to V + 0.5
V
DD
I , I
in out
Input or Output Current
(DC or Transient) per Pin
±10
mA
1
A
= Assembly Location
P
D
Power Dissipation,
per Package (Note 2.)
500
mW
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
T
Ambient Temperature Range
Storage Temperature Range
–55 to +125
–65 to +150
260
°C
°C
°C
A
T
stg
T
Lead Temperature
(8–Second Soldering)
ORDERING INFORMATION
L
Device
Package
PDIP–14
SOIC–14
Shipping
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating:
MC14106BCP
MC14106BD
2000/Box
55/Rail
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
MC14106BDR2
MC14106BDT
SOIC–14 2500/Tape & Reel
96/Rail
TSSOP–14
high–impedancecircuit. For proper operation, V and V should be constrained
in
out
MC14106BDTR2 TSSOP–14 2500/Tape & Reel
to the range V
(V or V
)
V
DD
.
SS
in
out
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V or V ). Unused outputs must be left open.
SS
DD
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
March, 2000 – Rev. 3
MC14106B/D
MC14106B
LOGIC DIAGRAM
1
3
2
4
5
6
9
8
11
13
10
12
V
V
= PIN 14
= PIN 7
DD
SS
EQUIVALENT CIRCUIT SCHEMATIC
(1/6 OF CIRCUIT SHOWN)
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2
MC14106B
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
125 C
V
Vdc
DD
(3.)
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Typ
Max
Min
Max
“0” Level
“1” Level
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V
DD
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
V
in
= 0
(6.)
Hysteresis Voltage
V
H
5.0
10
15
0.3
1.2
1.6
2.0
3.4
5.0
0.3
1.2
1.6
1.1
1.7
2.1
2.0
3.4
5.0
0.3
1.2
1.6
2.0
3.4
5.0
Threshold Voltage
Positive–Going
V
V
5.0
10
15
2.2
4.6
6.8
3.6
7.1
10.8
2.2
4.6
6.8
2.9
5.9
8.8
3.6
7.1
10.8
2.2
4.6
6.8
3.6
7.1
10.8
Vdc
Vdc
T+
5.0
10
15
0.9
2.5
4.0
2.8
5.2
7.4
0.9
2.5
4.0
1.9
3.9
5.8
2.8
5.2
7.4
0.9
2.5
4.0
2.8
5.2
7.4
Negative–Going
T–
Output Drive Current
I
mAdc
OH
(V = 2.5 Vdc)
Source
Sink
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
OH
(V = 4.6 Vdc)
OH
(V = 9.5 Vdc)
OH
(V = 13.5 Vdc)
OH
15
(V = 0.4 Vdc)
I
OL
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
(V = 0.5 Vdc)
OL
(V = 1.5 Vdc)
OL
Input Current
Input Capacitance
I
15
—
—
—
± 0.1
—
—
±0.00001
± 0.1
—
—
± 1.0
µAdc
in
C
—
5.0
7.5
—
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
—
—
—
0.25
0.5
1.0
—
—
—
0.0005
0.0010
0.0015
0.25
0.5
1.0
—
—
—
7.5
15
30
µAdc
µAdc
DD
(4.) (5.)
Total Supply Current
I
T
5.0
10
15
I
T
I
T
I
T
= (1.8 µA/kHz) f + I
= (3.6 µA/kHz) f + I
= (5.4 µA/kHz) f + I
DD
DD
DD
(Dynamic plus Quiescent,
Per Package)
(C = 50 pF on all outputs, all
L
buffers switching)
3. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
4. The formulas given are for the typical characteristics only at 25 C.
5. To calculate total supply current at loads other than 50 pF:
I (C ) = I (50 pF) + (C – 50) Vfk
T
L
T
L
where I is in µA (per package), C in pF, V = (V – V ) in volts, f in kHz is input frequency, and k = 0.001.
T
L
DD
SS
=
6. V
V
T+
– V (But maximum variation of V is specified as less that V
– V
).
T– min
H
T–
H
T+ max
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3
MC14106B
SWITCHING CHARACTERISTICS (C = 50 pF, T = 25 C)
L
A
V
Vdc
DD
(7.)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Rise Time
Output Fall Time
t
5.0
10
15
—
—
—
100
50
40
200
100
80
ns
TLH
t
5.0
10
15
—
—
—
100
50
40
200
100
80
ns
ns
THL
Propagation Delay Time
t
, t
5.0
10
15
—
—
—
125
50
40
250
100
80
PLH PHL
7. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
20 ns
20 ns
V
DD
14
V
DD
INPUT
90%
50%
10%
OUTPUT
PULSE
GENERATOR
INPUT
V
SS
t
t
PLH
C
L
PHL
7
V
SS
V
OH
90%
50%
OUTPUT
10%
V
OL
t
f
t
r
Figure 1. Switching Time Test Circuit and Waveforms
V
DD
0
0
V
T–
V
T+
V
DD
V
H
V , INPUT VOLTAGE (Vdc)
in
Figure 2. Typical Transfer Characteristics
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4
MC14106B
APPLICATIONS
V
out
V
in
V
DD
V
DD
V
H
V
H
V
in
V
in
V
SS
V
SS
V
DD
V
DD
V
out
V
out
V
SS
V
SS
(a) Schmitt Triggers will square up
inputs with slow rise and fall times.
(b) A Schmitt trigger offers maximum
noise immunity in gate applications.
Figure 3.
V
DD
V
DD
R
C
tw
tw
Rs
Rs
V
out
V
out
C
R
V
DD
tw = RC IN
V
T+
Useful as Pushbutton/Keyboard Debounce Circuit.
Figure 4. Monostable Multivibrator
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5
MC14106B
1
f
R
A
V
in
V
out
t1
R
C
t2
V
DD
V
in
V
T+
V
SS
C
V
T
V
DD
*t
RCln
RCln
1
V
–
T
V
T+
A
– V
V
–
T
DD
V
SS
*t
2
V
– V
T
DD
V
V
V
DD
– V
T
–
T
DD
1
f
RCln
V
V
out
T+
V
V
– V
T
T–
DD
V
SS
*t + t
t
+ t
1
2
PHL PLH
Useful in discriminating against short pulse durations.
Figure 5. Astable Multivibrator
Figure 6. Integrator
C
V
in
V
in
R
+EDGE
–EDGE
C
C
C
–EDGE
+EDGE
V
in
V
DD
R
R
R
tw
V
DD
tw = RC ln
Useful as an edge detector circuit.
V
T+
Figure 7. Differentiator
Figure 8. Positive Edge Time Delay Circuit
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6
MC14106B
PACKAGE DIMENSIONS
P SUFFIX
PLASTIC DIP PACKAGE
CASE 646–06
ISSUE M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
1
8
7
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
B
INCHES
DIM MIN MAX
0.770 18.16
MILLIMETERS
A
F
MIN
MAX
18.80
6.60
4.69
0.53
1.78
A
B
C
D
F
0.715
0.240
0.145
0.015
0.040
0.260
0.185
0.021
0.070
6.10
3.69
0.38
1.02
L
N
C
G
H
J
K
L
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.290
–––
0.095
0.015
0.135
0.310
10
1.32
0.20
2.92
7.37
–––
2.41
0.38
3.43
7.87
10
–T–
SEATING
PLANE
J
K
M
N
0.015
0.039
0.38
1.01
D 14 PL
H
G
M
M
0.13 (0.005)
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
–A–
14
1
8
7
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
–B–
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
P 7 PL
M
M
0.25 (0.010)
B
MILLIMETERS
DIM MIN MAX
INCHES
G
MIN
MAX
0.344
0.157
0.068
0.019
0.049
F
R X 45
C
A
B
C
D
F
8.55
3.80
1.35
0.35
0.40
8.75 0.337
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
–T–
SEATING
PLANE
J
M
G
J
K
M
P
1.27 BSC
0.050 BSC
K
D 14 PL
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
M
S
S
0.25 (0.010)
T B
A
7
0
5.80
0.25
6.20 0.228
0.50 0.010
0.244
0.019
R
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7
MC14106B
PACKAGE DIMENSIONS
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948G–01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
14X K REF
M
S
S
Y14.5M, 1982.
0.10 (0.004)
T U
V
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT
EXCEED
S
0.15 (0.006) T U
N
0.25 (0.010)
14
8
2X L/2
M
B
–U–
0.25 (0.010) PER SIDE.
L
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
N
PIN 1
IDENT.
F
7
1
DETAIL E
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE –W–.
S
K
0.15 (0.006) T U
A
MILLIMETERS
MAX
INCHES
K1
DIM MIN
MIN
5.10 0.193
4.50 0.169
–––
0.15 0.002
0.75 0.020
MAX
0.200
0.177
0.047
0.006
0.030
–V–
A
B
C
4.90
4.30
–––
J J1
1.20
D
F
0.05
0.50
SECTION N–N
G
H
J
J1
K
K1
L
0.65 BSC
0.026 BSC
0.50
0.09
0.09
0.19
0.19
0.60 0.020
0.20 0.004
0.16 0.004
0.30 0.007
0.25 0.007
0.024
0.008
0.006
0.012
0.010
–W–
C
6.40 BSC
0.252 BSC
0.10 (0.004)
M
0
8
0
8
SEATING
PLANE
–T–
H
G
DETAIL E
D
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MC14106B/D
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