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MC14585BDR2G [ONSEMI]

4−Bit Magnitude Comparator; 4位数值比较器
MC14585BDR2G
型号： MC14585BDR2G
厂家： ONSEMI    ONSEMI
描述：

4−Bit Magnitude Comparator
4位数值比较器

比较器 运算电路 逻辑集成电路 光电二极管
文件： 总7页 (文件大小：104K)
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MC14585B  
4−Bit Magnitude Comparator  
The MC14585B 4−Bit Magnitude Comparator is constructed with  
complementary MOS (CMOS) enhancement mode devices. The circuit  
has eight comparing inputs (A3, B3, A2, B2, A1, B1, A0, B0), three  
cascading inputs (A < B, A = B, and A > B), and three outputs (A < B,  
A = B, and A > B). This device compares two 4−bit words (A and B)  
and determines whether they are “less than”, “equal to”, or “greater  
than” by a high level on the appropriate output. For words greater than  
4−bits, units can be cascaded by connecting outputs (A > B), (A < B),  
and (A = B) to the corresponding inputs of the next significant  
comparator. Inputs (A < B), (A = B), and (A > B) on the least significant  
(first) comparator are connected to a low, a high, and a low, respectively.  
Applications include logic in CPU’s, correction and/or detection of  
instrumentation conditions, comparator in testers, converters, and  
controls.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
PDIP−16  
MC14585BCP  
AWLYYWWG  
P SUFFIX  
CASE 648  
1
1
Features  
16  
SOIC−16  
D SUFFIX  
CASE 751B  
• Diode Protection on All Inputs  
• Expandable  
14585BG  
AWLYWW  
1
1
• Applicable to Binary or 8421−BCD Code  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• Capable of Driving Two Low−Power TTL Loads or One Low−Power  
Schottky TTL Load over the Rated Temperature Range  
• Can be Cascaded − See Figure 3  
• Pb−Free Packages are Available*  
16  
SOEIAJ−16  
F SUFFIX  
CASE 966  
MC14585B  
ALYWG  
1
1
A
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
WW, W = Work Week  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Parameter  
Symbol  
Value  
Unit  
V
DC Supply Voltage Range  
V
DD  
−0.5 to +18.0  
G
= Pb−Free Package  
Input or Output Voltage Range  
(DC or Transient)  
V , V  
in out  
−0.5 to V  
+ 0.5  
V
DD  
ORDERING INFORMATION  
Input or Output Current (DC or Transient)  
per Pin  
I , I  
in out  
10  
mA  
†
Device  
Package  
Shipping  
Power Dissipation per Package (Note 1)  
Ambient Temperature Range  
P
500  
mW  
°C  
D
MC14585BCP  
PDIP−16  
25 Units / Rail  
25 Units / Rail  
T
A
−55 to +125  
−65 to +150  
260  
MC14585BCPG  
PDIP−16  
(Pb−Free)  
Storage Temperature Range  
T
stg  
°C  
Lead Temperature (8−Second Soldering)  
T
°C  
MC14585BD  
SOIC−16  
48 Units / Rail  
48 Units / Rail  
L
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating: Plastic “P and D/DW”  
MC14585BDG  
SOIC−16  
(Pb−Free)  
MC14585BDR2  
SOIC−16 2500/Tape & Reel  
Packages: – 7.0 mW/_C From 65_C To 125_C  
MC14585BDR2G SOIC−16  
(Pb−Free)  
2500/Tape & Reel  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
MC14585BFEL  
SOEIAJ−16 2000/Tape & Reel  
high−impedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
MC14585BFELG SOEIAJ−16 2000/Tape & Reel  
(Pb−Free)  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
June, 2006 − Rev. 6  
MC14585B/D  
 
MC14585B  
PIN ASSIGNMENT  
BLOCK DIAGRAM  
B2  
A2  
1
2
3
4
5
6
7
8
16  
V
DD  
(Aꢀ>ꢀB)  
4
6
in  
15 A3  
(Aꢀ=ꢀB)  
(Aꢀ<ꢀB)  
A0  
in  
in  
(Aꢀ>ꢀB)  
(Aꢀ ꢀB)  
(Aꢀ ꢀB)  
13  
3
5
(A = B)  
14 B3  
out  
out  
out  
out  
10  
11  
7
(A u B)  
13 (A u B)  
12 (A t B)  
11 B0  
in  
in  
in  
out  
B0  
(A t B)  
(A = B)  
out  
A1  
B1  
9
A2  
2
A1  
10 A0  
B2  
12  
1
V
SS  
9
B1  
A3  
15  
14  
B3  
V
DD  
= PIN 16  
V
SS  
= PIN 8  
TRUTH TABLE (x = Don’t Care)  
Inputs  
Comparing  
A2, B2 A1, B1  
Cascading  
Outputs  
A3, B3  
A0, B0 A < B A = B A > B A < B A = B A > B  
A3 > B3  
A3 = B3 A2 > B2  
A3 = B3 A2 = B2 A1 > B1  
A3 = B3 A2 = B2 A1 = B1 A0 > B0  
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
0
0
0
0
0
0
1
1
1
1
A3 = B3 A2 = B2 A1 = B1 A0 = B0  
A3 = B3 A2 = B2 A1 = B1 A0 = B0  
A3 = B3 A2 = B2 A1 = B1 A0 = B0  
A3 = B3 A2 = B2 A1 = B1 A0 = B0  
0
0
1
1
0
1
0
1
x
x
x
x
0
0
1
1
0
1
0
1
1
0
0
0
A3 = B3 A2 = B2 A1 = B1 A0 < B0  
x
x
x
x
x
x
x
x
x
1
1
1
0
0
0
0
0
0
A3 = B3 A2 = B2 A1 < B1  
x
x
A3 = B3 A2 < B2  
A3 < B3  
x
x
x
x
x
x
x
1
0
0
http://onsemi.com  
2
MC14585B  
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V  
)
SS  
– 55_C  
25_C  
Typ  
125_C  
V
Vdc  
DD  
(Note 2)  
Min  
Max  
Min  
Max  
Min  
Max  
Characteristic  
Output Voltage  
Symbol  
Unit  
“0” Level  
“1” Level  
“0” Level  
V
OL  
5.0  
10  
15  
−
−
−
0.05  
0.05  
0.05  
−
−
−
0
0
0
0.05  
0.05  
0.05  
−
−
−
0.05  
0.05  
0.05  
Vdc  
V
in  
= V or 0  
DD  
V
OH  
5.0  
10  
15  
4.95  
9.95  
14.95  
−
−
−
4.95  
9.95  
14.95  
5.0  
10  
15  
−
−
−
4.95  
9.95  
14.95  
−
−
−
Vdc  
Vdc  
V
in  
= 0 or V  
DD  
Input Voltage  
(V = 4.5 or 0.5 Vdc)  
V
IL  
5.0  
10  
15  
−
−
−
1.5  
3.0  
4.0  
−
−
−
2.25  
4.50  
6.75  
1.5  
3.0  
4.0  
−
−
−
1.5  
3.0  
4.0  
O
(V = 9.0 or 1.0 Vdc)  
O
(V = 13.5 or 1.5 Vdc)  
O
“1” Level  
V
IH  
Vdc  
(V = 0.5 or 4.5 Vdc)  
5.0  
10  
15  
3.5  
7.0  
11  
−
−
−
3.5  
7.0  
11  
2.75  
5.50  
8.25  
−
−
−
3.5  
7.0  
11  
−
−
−
O
(V = 1.0 or 9.0 Vdc)  
O
(V = 1.5 or 13.5 Vdc)  
O
Output Drive Current  
I
mAdc  
OH  
(V = 2.5 Vdc)  
Source  
Sink  
5.0  
5.0  
10  
– 3.0  
– 0.64  
– 1.6  
– 4.2  
−
−
−
−
– 2.4  
– 0.51  
– 1.3  
– 3.4  
– 4.2  
– 0.88  
– 2.25  
– 8.8  
−
−
−
−
– 1.7  
– 0.36  
– 0.9  
– 2.4  
−
−
−
−
OH  
(V = 4.6 Vdc)  
OH  
(V = 9.5 Vdc)  
OH  
(V = 13.5 Vdc)  
OH  
15  
(V = 0.4 Vdc)  
I
5.0  
10  
15  
0.64  
1.6  
4.2  
−
−
−
0.51  
1.3  
3.4  
0.88  
2.25  
8.8  
−
−
−
0.36  
0.9  
2.4  
−
−
−
mAdc  
OL  
OL  
(V = 0.5 Vdc)  
OL  
(V = 1.5 Vdc)  
OL  
Input Current  
Input Capacitance (V = 0)  
I
15  
−
−
−
0.1  
−
−
−
0.00001  
5.0  
0.1  
7.5  
−
−
1.0  
−
mAdc  
pF  
in  
C
in  
in  
Quiescent Current (Per Package)  
I
5.0  
10  
15  
−
−
−
5.0  
10  
20  
−
−
−
0.005  
0.010  
0.015  
5.0  
10  
20  
−
−
−
150  
300  
600  
mAdc  
DD  
Total Supply Current (Notes 3, 4)  
(Dynamic plus Quiescent,  
Per Package)  
I
T
5.0  
10  
15  
I = (0.6 mA/kHz) f + I  
mAdc  
T
DD  
DD  
DD  
I = (1.2 mA/kHz) f + I  
T
I = (1.8 mA/kHz) f + I  
T
(C = 50 pF on all outputs, all  
L
buffers switching)  
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.  
3. The formulas given are for the typical characteristics only at 25_C.  
4. To calculate total supply current at loads other than 50 pF: I (C ) = I (50 pF) + (C – 50) Vfk where: I is in mA (per package), C in pF,  
T
L
T
L
T
L
V = (V – V ) in volts, f in kHz is input frequency, and k = 0.001.  
DD  
SS  
SWITCHING CHARACTERISTICS (Note 5) (C = 50 pF, T = 25_C)  
L
A
Typ  
(Note 6)  
Characteristic  
Output Rise and Fall Time  
Symbol  
V
DD  
Min  
Max  
Unit  
t
,
ns  
TLH  
t
t
t
, t  
= (1.5 ns/pF) C + 25 ns  
t
5.0  
10  
15  
−
−
−
100  
50  
40  
200  
100  
80  
TLH THL  
L
THL  
, t  
= (0.75 ns/pF) C + 12.5 ns  
TLH THL  
L
, t  
= (0.55 ns/pF) C + 9.5 ns  
TLH THL  
L
Turn−On, Turn−Off Delay Time  
t
t
,
ns  
PLH  
t
t
t
, t  
= (1.7 ns/pF) C + 345 ns  
5.0  
10  
15  
−
−
−
430  
180  
130  
860  
360  
260  
PLH PHL  
L
PHL  
, t  
= (0.66 ns/pF) C + 147 ns  
PLH PHL  
L
, t  
= (0.5 ns/pF) C + 105 ns  
L
PLH PHL  
5. The formulas given are for the typical characteristics only at 25_C.  
6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.  
http://onsemi.com  
3
 
                                              
                                                
MC14585B  
20 ns  
20 ns  
A3  
V
DD  
V
V
SS  
1
2f  
DD  
B3  
V
V
SS  
20 ns  
20 ns  
OH  
V
DD  
(Aꢀ>ꢀB)  
out  
90%  
50%  
10%  
V
V
OL  
B0  
V
V
OH  
SS  
t
t
PHL  
PLH  
(Aꢀ=ꢀB)  
out  
out  
V
V
OL  
OH  
90%  
50%  
10%  
OH  
(Aꢀ ꢀB)  
out  
(Aꢀ<ꢀB)  
V
OL  
V
OL  
t
t
THL  
TLH  
Inputs (A>B) and (A=B) high, and inputs B2, A2, B1,  
A1, B0, A0 and (A<B) low.  
f in respect to a system clock.  
Inputs (A>B) and (A=B) high, and inputs B3, A3, B2,  
A2, B1, A1, A0, and (A<B) low.  
Figure 1. Dynamic Power Dissipation  
Signal Waveforms  
Figure 2. Dynamic Signal Waveforms  
WORD  
B = B11  
WORD  
A =  
B10  
B9  
B8  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
A11  
A10  
A9  
A8  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
V
V
V
SS DD SS  
B3 A3 B2 A2 B1 A1 B0 A0  
OUTPUT  
MC14585B  
INPUTS  
MC14585B  
MC14585B  
...  
WORD B = B11, B10, , B0.  
...  
WORD A = A11, A10, , A0.  
OUTPUTS  
Figure 3. Cascading Comparators  
http://onsemi.com  
4
MC14585B  
LOGIC DIAGRAM  
15  
A3  
14  
2
B3  
A2  
1
7
B2  
A1  
12  
(Aꢀ<ꢀB)  
out  
9
B1  
A0  
10  
11  
5
B0  
(Aꢀ<ꢀB)  
in  
3
(Aꢀ=ꢀB)  
(Aꢀ>ꢀB)  
out  
out  
6
in  
(Aꢀ=ꢀB)  
(Aꢀ>ꢀB)  
13  
4
in  
http://onsemi.com  
5
MC14585B  
PACKAGE DIMENSIONS  
PDIP−16  
CASE 648−08  
ISSUE T  
NOTES:  
−A−  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEADS  
WHEN FORMED PARALLEL.  
4. DIMENSION B DOES NOT INCLUDE  
MOLD FLASH.  
16  
1
9
8
B
S
5. ROUNDED CORNERS OPTIONAL.  
INCHES  
DIM MIN MAX  
0.740 0.770 18.80 19.55  
MILLIMETERS  
F
C
L
MIN MAX  
A
B
C
D
F
0.250 0.270  
0.145 0.175  
0.015 0.021  
6.35  
3.69  
0.39  
1.02  
6.85  
4.44  
0.53  
1.77  
SEATING  
PLANE  
−T−  
0.040  
0.70  
G
H
J
K
L
0.100 BSC  
2.54 BSC  
1.27 BSC  
K
M
H
0.050 BSC  
0.008 0.015  
0.110 0.130  
0.295 0.305  
J
0.21  
0.38  
3.30  
7.74  
10  
G
2.80  
7.50  
0
D 16 PL  
M
M
0.25 (0.010)  
T A  
M
S
0
10  
_
_
_
_
0.020 0.040  
0.51  
1.01  
SOIC−16  
CASE 751B−05  
ISSUE J  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
−A−  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 (0.005) TOTAL  
IN EXCESS OF THE D DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
16  
9
8
−B−  
P 8 PL  
M
S
B
0.25 (0.010)  
1
MILLIMETERS  
INCHES  
MIN  
G
DIM MIN  
MAX  
10.00  
4.00  
1.75  
0.49  
1.25  
MAX  
0.393  
0.157  
0.068  
0.019  
0.049  
A
B
C
D
F
9.80  
3.80  
1.35  
0.35  
0.40  
0.386  
0.150  
0.054  
0.014  
0.016  
F
R X 45  
K
_
G
J
1.27 BSC  
0.050 BSC  
C
0.19  
0.10  
0
0.25  
0.25  
7
0.008  
0.004  
0
0.009  
0.009  
7
−T−  
SEATING  
PLANE  
K
M
P
R
J
_
_
_
_
M
5.80  
0.25  
6.20  
0.50  
0.229  
0.010  
0.244  
0.019  
D
16 PL  
M
S
S
0.25 (0.010)  
T B  
A
http://onsemi.com  
6
MC14585B  
PACKAGE DIMENSIONS  
SOEIAJ−16  
CASE 966−01  
ISSUE A  
NOTES:  
ꢁꢂ1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
L
E
16  
9
ꢁꢂ2. CONTROLLING DIMENSION: MILLIMETER.  
ꢁꢂ3. DIMENSIONS D AND E DO NOT INCLUDE  
MOLD FLASH OR PROTRUSIONS AND ARE  
MEASURED AT THE PARTING LINE. MOLD FLASH  
OR PROTRUSIONS SHALL NOT EXCEED 0.15  
(0.006) PER SIDE.  
Q
1
H
E
M
_
E
ꢁꢂ4. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
1
8
L
ꢁꢂ5. THE LEAD WIDTH DIMENSION (b) DOES NOT  
INCLUDE DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)  
TOTAL IN EXCESS OF THE LEAD WIDTH  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE  
BETWEEN PROTRUSIONS AND ADJACENT LEAD  
TO BE 0.46 ( 0.018).  
DETAIL P  
Z
D
VIEW P  
e
A
c
MILLIMETERS  
INCHES  
MIN  
−−−  
DIM MIN  
MAX  
MAX  
0.081  
0.008  
0.020  
0.011  
0.413  
0.215  
A
−−−  
0.05  
0.35  
0.10  
9.90  
5.10  
2.05  
A
A
1
0.20 0.002  
0.50 0.014  
0.20 0.007  
1
b
0.13 (0.005)  
b
c
0.10 (0.004)  
M
D
E
10.50  
5.45 0.201  
0.390  
e
1.27 BSC  
0.050 BSC  
H
7.40  
0.50  
1.10  
8.20 0.291  
0.85 0.020  
1.50 0.043  
0.323  
0.033  
0.059  
E
L
L
E
0
10  
0.90 0.028  
10  
_
0.035  
0.031  
M
Q
0
_
_
_
0.70  
−−−  
1
Z
0.78  
−−−  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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Order Literature: http://www.onsemi.com/orderlit  
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
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For additional information, please contact your local  
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MC14585B/D  

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