MC1489AMELG [ONSEMI]
Quad Line EIA−232D Receivers; 四线EIA- 232D接收器
| 型号： | MC1489AMELG |
| 厂家： | 
ONSEMI |
| 描述： | Quad Line EIA−232D Receivers |
| 文件： | 总12页 (文件大小：156K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC1489, MC1489A
Quad Line EIA−232D
Receivers
The MC1489 monolithic quad line receivers are designed to
interface data terminal equipment with data communications
equipment in conformance with the specifications of EIA Standard
No. EIA−232D.
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Features
SOIC−14
D SUFFIX
CASE 751A
• Input Resistance − 3.0 k to 7.0 kW
• Input Signal Range − ± 30 V
• Input Threshold Hysteresis Built In
14
1
• Response Control
PDIP−14
P SUFFIX
CASE 646
a) Logic Threshold Shifting
b) Input Noise Filtering
• Pb−Free Packages are Available
14
1
SOEIAJ−14
M SUFFIX
CASE 965
14
1
PIN CONNECTIONS
1
2
3
4
5
6
7
14
V
Input A
CC
Line Driver
MC1488
Interconnecting
Cable
Line Receiver
MC1489
Response
Control A
Input D
13
12
Response
Control D
Output A
Input B
11 Output D
Response
Control B
Input C
10
9
Interconnecting
Cable
Response
Control C
Output B
Ground
MDTL Logic Output
MDTL Logic Input
8
Output C
Figure 1. Simplified Application
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 9 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
October, 2006 − Rev. 10
MC1489/D
MC1489, MC1489A
14
V
CC
9.0 k
5.0 k
1.7 k
R
F
Response Control 2
3 Output
3.8 k
Input 1
10 k
MC1489 MC1489A
6.7 kW 1.6 kW
R
F
7 GND
Figure 2. Representative Schematic Diagram
(1/4 of Circuit Shown)
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2
MC1489, MC1489A
MAXIMUM RATINGS (T = + 25°C, unless otherwise noted)
A
Rating
Symbol
Value
10
Unit
Vdc
Vdc
mA
Power Supply Voltage
Input Voltage Range
Output Load Current
V
CC
V
± 30
20
IR
L
I
Power Dissipation (Package Limitation, SOIC−14 and Plastic Dual In−Line Package)
P
1000
6.7
mW
mW/°C
D
Derate above T = + 25°C
1/
A
qJA
Operating Ambient Temperature Range
Storage Temperature Range
T
0 to + 75
°C
°C
A
T
stg
− 65 to + 175
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (Response control pin is open.) (V = + 5.0 Vdc ± 10%, T = 0 to + 75°C, unless otherwise noted)
CC
A
Characteristics
Symbol
Min
Typ
Max
Unit
Positive Input Current
Negative Input Current
(V = + 25 Vdc)
(V = + 3.0 Vdc)
IH
I
3.6
0.43
−
−
8.3
−
mA
IH
IH
(V = − 25 Vdc)
I
− 3.6
− 0.43
−
−
− 8.3
−
mA
IH
IL
(V = − 3.0 Vdc)
IH
Input Turn−On Threshold Voltage
(T = + 25°C, V p 0.45 V)
V
Vdc
IH
MC1489
1.0
−
1.5
A
OL
MC1489A
1.75
1.95
2.25
Input Turn−Off Threshold Voltage
(T = + 25°C, V q 2.5 V, I = − 0.5 mA)
V
Vdc
Vdc
IL
MC1489
MC1489A
0.75
0.75
−
0.8
1.25
1.25
A
OH
L
Output Voltage High
(V = 0.75 V, I = − 0.5 mA)
(Input Open Circuit, I = − 0.5 mA)
V
OH
2.5
2.5
4.0
4.0
5.0
5.0
IH
L
L
Output Voltage Low
(V = 3.0 V, I = 10 mA)
V
−
−
−
0.2
− 3.0
16
0.45
− 4.0
26
Vdc
mA
mA
IL
L
OL
OS
CC
Output Short−Circuit Current
I
I
Power Supply Current (All Gates “on,” I = 0 mA, V = + 5.0 Vdc)
out
IH
Power Consumption
(V = + 5.0 Vdc)
IH
P
−
80
130
mW
C
SWITCHING CHARACTERISTICS (V = 5.0 Vdc ± 1%, T = + 25°C, See Figure 3.)
CC
A
Propagation Delay Time
Rise Time
(R = 3.9 kW)
t
−
−
−
−
25
120
25
85
175
50
ns
ns
ns
ns
L
PLH
(R = 3.9 kW)
L
t
TLH
PHL
Propagation Delay Time
Fall Time
(R = 390 kW)
L
t
(R = 390 kW)
L
t
10
20
THL
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3
MC1489, MC1489A
TEST CIRCUITS
5.0 Vdc
R
L
All diodes
1N3064
or equivalent
V
R
E
E
o
in
R
C
L
3.0 V
50%
50%
C
E
t
and t
in
TLH
THL
measured
10% − 90%
t
Response Node
PLH
1/4
MC1489A
E
O
V
V
in
O
t
TLH
t
THL
1.5 V
1.5 V
C = 15 pF = total parasitic capacitance which includes
L
probe and wiring capacitances
C, capacitor is for noise filtering.
R, resistor is for threshold shifting.
Figure 3. Switching Response
Figure 4. Response Control Node
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4
−
4.0
−
−
6.0
8.0
V
V
ILH IHL
−10
−
5
−
2
2
0
−ꢀ15 −ꢀ10 −ꢀ5.0
0
5.0
10
15
20
25
−ꢀ3.0 −ꢀ2.0 −ꢀ1.0
0
1.0
2.0 3.0
−
.0
−
3
2
.0 −ꢀ1.0
0
1.0 2.0
3.0 4.0
−
2.0
MC1489, MC1489A
TYPICAL CHARACTERISTICS
(V = 5.0 Vdc, T = +25°C, unless otherwise noted)
CC
A
10
8.0
6.0
4.0
2.0
0
6.0
5.0
4.0
3.0
2.0
1.0
0
V
I
E
O
R
R
R
T
1
T
5.0 k
T
13 k
R
T
11 k
R
V
5.0 V
V
5.0 V
T
th
th
V
th
−ꢀ5.0 V
V
th
I
I
V
I
V , INPUT VOLTAGE (V)
in
V , INPUT VOLTAGE (V)
I
Figure 5. Input Current
Figure 6. MC1489 Input Threshold
Voltage Adjustment
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
6.0
5.0
MC1489A V
IH
V
in
E
O
4.0
3.0
2.0
1.0
0
R
T
11 k
R
T
1
R
T
5.0 k
R
MC1489 V
IH
V
T
th
−ꢀ5.0 V
V
5.0 V
th
V
th
MC1489 V
IL
MC1489A V
V
V
IHL
IL
ILH
−ꢀ60
0
+ꢀ60
+ꢀ120
V , INPUT VOLTAGE (V)
I
T, TEMPERATURE (°C)
Figure 7. MC1489A Input Threshold
Voltage Adjustment
Figure 8. Input Threshold Voltage
versus Temperature
2.0
V
MC1489A
IH
1.0
V
V
V
MC1489
MC1489
MC1489A
IH
IL
IL
0
3.0
4.0
5.0
6.0
V
, POWER SUPPLY VOLTAGE (V)
CC
Figure 9. Input Threshold versus
Power Supply Voltage
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5
MC1489, MC1489A
APPLICATIONS INFORMATION
General Information
The Electronic Industries Association (EIA) has released
the EIA−232D specification detailing the requirements for
the interface between data processing equipment and data
communications equipment. This standard specifies not
only the number and type of interface leads, but also the
voltage levels to be used. The MC1488 quad driver and its
companion circuit, the MC1489 quad receiver, provide a
complete interface system between DTL or TTL logic levels
and the EIA−232D defined levels. The EIA−232D
requirements as applied to receivers are discussed herein.
The required input impedance is defined as between
3000 W and 7000 W for input voltages between 3.0 and 25 V
in magnitude; and any voltage on the receiver input in an
open circuit condition must be less than 2.0 V in magnitude.
The MC1489 circuits meet these requirements with a
turn−on voltage of 1.25 V and turn−off of 1.0 V for a typical
hysteresis of 250 mV. The MC1489A has typical turn−on of
1.95 V and turn−off of 0.8 V for typically 1.15 V of
hysteresis.
Each receiver section has an external response control
node in addition to the input and output pins, thereby
allowing the designer to vary the input threshold voltage
levels. A resistor can be connected between this node and an
external power supply. Figures 4, 6 and 7 illustrate the input
threshold voltage shift possible through this technique.
This response node can also be used for the filtering of
high frequency, high energy noise pulses. Figures 10 and 11
show typical noise pulse rejection for external capacitors of
various sizes.
These two operations on the response node can be
combined or used individually for many combinations of
interfacing applications. The MC1489 circuits are
particularly useful for interfacing between MOS circuits and
MDTL/MTTL logic systems. In this application, the input
threshold voltages are adjusted (with the appropriate supply
and resistor values) to fall in the center of the MOS voltage
logic levels (see Figure 12).
maximum open circuit voltage of one V
.
BE
The receiver shall detect a voltage between − 3.0 and
−25 V as a Logic “1” and inputs between 3.0 and 25 V as a
Logic “0.” On some interchange leads, an open circuit of
power “OFF” condition (300 W or more to ground) shall be
decoded as an “OFF” condition or Logic “1.” For this
reason, the input hysteresis thresholds of the MC1489
circuits are all above ground. Thus an open or grounded
input will cause the same output as a negative or Logic “1”
input.
The response node may also be used as the receiver input
as long as the designer realizes that he may not drive this
node with a low impedance source to a voltage greater than
one diode above ground or less than one diode below
ground. This feature is demonstrated in Figure 13 where two
receivers are slaved to the same line that must still meet the
EIA−232D impedance requirement.
Device Characteristics
The MC1489 interface receivers have internal feedback
from the second stage to the input stage providing input
hysteresis for noise rejection. The MC1489 input has typical
6
6
MC1489A
MC1489
5
5
100 pF
300 pF
500 pF
10 pF
12 pF
100 pF 300 pF
500 pF
4
3
2
1
4
3
2
1
10
100
1000
10,000
10
100
1000
10,000
PW, INPUT PULSE WIDTH (ns)
PW, INPUT PULSE WIDTH (ns)
Figure 10. Typical Turn On Threshold versus
Capacitance from Response Control Pin to GND
Figure 11. Typical Turn On Threshold versus
Capacitance from Response Control Pin to GND
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6
MC1489, MC1489A
+ꢀ5.0 Vdc
R
MC1489
+ꢀ5.0 Vdc
MOS
Logic
DTL or TTL
−V
GG
−V
DD
+ꢀ5.0 Vdc
Figure 12. Typical Translator Application − MOS to DTL or TTL
V
CC
Response−ControlPin
1/2 MC1489
Output
Input
8.0 k
V
CC
Output
8.0 k
Input
Response−Control Pin
Figure 13. Typical Paralleling of Two MC1489, A Receivers to Meet EIA−232D
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7
MC1489, MC1489A
ORDERING INFORMATION
†
Device
MC1489D
Package
Operating Temperature Range
Shipping
SOIC−14
55 Units/Rail
2500 Tape & Reel
55 Units/Rail
MC1489DG
SOIC−14
(Pb−Free)
MC1489DR2
SOIC−14
MC1489DR2G
SOIC−14
(Pb−Free)
MC1489AD
SOIC−14
MC1489ADG
SOIC−14
(Pb−Free)
MC1489ADR2
SOIC−14
2500 Tape & Reel
MC1489ADR2G
SOIC−14
(Pb−Free)
MC1489P
PDIP−14
MC1489PG
PDIP−14
(Pb−Free)
T = 0 to +75°C
A
25 Units/Rail
MC1489AP
PDIP−14
MC1489APG
PDIP−14
(Pb−Free)
MC1489M
SOEIAJ−14
50 Units/Rail
2000 Tape & Reel
50 Units/Rail
MC1489MG
SOEIAJ−14
(Pb−Free)
MC1489MEL
SOEIAJ−14
MC1489MELG
SOEIAJ−14
(Pb−Free)
MC1489AM
SOEIAJ−14
MC1489AMG
SOEIAJ−14
(Pb−Free)
MC1489AMEL
SOEIAJ−14
2000 Tape & Reel
MC1489AMELG
SOEIAJ−14
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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8
MC1489, MC1489A
MARKING DIAGRAMS
SOIC−14
D SUFFIX
CASE 751A
PDIP−14
P SUFFIX
CASE 646
14
14
14
14
MC1489ADG
AWLYWW
MC1489DG
AWLYWW
MC1489AP
AWLYYWWG
MC1489P
AWLYYWWG
1
1
1
1
SOEIAJ−14
M SUFFIX
CASE 965
MC1489A
ALYWG
MC1489
ALYWG
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
= Pb−Free Package
G
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9
MC1489, MC1489A
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−A−
14
8
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−B−
P 7 PL
M
M
B
0.25 (0.010)
7
1
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
F
R X 45
_
C
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
−T−
SEATING
PLANE
J
M
K
1.27 BSC
D 14 PL
0.19
0.10
0
M
S
S
0.25 (0.010)
T
B
A
7
0
7
_
_
_
_
5.80
0.25
6.20 0.228 0.244
0.50 0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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10
MC1489, MC1489A
PDIP−14
CASE 646−06
ISSUE P
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
14
1
8
7
B
INCHES
MILLIMETERS
A
F
DIM
A
B
C
D
F
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
0.715
0.240
0.145
0.015
0.040
L
N
C
G
H
J
K
L
M
N
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.290
−−−
0.095
0.015
0.135
0.310
10
1.32
0.20
2.92
7.37
−−−
0.38
2.41
0.38
3.43
7.87
10
−T−
SEATING
PLANE
J
_
_
K
0.015
0.039
1.01
D 14 PL
H
G
M
M
0.13 (0.005)
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11
MC1489, MC1489A
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
14
8
E
Q
1
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
H
E
E
_
M
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
7
1
DETAIL P
Z
D
MILLIMETERS
INCHES
MIN MAX
−−− 0.081
VIEW P
DIM MIN
MAX
2.05
0.20
0.50
0.20
10.50
5.45
A
e
A
−−−
0.05
0.35
0.10
9.90
5.10
c
A
1
b
c
0.002
0.008
0.020
0.008
0.413
0.215
0.014
0.004
0.390
0.201
D
E
e
b
A
1
1.27 BSC
0.050 BSC
H
M
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
0.13 (0.005)
E
0.10 (0.004)
0.50
L
E
M
Q
1
0
0.70
−−−
10
10
0.035
−−− 0.056
0
0.028
_
_
_
_
0.90
1.42
Z
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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PUBLICATION ORDERING INFORMATION
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MC3423/D
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SI9137LG
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SI9122E
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