MC34023P [ONSEMI]

High Speed Single-Ended PWM Controller; 高速单端PWM控制器
MC34023P
型号: MC34023P
厂家: ONSEMI    ONSEMI
描述:

High Speed Single-Ended PWM Controller
高速单端PWM控制器

光电二极管 控制器
文件: 总19页 (文件大小:473K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Order this document by MC34023/D  
The MC34023 series are high speed, fixed frequency, single–ended pulse  
width modulator controllers optimized for high frequency operation. They are  
specifically designed for Off–Line and DC–to–DC converter applications  
offering the designer a cost–effective solution with minimal external  
components. These integrated circuits feature an oscillator, a temperature  
compensated reference, a wide bandwidth error amplifier, a high speed  
current sensing comparator, and a high current totem pole output ideally  
suited for driving a power MOSFET.  
16  
1
P SUFFIX  
PLASTIC PACKAGE  
CASE 648  
Also included are protective features consisting of input and reference  
undervoltage lockouts each with hysteresis, cycle–by–cycle current limiting,  
and a latch for single pulse metering.  
The flexibility of this series allows it to be easily configured for either  
current mode or voltage mode control.  
50 ns Propagation Delay to Output  
16  
High Current Totem Pole Output  
1
Wide Bandwidth Error Amplifier  
DW SUFFIX  
PLASTIC PACKAGE  
CASE 751G  
Fully–Latched Logic with Double Pulse Suppression  
Latching PWM for Cycle–By–Cycle Current Limiting  
Soft–Start Control with Latched Overcurrent Reset  
Input Undervoltage Lockout with Hysteresis  
Low Start–Up Current (500 µA Typ)  
(SO–16L)  
Internally Trimmed Reference with Undervoltage Lockout  
90% Maximum Duty Cycle (Externally Adjustable)  
Precision Trimmed Oscillator  
PIN CONNECTIONS  
Voltage or Current Mode Operation to 1.0 MHz  
Functionally Similar to the UC3823  
Error Amp  
Inverting Input  
Error Amp  
1
2
16  
15  
14  
V
ref  
V
CC  
Noninverting Input  
Simplified Application  
Output  
3
4
5
6
Error Amp Output  
13  
V
C
Clock  
16  
4
15  
12 Power Ground  
R
T
5.1V  
Reference  
V
ref  
Current Limit  
11  
V
CC  
C
T
Clock  
Reference  
Ground  
10  
9
Ramp  
7
8
5
6
UVLO  
R
T
Current Limit/  
Shutdown  
Soft–Start  
Oscillator  
C
T
(Top View)  
13  
14  
12  
V
C
7
3
Ramp  
Output  
Error Amp  
Output  
Noninverting  
Input  
Latching  
PWM  
Power  
Ground  
Error  
Amp  
2
ORDERING INFORMATION  
Operating  
Inverting  
Input  
11  
9
1
8
Current  
Limit Ref  
Current  
Limit/  
Shutdown  
Temperature Range  
Device  
Package  
Plastic DIP  
SO–16L  
Soft–Start  
Soft–Start  
MC33023P  
MC33023DW  
MC34023P  
T
= 40° to +105°C  
A
Ground  
10  
T
A
= 0° to +70°C  
Plastic DIP  
This device contains 176 active transistors.  
Motorola, Inc. 1996  
Rev 2  
MC34023 MC33023  
MAXIMUM RATINGS  
Rating  
Symbol  
Value  
Unit  
Power Supply Voltage  
V
CC  
30  
V
Output Driver Supply Voltage  
V
20  
V
A
C
O
Output Current, Source or Sink (Note 1)  
DC  
Pulsed (0.5 µs)  
I
0.5  
2.0  
Current Sense, Soft–Start, Ramp, and Error Amp Inputs  
Error Amp Output and Soft–Start Sink Current  
V
0.3 to +7.0  
V
in  
I
O
10  
mA  
mA  
Clock and R Output Current  
T
I
5.0  
CO  
Power Dissipation and Thermal Characteristics  
SO–16L Package (Case 751G)  
Maximum Power Dissipation @ T = +25°C  
Thermal Resistance, Junction–to–Air  
DIP Package (Case 648)  
P
862  
145  
mW  
°C/W  
A
D
R
θJA  
1.25  
100  
W
°C/W  
Maximum Power Dissipation @ T = +25°C  
P
D
A
Thermal Resistance, Junction–to–Air  
R
θJA  
Operating Junction Temperature  
T
J
+150  
°C  
°C  
Operating Ambient Temperature (Note 2)  
MC34023  
MC33023  
T
A
0 to +70  
40 to +105  
Storage Temperature Range  
T
stg  
55 to +150  
°C  
ELECTRICAL CHARACTERISTICS (V  
CC  
= 15 V, R = 3.65 k, C = 1.0 nF, for typical values T = +25°C, for min/max values T is  
the operating ambient temperature range that applies [Note 2], unless otherwise noted.)  
T
T
A
A
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
REFERENCE SECTION  
Reference Output Voltage (I = 1.0 mA, T = +25°C)  
V
ref  
5.05  
5.1  
2.0  
2.0  
0.2  
5.15  
15  
V
mV  
mV  
mV/°C  
V
O
J
Line Regulation (V  
CC  
= 10 V to 30 V)  
Reg  
line  
load  
S
Load Regulation (I = 1.0 mA to 10 mA)  
O
Reg  
T
15  
Temperature Stability  
Total Output Variation over Line, Load, and Temperature  
Output Noise Voltage (f = 10 Hz to 10 kHz, T = +25°C)  
V
ref  
4.95  
5.25  
V
n
50  
µV  
J
Long Term Stability (T = +125°C for 1000 Hours)  
S
5.0  
– 65  
mV  
mA  
A
Output Short Circuit Current  
OSCILLATOR SECTION  
Frequency  
I
– 30  
–100  
SC  
kHz  
T = +25°C  
f
380  
370  
400  
400  
420  
430  
J
osc  
Line (V  
= 10 V to 30 V) and Temperature (T = T  
to T  
)
high  
CC  
Frequency Change with Voltage (V  
A
low  
= 10 V to 30 V)  
f  
f  
/V  
/T  
0.2  
2.0  
2.8  
1.0  
1.0  
%
%
V
CC  
osc  
Frequency Change with Temperature (T = T  
A
to T  
)
high  
low  
osc  
Sawtooth Peak Voltage  
Sawtooth Valley Voltage  
V
V
2.6  
0.7  
3.0  
1.25  
OSC(P)  
V
OSC(V)  
Clock Output Voltage  
High State  
Low State  
V
V
V
3.9  
4.5  
2.3  
2.9  
OH  
OL  
NOTES: 1. Maximum package power dissipation limits must be observed.  
2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.  
T
T
= 0°C for MC34023  
= 40°C for MC33023  
T
T
= +70°C for MC34023  
= +105°C for MC33023  
low  
low  
high  
high  
2
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
ELECTRICAL CHARACTERISTICS (V  
CC  
= 15 V, R = 3.65 k, C = 1.0 nF, for typical values T = +25°C, for min/max values T is  
the operating ambient temperature range that applies [Note 2], unless otherwise noted.)  
T
T
A
A
Characteristic Symbol  
Min  
Typ  
Max  
Unit  
ERROR AMPLIFIER SECTION  
Input Offset Voltage  
V
15  
3.0  
1.0  
mV  
µA  
IO  
Input Bias Current  
I
IB  
0.6  
0.1  
95  
Input Offset Current  
I
IO  
µA  
Open–Loop Voltage Gain (V = 1.0 V to 4.0 V)  
A
VOL  
60  
4.0  
75  
85  
dB  
O
Gain Bandwidth Product (T = +25°C)  
GBW  
8.3  
95  
MHz  
dB  
J
Common Mode Rejection Ratio (V  
= 1.5 V to 5.5 V)  
CM  
= 10 V to 30 V)  
CMRR  
PSRR  
Power Supply Rejection Ratio (V  
110  
dB  
CC  
Output Current, Source (V = 4.0 V)  
I
0.5  
1.0  
3.0  
3.6  
mA  
O
Source  
I
Sink  
Output Current, Sink (V = 1.0 V)  
O
Output Voltage Swing, High State (I = 0.5 mA)  
Output Voltage Swing, Low State (I = 1 mA)  
O
V
V
4.5  
0
4.75  
0.4  
5.0  
1.0  
V
O
OH  
OL  
Slew Rate  
SR  
6.0  
12  
V/µs  
PWM COMPARATOR SECTION  
Ramp Input Bias Current  
I
IB  
0.5  
5.0  
µA  
Duty Cycle, Maximum  
Duty Cycle, Minimum  
DC  
80  
90  
0
%
(max)  
DC  
(min)  
Zero Duty Cycle Threshold Voltage Pin 3(4) (Pin 7(9) = 0 V)  
V
1.1  
1.25  
60  
1.4  
V
th  
Propagation Delay (Ramp Input to Output, T = +25°C)  
t
100  
ns  
J
PLH(in/out)  
SOFT–START SECTION  
Charge Current (V  
= 0.5 V)  
I
3.0  
1.0  
9.0  
4.0  
20  
µA  
Soft–Start  
Discharge Current (V  
chg  
= 1.5 V)  
I
mA  
Soft–Start  
CURRENT SENSE SECTION  
dischg  
Input Bias Current (Pin 9(12) = 0 V to 4.0 V)  
I
15  
45  
µA  
mV  
V
IB  
Current Limit Comparator Input Offset Voltage (Pin 11(14) = 1.1 V)  
Current Limit Reference Input Common Mode Range (Pin 11(14))  
Shutdown Comparator Threshold  
V
IO  
V
1.0  
1.25  
1.25  
1.55  
80  
CMR  
V
1.40  
50  
V
th  
Propagation Delay (Current Limit/Shutdown to Output, T = +25°C)  
t
ns  
J
PLH(in/out)  
OUTPUT SECTION  
Output Voltage  
V
Low State (I  
= 20 mA)  
= 200 mA)  
= 20 mA)  
= 200 mA)  
V
13  
12  
0.25  
1.2  
13.5  
13  
0.4  
2.2  
Sink  
OL  
(I  
High State (I  
(I  
Sink  
Source  
Source  
V
OH  
Output Voltage with UVLO Activated (V  
= 6.0 V, I  
= 0.5 mA)  
V
0.25  
100  
30  
1.0  
500  
60  
V
CC  
Sink  
OL(UVLO)  
Output Leakage Current (V = 20 V)  
I
L
µA  
ns  
ns  
C
Output Voltage Rise Time (C = 1.0 nF, T = +25°C)  
t
r
L
J
Output Voltage Fall Time (C = 1.0 nF, T = +25°C)  
t
f
30  
60  
L
J
UNDERVOLTAGE LOCKOUT SECTION  
Start–Up Threshold (V  
Increasing)  
V
8.8  
0.4  
9.2  
0.8  
9.6  
1.2  
V
V
CC  
th(on)  
UVLO Hysteresis Voltage (V  
Decreasing After Turn–On)  
V
H
CC  
TOTAL DEVICE  
Power Supply Current  
Start–Up (VCC = 8.0 V)  
Operating  
I
mA  
CC  
0.5  
20  
1.2  
30  
NOTES: 1. Maximum package power dissipation limits must be observed.  
2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.  
T
T
= 0°C for MC34023  
= 40°C for MC33023  
T
T
= +70°C for MC34023  
= +105°C for MC33023  
low  
low  
high  
high  
3
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Figure 1. Timing Resistor versus  
Oscillator Frequency  
Figure 2. Oscillator Frequency versus Temperature  
100 k  
10 k  
1200  
1000  
800  
R
C
= 1.2 k  
= 1.0 nF  
V
T
= 15 V  
T
T
CC  
= +25  
9
1
3
5
7
°C  
1.0 MHz  
A
2
4
6
8
CT =  
1. 100 nF  
2. 47 nF  
3. 22 nF  
4. 10 nF  
5. 4.7 nF  
6. 2.2 nF  
7. 1.0 nF  
8. 470 pF  
9. 220 pF  
V
= 15 V  
CC  
600  
R
C
= 3.6 k  
= 1.0 nF  
T
T
400 kHz  
50 kHz  
400  
200  
0
R
= 36 k  
= 1.0 nF  
1.0 k  
470  
T
C
T
4
5
6
7
10  
100  
1000  
10  
10  
10  
– 55  
– 25  
0
25  
50  
75  
100  
125  
f
, OSCILLATOR FREQUENCY (Hz)  
T , AMBIENT TEMPERATURE (°C)  
osc  
A
Figure 3. Error Amp Open Loop Gain and  
Phase versus Frequency  
Figure 4. PWM Comparator Zero Duty Cycle  
Threshold Voltage versus Temperature  
120  
100  
80  
0
1.30  
1.28  
1.26  
1.24  
V
= 15 V  
45  
CC  
Pin 7(9) = 0 V  
Gain  
60  
Phase  
40  
90  
20  
1.22  
1.20  
135  
0
– 20  
10  
100  
1.0 k  
10 k  
100 k  
1.0 M  
10 M  
– 55  
– 25  
0
25  
50  
75  
C)  
100  
125  
f, FREQUENCY (Hz)  
T , AMBIENT TEMPERATURE (  
°
A
Figure 5. Error Amp Small Signal  
Transient Response  
Figure 6. Error Amp Large Signal  
Transient Response  
3.0 V  
2.5 V  
2.0 V  
2.55 V  
2.5 V  
2.45 V  
0.1  
µs/DIV  
0.1 µs/DIV  
4
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Figure 7. Reference Voltage Change  
versus Source Current  
Figure 8. Reference Short Circuit Current  
versus Temperature  
0
66  
65.6  
65.2  
64.8  
64.4  
64  
V
= 15 V  
– 5.0  
CC  
T
= – 55°C  
A
V
= 15 V  
CC  
– 10  
– 15  
T
= +25°C  
T
= +125°C  
A
A
– 20  
– 25  
– 30  
10  
20  
30  
40  
50  
– 55  
– 25  
0
25  
50  
75  
C)  
100  
125  
0
I
, SOURCE CURRENT (mA)  
T , AMBIENT TEMPERATURE (  
°
Source  
A
Figure 9. Reference Line Regulation  
Figure 10. Reference Load Regulation  
V
LINE REGULATION 10 V to 24 V  
(2.0 ms/DIV)  
V
LOAD REGULATION 1.0 mA to 10 mA  
(2.0 ms/DIV)  
ref  
ref  
Figure 11. Current Limit Comparator Input  
Offset Voltage versus Temperature  
Figure 12. Shutdown Comparator Threshold  
Voltage versus Temperature  
100  
60  
1.50  
1.46  
V
= 15 V  
CC  
V
= 15 V  
CC  
Pin 11(14) = 1.1 V  
20  
1.42  
1.38  
– 20  
– 60  
1.34  
1.30  
– 100  
– 55  
– 25  
0
25  
50  
75  
C)  
100  
125  
– 55  
– 25  
0
25  
50  
75  
C)  
100  
125  
T , AMBIENT TEMPERATURE (  
°
T , AMBIENT TEMPERATURE (  
°
A
A
5
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Figure 13. Soft–Start Charge Current  
versus Temperature  
Figure 14. Output Saturation Voltage  
versus Load Current  
0
10  
9.5  
9.0  
Source Saturation  
V
V
= 15 V  
CC  
CC  
(Load to Ground)  
– 1.0  
V
80  
= 15 V  
s Pulsed Load  
CC  
µ
120 Hz Rate  
= 25  
– 2.0  
T
°C  
A
8.5  
8.0  
7.5  
7.0  
2.0  
1.0  
0
Sink Saturation  
(Load to V  
Ground  
)
CC  
– 55  
– 25  
0
25  
50  
75  
C)  
100  
125  
0
0.2  
0.4  
I , OUTPUT LOAD CURRENT (A)  
O
0.6  
0.8  
1.0  
T , AMBIENT TEMPERATURE (  
°
A
Figure 15. Drive Output Rise and Fall Time  
Figure 16. Drive Output Rise and Fall Time  
OUTPUT RISE & FALL TIME 1.0 nF LOAD  
50 ns/DIV  
OUTPUT RISE & FALL TIME 10 nF LOAD  
50 ns/DIV  
Figure 17. Supply Voltage versus Supply Current  
30  
25  
R
C
= 3.65 kΩ  
= 1.0 nF  
T
T
20  
15  
V
Increasing  
CC  
V
Decreasing  
CC  
10  
5.0  
0
0
4.0  
8.0  
12  
16  
20  
V
, SUPPLY VOLTAGE (V)  
CC  
6
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Figure 18. Representative Block Diagram  
V
V
in  
CC  
16  
15  
Reference  
Regulator  
V
ref  
V
V
CC  
CC  
4
5
UVLO  
Clock  
9.2 V  
13  
V
V
4.2 V  
ref  
UVLO  
Oscillator  
C
R
T
14  
6
7
C
T
Output  
12  
R
PWM  
Comparator  
Q
Power Ground  
1.25 V  
Ramp  
S
PWM Latch  
Error Amp Output  
3
2
Current  
Limit  
Error  
Amp  
+
11  
Noninverting Input  
Inverting Input  
Current Limit Reference  
9.0  
µA  
1
8
9
Current Limit/Shutdown  
Soft–Start  
0.5 V  
Soft–Start Latch  
R
S
1.4 V  
C
SS  
Q
Shutdown  
10  
Ground  
Figure 19. Current Limit Operating Waveforms  
C
T
Clock  
Soft–Start  
Error Amp Output  
Ramp  
PWM  
Comparator  
Output  
7
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
OPERATING DESCRIPTION  
The MC33023 and MC34023 series are high speed, fixed  
limiting the duty cycle. The time it takes for a capacitor to  
reach full charge is given by:  
frequency, single–ended pulse width modulator controllers  
optimized for high frequency operation. They are specifically  
designed for Off–Line and DC–to–DC converter applications  
offering the designer a cost effective solution with minimal  
external components. A representative block diagram is  
shown in Figure 18.  
5
t
(4.5 10 ) C  
Soft-Start  
A Soft–Start latch is incorporated to prevent erratic  
operation of this circuitry. Two conditions can cause the  
Soft–Start circuit to latch so that the Soft–Start capacitor  
stays discharged. The first condition is activation of an  
Oscillator  
undervoltage lockout of either V  
condition is when current sense input exceeds 1.4 V. Since  
this latch is “set dominant”, it cannot be reset until either of  
or V . The second  
CC  
ref  
The oscillator frequency is programmed by the values  
selected for the timing components R and C . The R pin is  
T
T
T
set to a temperature compensated 3.0 V. By selecting the  
value of R , the charge current is set through a current mirror  
thesesignalsisremovedand,thevoltageatC  
than 0.5 V.  
isless  
Soft–Start  
T
for the timing capacitor C . This charge current runs  
T
continuously through C . The discharge current is ratioed to  
T
PWM Comparator and Latch  
be 10 times the charge current, which yields the maximum  
A PWM circuit typically compares an error voltage with a  
ramp signal. The outcome of this comparison determines the  
state of the output. In voltage mode operation the ramp signal  
is the voltage ramp of the timing capacitor. In current mode  
operation the ramp signal is the voltage ramp induced in a  
current sensing element. The ramp input of the PWM  
comparator is pinned out so that the user can decide which  
mode of operation best suits the application requirements.  
The ramp input has a 1.25 V offset such that whenever the  
voltage at this pin exceeds the error amplifier output voltage  
minus 1.25 V, the PWM comparator will cause the PWM latch  
to set, disabling the outputs. Once the PWM latch is set, only  
a blanking pulse by the oscillator can reset it, thus initiating  
the next cycle.  
duty cycle of 90%. C is charged to 2.8 V and discharged to  
1.0 V. During the discharge of C , the oscillator generates an  
T
internal blanking pulse that resets the PWM Latch and,  
inhibits the outputs. The threshold voltage on the oscillator  
comparator is trimmed to guarantee an oscillator accuracy of  
5.0% at 25°C.  
T
Additional dead time can be added by externally  
increasing the charge current to C as shown in Figure 23.  
T
This changes the charge to discharge ratio of C which is set  
T
internally to I  
ratio will be:  
/10 I  
charge  
. The new charge to discharge  
charge  
I
I
l
additiona  
charge  
)
% Deadtime  
10 (I  
charge  
Current Limiting and Shutdown  
A bidirectional clock pin is provided for synchronization or  
for master/slave operation. As a master, the clock pin  
A pin is provided to perform current limiting and shutdown  
operations. Two comparators are connected to the input of  
this pin. The reference voltage for the current limit  
comparator is not set internally. A pin is provided so the user  
can set the voltage. When the voltage at the current limit  
input pin exceeds the externally set voltage, the PWM latch is  
set, disabling the output. In this way cycle–by–cycle current  
limiting is accomplished. If a current limit resistor is used in  
series with the power devices, the value of the resistor is  
found by:  
provides a positive output pulse during the discharge of C .  
T
As a slave, the clock pin is an input that resets the PWM latch  
and blanks the drive output, but does not discharge C .  
T
Therefore, the oscillator is not synchronized by driving the  
clock pin alone. Figures 27, 28 and 29 provide suggested  
synchronization.  
Error Amplifier  
A fully compensated Error Amplifier is provided. It features  
a typical DC voltage gain of 95 dB and a gain bandwidth  
product of 8.3 MHz with 75 degrees of phase margin  
(Figure 3). Typical application circuits will have the  
noninverting input tied to the reference. The inverting input  
will typically be connected to a feedback voltage generated  
from the output of the switching power supply. Both inputs  
I
Limit Reference Voltage  
R
Sense  
I
pk (switch)  
If the voltage at this pin exceeds 1.4 V, the second  
comparator is activated. This comparator sets a latch which,  
in turn, causes the soft start capacitor to be discharged. In  
this way a “hiccup” mode of recovery is possible in the case  
of output short circuits. If a current limit resistor is used in  
series with the output devices, the peak current at which the  
controller will enter a “hiccup” mode is given by:  
have a common mode voltage (V  
5.5 V. The Error Amplifier Output is provided for external loop  
compensation.  
) input range of 1.5 V to  
CM  
Soft–Start Latch  
Soft–Start is accomplished in conjunction with an external  
capacitor. The Soft–Start capacitor is charged by an internal  
9.0 µA current source. This capacitor clamps the output of  
the error amplifier to less than its normal output voltage, thus  
1.4 V  
I
shutdown  
R
Sense  
8
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Undervoltage Lockout  
current feedback loop. It has been shown that the instability is  
caused by a double pole at half the switching frequency. If an  
external ramp (S ) is added to the on–time ramp (S ) of the  
current–sense waveform, stability can be achieved.  
One must be careful not to add too much ramp  
compensation. If too much is added the system will start to  
perform like a voltage mode regulator. All benefits of current  
mode control will be lost. Figure 25 is an example of one way  
in which external ramp compensation can be implemented.  
There are two undervoltage lockout circuits within the IC.  
The first senses V  
and the second V . During power–up,  
e
n
CC  
ref  
V
must exceed 9.2 V and V must exceed 4.2 V before  
ref  
CC  
the outputs can be enabled and the Soft–Start latch released.  
If V falls below 8.4 V or V falls below 3.6 V, the outputs  
CC  
ref  
are disabled and the Soft–Start latch is activated. When the  
UVLO is active, the part is in a low current standby mode  
allowing the IC to have an off–line bootstrap start–up circuit.  
Typical start–up current is 500 µA.  
Figure 20. Ramp Compensation  
Output  
The MC34023 has a high current totem pole output  
specifically designed for direct drive of power MOSFETs. It is  
capable of up to ± 2.0 A peak drive current with a typical rise  
and fall time of 30 ns driving a 1.0 nF load.  
Ramp Compensation  
Ramp Input  
1.25 V  
Separate pins for V and Power Ground are provided.  
Ramp  
Compensation S  
C
With proper implementation, a significant reduction of  
switching transient noise imposed on the control circuitry is  
e
possible. The separate V supply input also allows the  
designer added flexibility in tailoring the drive voltage  
C
Current  
Signal S  
n
independent of V  
.
CC  
A simple equation can be used to calculate the amount of  
external ramp slope necessary to add that will achieve  
stability in the current loop. For the following equations, the  
calculated values for the application circuit in Figure 34 are  
also shown.  
Reference  
A 5.1 V bandgap reference is pinned out and is trimmed to  
an initial accuracy of ±1.0% at 25°C. This reference has short  
circuit protection and can source in excess of 10 mA for  
powering additional control system circuitry.  
Design Considerations  
V
N
N
O
L
S
P
Do not attempt to construct the converter on  
wire–wrap or plug–in prototype boards. With high  
frequency, high power, switching power supplies it is  
imperative to have separate current loops for the signal paths  
and for the power paths. The printed circuit layout should  
contain a ground plane with low current signal and high  
current switch and output grounds returning on separate  
paths back to the input filter capacitor. Shown in Figure 35 is  
a printed circuit layout of the application circuit. Note how the  
power and ground traces are run. All bypass capacitors and  
snubbers should be connected as close as possible to the  
specific part in question. The PC board lead lengths must be  
less than 0.5 inches for effective bypassing for snubbing.  
S
(R )Ai  
S
e
where:  
V
= DC output voltage  
N , N = number of power transformer primary  
O
S
P
= or secondary turns  
A = gain of the current sense network  
= (see Figures 23 and 24)  
L = output inductor  
= current sense resistance  
i
R
S
5
2
8
(
)( )  
0.3 0.55  
S
For the application circuit:  
e
Instabilities  
1.8 µ  
In current mode control, an instability can be encountered  
at any given duty cycle. The instability is caused by the  
= 0.115 V/ms  
9
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
PIN FUNCTION DESCRIPTION  
Pin  
DIP/SOIC  
1
Function  
Description  
Error Amp  
Inverting  
Input  
This pin is usually used for feedback from the output of the power supply.  
2
3
Error Amp  
Noninverting  
Input  
This pin is used to provide a reference in which an error signal can be produced on the output of the  
error amp. Usually this is connected to V , however an external reference can also be used.  
ref  
Error Amp  
Output  
This pin is provided for compensating the error amp for poles and zeros encountered in the power  
supply system, mostly the output LC filter.  
4
5
6
7
Clock  
This is a bidirectional pin used for synchronization.  
R
The value of R sets the charge current through timing Capacitor, C .  
T T  
T
T
C
In conjunction with R , the timing Capacitor sets the switching frequency.  
T
Ramp Input  
For voltage mode operation this pin is connected to C . For current mode operation this pin is  
T
connected through a filter to the current sensing element.  
8
9
Soft–Start  
A capacitor at this pin sets the Soft–Start time.  
Current Limit/  
Shutdown  
This pin has two functions. First, it provides cycle–by–cycle current limiting. Second, if the current is  
excessive, this pin will reinitiate a Soft–Start cycle.  
10  
11  
Ground  
This pin is the ground for the control circuitry.  
Current Limit  
Reference  
Input  
This pin voltage sets the threshold for cycle–by–cycle current limiting.  
12  
13  
Power Ground  
This is a separate power ground return that is connected back to the power source. It is used to reduce  
the effects of switching transient noise on the control circuitry.  
V
C
This is a separate power source connection for the outputs that is connected back to the power source  
input. With a separate power source connection, it can reduce the effects of switching transient noise  
on the control circuitry.  
14  
15  
16  
Output  
This is a high current totem pole output.  
V
CC  
This pin is the positive supply of the control IC.  
V
ref  
This is a 5.1 V reference. It is usually connected to the noninverting input of the error amplifier.  
Figure 21. Voltage Mode Operation  
Figure 22. Current Mode Operation  
4
4
5
5
Oscillator  
Oscillator  
6
6
C
T
C
T
From Current  
Sense Element  
1.25 V  
7
1.25 V  
7
3
1
3
1
Output Voltage  
Feedback Input  
Output Voltage  
Feedback Input  
2
V
ref  
2
V
ref  
Incurrentmodecontrol, anRCfiltershouldbeplacedattherampinput  
to filter the leading edge spike caused by turn–on of a power MOSFET.  
In voltage mode operation, the control range on the output of the Error  
Amplifier from 0% to 90% duty cycle is from 2.25 V to 4.05 V.  
10  
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Figure 23. Resistive Current Sensing  
Figure 24. Primary Side Current Sensing  
9
R
w
I
9
Sense  
I
Sense  
The addition of an RC filter will eliminate instability caused by the  
leading edge spike on the current waveform. This sense signal can also  
be used at the ramp input pin for current mode control. For ramp  
compensation it is necessary to know the gain of the current feedback  
loop. The gain can be calculated by:  
The addition of an RC filter will eliminate instability caused by the  
leading edge spike on the current waveform. This sense signal can also  
be used at the ramp input pin for current mode control. For ramp  
compensation it is necessary to know the gain of the current feedback  
loop. If a transformer is used, the gain can be calculated by:  
R
w
R
A
Sense  
i
turns ratio  
A
i
turns ratio  
Figure 25A. Slope Compensation (Noise Sensitive)  
4
5
Oscillator  
6
C
C
T
1
1.25 V  
R
2
1
Current Sense  
Information  
7
3
R
This method of slope compensation is easy to implement, however, it  
is noise sensitive. Capacitor C provides AC coupling. The oscillator  
1
signal is added to the current signal by a voltage divider consisting of  
resistors R and R .  
1
2
Figure 25B. Slope Compensation (Noise Immune)  
Output  
Current Sense  
Transformer  
Ramp  
Input  
R
w
R
Ramp  
Input  
M
1.25 V  
7
3
R
1.25 V  
f
7
Output  
C
M
R
Current Sense  
C
M
R
f
f
C
C
M
f
Resistor  
3
When only one output is used, this method of slope compensation can be used and it is relatively noise immune. Resistor R and capacitor C provide the added  
M
M
slope necessary. By choosing R and C with a larger time constant than the switching frequency, you can assume that its charge is linear. First choose C , then  
M
M
M
R
canbeadjustedtoachievetherequiredslope. Thediodeprovidesaresetpulseattherampinputattheendofeverycycle. ThechargecurrentI canbecalculated  
M
M
by I = C S . Then R can be calculated by R = V /I  
M
M e CC M.  
M
M
11  
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Figure 27. External Clock Synchronization  
Figure 26. Dead Time Addition  
V
ref  
5.0 V  
0 V  
4
5
6
4
5
6
R
DT  
Oscillator  
Oscillator  
R
T
C
T
R
T
C
T
Additional dead time can be added by the addition of a dead time  
resistor from V  
information.  
to C . See text on Oscillator section for more  
ref  
T
The sync pulse fed into the clock pin must be at least 3.9 V. R and C  
T
T
need to be set 10% slower than the sync frequency. This circuit is also  
used in Voltage Mode operation for master/slave operation. The clock  
signal would be coming from the master which is set at the desired  
operating frequency, while the slave is set 10% slower.  
Figure 28. Current Mode Master/Slave Operation Over Short Distances  
4
4
5
6
V
5
6
ref  
Master  
Oscillator  
Slave  
Oscillator  
R
T
C
T
Figure 29. Synchronization Over Long Distances  
20  
16  
Reference  
MMBT3906  
MMBD0914  
1.0 k  
4.7 k  
4
NC  
4
2200  
5
6
1.15 R  
T
Slave  
Oscillator  
5
6
430  
T
Master  
Oscillator  
MMBT3904  
C
T
R
C
T
12  
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Figure 30. Buffered Maximum Clamp Level  
Figure 31. Bipolar Transistor Drive  
I
B
1
+
0
V
2
V
C
in  
+
Base Charge  
Removal  
V
ref  
8
15  
R
R
1
C
SS  
14  
12  
2
R
To Current  
Sense Input  
S
In voltage mode operation, the maximum duty cycle can be clamped. By the  
addition of a PNP transistor to buffer the clamp voltage, the Soft–Start current  
The totem pole output can furnish negative base current for enhanced  
transistor turn–off, with the addition of the capacitor in series with the base.  
is not affected by R .  
1
V
0.6  
clamp  
9.0 µA  
The new equation for Soft–Start is  
t
(C  
)
SS  
In current mode operation, this circuit will limit the maximum voltage allowed  
at the ramp input to end a cycle.  
Figure 32. MOSFET Parasitic Oscillations  
Figure 33. Isolated MOSFET Drive  
V
V
C
V
in  
C
15  
14  
15  
14  
12  
12  
R
To Current  
Sense Input  
S
A series gate resistor may be needed to dampen high frequency parasitic  
oscillation caused by the MOSFET’s input capacitance and any series wiring  
inductance in the gate–source circuit. The series resistor will also decrease the  
MOSFET switching speed. A Schottky diode can reduce the driver’s power  
dissipation due to excessive ringing, by preventing the output pin from being  
drivenbelowground. TheSchottkydiodealsopreventssubstrateinjectionwhen  
the output pin is driven below ground.  
The totem pole output can easily drive pulse transformers. A Schottky diode  
is recommended when driving inductive loads at high frequencies. The diode  
canreducethedriver’spowerdissipationduetoexcessiveringing,bypreventing  
the output pin from being driven below ground.  
13  
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
+
14  
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Figure 35. PC Board With Components  
1500 pF  
100 pF  
4.0  
1N5819  
1000 pF  
0.01  
0.01  
1500 pF  
6.5  
(Top View)  
15  
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Figure 36. PC Board Without Components  
(Top View)  
4.0  
6.5  
(Bottom View)  
16  
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
OUTLINE DIMENSIONS  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
NOTES:  
–A–  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.  
5. ROUNDED CORNERS OPTIONAL.  
16  
1
9
8
B
INCHES  
MILLIMETERS  
DIM  
A
B
C
D
F
G
H
J
K
L
MIN  
MAX  
0.770  
0.270  
0.175  
0.021  
0.070  
MIN  
18.80  
6.35  
3.69  
0.39  
1.02  
2.54 BSC  
1.27 BSC  
0.21  
MAX  
19.55  
6.85  
4.44  
0.53  
1.77  
F
C
L
0.740  
0.250  
0.145  
0.015  
0.040  
0.100 BSC  
0.050 BSC  
0.008  
S
SEATING  
–T–  
PLANE  
M
K
0.015  
0.130  
0.305  
0.38  
3.30  
7.74  
H
J
0.110  
0.295  
2.80  
7.50  
G
D 16 PL  
0.25 (0.010)  
M
S
0°  
10°  
0°  
10°  
M
M
T
A
0.020  
0.040  
0.51  
1.01  
DW SUFFIX  
PLASTIC PACKAGE  
CASE 751G–02  
(SO–16L)  
–A–  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
16  
1
9
8
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
–B– P 8 PL  
M
M
0.25 (0.010)  
B
5. DIMENSION D DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.13  
(0.005) TOTAL IN EXCESS OF D DIMENSION  
AT MAXIMUM MATERIAL CONDITION.  
G 14 PL  
J
F
INCHES  
MIN MAX  
0.411 10.15  
MILLIMETERS  
DIM  
A
MIN  
MAX  
10.45  
0.400  
0.292  
0.093  
0.014  
0.020  
B
C
D
F
0.299  
0.104  
0.019  
0.035  
7.40  
2.35  
0.35  
0.50  
7.60  
2.65  
0.49  
0.90  
R X 45°  
G
J
K
M
P
R
0.050 BSC  
1.27 BSC  
C
0.010  
0.004  
0.012  
0.009  
0.25  
0.10  
0.32  
0.25  
–T–  
SEATING  
PLANE  
0°  
7°  
0°  
7°  
M
K
0.395  
0.010  
0.415 10.05  
0.029 0.25  
10.55  
0.75  
D 16 PL  
0.25 (0.010)  
M
S
S
T
A
B
17  
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
OUTLINE DIMENSIONS  
FN SUFFIX  
PLASTIC PACKAGE  
CASE 775–02  
(PLCC)  
M
S
S
S
B
0.007 (0.180)  
T
L –M  
N
Y BRK  
–M–  
–N–  
D
D
M
S
U
0.007 (0.180)  
T
L –M  
N
–L–  
Z
W
20  
1
S
S
S
G1  
V
0.010 (0.250)  
T
L –M  
N
X
VIEW D–D  
A
M
M
S
S
S
S
0.007 (0.180)  
0.007 (0.180)  
T
T
L –M  
L –M  
N
N
Z
R
M
S
S
H
0.007 (0.180)  
T L  
–M  
N
C
K1  
E
K
0.004 (0.100)  
SEATING  
G
–T–  
J
PLANE  
M
S
S
F
0.007 (0.180)  
T
L –M  
N
VIEW S  
G1  
VIEW S  
S
S
S
0.010 (0.250)  
T
L –M  
N
NOTES:  
1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE  
TOP OF LEAD SHOULDER EXITS PLASTIC BODY  
AT MOLD PARTING LINE.  
2. DIM G1, TRUE POSITION TO BE MEASURED AT  
DATUM –T–, SEATING PLANE.  
3. DIM R AND U DO NOT INCLUDE MOLD FLASH.  
ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER  
SIDE.  
4. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
5. CONTROLLING DIMENSION: INCH.  
6. THE PACKAGE TOP MAY BE SMALLER THAN THE  
PACKAGE BOTTOM BY UP TO 0.012 (0.300).  
DIMENSIONS R AND U ARE DETERMINED AT THE  
OUTERMOST EXTREMES OF THE PLASTIC BODY  
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,  
GATE BURRS AND INTERLEAD FLASH, BUT  
INCLUDING ANY MISMATCH BETWEEN THE TOP  
AND BOTTOM OF THE PLASTIC BODY.  
7. DIMENSION H DOES NOT INCLUDE DAMBAR  
PROTRUSION OR INTRUSION. THE DAMBAR  
PROTRUSION(S) SHALL NOT CAUSE THE H  
DIMENSION TO BE GREATER THAN 0.037 (0.940).  
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE  
THE H DIMENSION TO BE SMALLER THAN 0.025  
(0.635).  
INCHES  
MILLIMETERS  
DIM  
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1  
K1  
MIN  
MAX  
0.395  
0.395  
0.180  
0.110  
0.019  
MIN  
9.78  
9.78  
4.20  
2.29  
0.33  
MAX  
10.03  
10.03  
4.57  
2.79  
0.48  
0.385  
0.385  
0.165  
0.090  
0.013  
0.050 BSC  
1.27 BSC  
0.026  
0.032  
0.66  
0.51  
0.64  
8.89  
8.89  
1.07  
1.07  
1.07  
0.81  
9.04  
9.04  
1.21  
1.21  
1.42  
0.50  
0.020  
0.025  
0.350  
0.350  
0.042  
0.042  
0.042  
0.356  
0.356  
0.048  
0.048  
0.056  
0.020  
2°  
10  
°
2°  
10°  
0.310  
0.040  
0.330  
7.88  
1.02  
8.38  
18  
MOTOROLA ANALOG IC DEVICE DATA  
MC34023 MC33023  
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and  
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola  
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,includingTypicals”  
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of  
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other  
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury  
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
Motorola was negligent regarding the design or manufacture of the part. Motorola and  
Opportunity/Affirmative Action Employer.  
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal  
Mfax is a trademark of Motorola, Inc.  
How to reach us:  
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;  
P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447  
JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1,  
Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488  
Mfax : RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609  
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,  
– US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298  
INTERNET: http://motorola.com/sps  
MC34023/D  

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